- 18 1月, 2018 8 次提交
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由 Jiri Denemark 提交于
This is a variant of Broadwell-noTSX with indirect branch prediction protection. The only difference between Broadwell-noTSX and Broadwell-noTSX-IBRS is the added "spec-ctrl" feature. The Broadwell-noTSX-IBRS model in QEMU is a bit different since Broadwell-noTSX got several additional features since we added it in cpu_map.xml: abm, arat, f16c, rdrand, vme, xsaveopt Adding them only to the -IBRS variant would confuse our CPU detection code. Signed-off-by: NJiri Denemark <jdenemar@redhat.com> Reviewed-by: NPavel Hrdina <phrdina@redhat.com>
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由 Jiri Denemark 提交于
This is a variant of Haswell with indirect branch prediction protection. The only difference between Haswell and Haswell-IBRS is the added "spec-ctrl" feature. The Haswell-IBRS model in QEMU is a bit different since Haswell got several additional features since we added it in cpu_map.xml: arat, abm, f16c, rdrand, vme, xsaveopt Adding them only to the -IBRS variant would confuse our CPU detection code. Signed-off-by: NJiri Denemark <jdenemar@redhat.com> Reviewed-by: NPavel Hrdina <phrdina@redhat.com>
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由 Jiri Denemark 提交于
This is a variant of Haswell-noTSX with indirect branch prediction protection. The only difference between Haswell-noTSX and Haswell-noTSX-IBRS is the added "spec-ctrl" feature. The Haswell-noTSX-IBRS model in QEMU is a bit different since Haswell-noTSX got several additional features since we added it in cpu_map.xml: arat, abm, f16c, rdrand, vme, xsaveopt Adding them only to the -IBRS variant would confuse our CPU detection code. Signed-off-by: NJiri Denemark <jdenemar@redhat.com> Reviewed-by: NPavel Hrdina <phrdina@redhat.com>
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由 Jiri Denemark 提交于
This is a variant of IvyBridge with indirect branch prediction protection. The only difference between IvyBridge and IvyBridge-IBRS is the added "spec-ctrl" feature. The IvyBridge-IBRS model in QEMU is a bit different since IvyBridge got several additional features since we added it in cpu_map.xml: arat, vme, xsaveopt Adding them only to the -IBRS variant would confuse our CPU detection code. Signed-off-by: NJiri Denemark <jdenemar@redhat.com> Reviewed-by: NPavel Hrdina <phrdina@redhat.com>
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由 Jiri Denemark 提交于
This is a variant of SandyBridge with indirect branch prediction protection. The only difference between SandyBridge and SandyBridge-IBRS is the added "spec-ctrl" feature. The SandyBridge-IBRS model in QEMU is a bit different since SandyBridge got several additional features since we added it in cpu_map.xml: arat, vme, xsaveopt Adding them only to the -IBRS variant would confuse our CPU detection code. Signed-off-by: NJiri Denemark <jdenemar@redhat.com> Reviewed-by: NPavel Hrdina <phrdina@redhat.com>
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由 Jiri Denemark 提交于
This is a variant of Westmere with indirect branch prediction protection. The only difference between Westmere and Westmere-IBRS is the added "spec-ctrl" feature. The Westmere-IBRS model in QEMU is a bit different since Westmere got several additional features since we added it in cpu_map.xml: arat, pclmuldq, vme Adding them only to the -IBRS variant would confuse our CPU detection code. Signed-off-by: NJiri Denemark <jdenemar@redhat.com> Reviewed-by: NPavel Hrdina <phrdina@redhat.com>
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由 Jiri Denemark 提交于
This is a variant of Nehalem with indirect branch prediction protection. The only difference between Nehalem and Nehalem-IBRS is the added "spec-ctrl" feature. Thus the diff matches QEMU, but the new CPU model itself is different. The QEMU's versions of both models contain "vme" feature, while this feature is missing in libvirt's models. While we can't change the existing Nehalem CPU model, we could add "vme" to Nehalem-IBRS to make it similar to QEMU, but doing so would fool our CPU detecting code so that any Nehalem CPU with "vme" feature would be detected as Nehalem-IBRS CPU without spec-ctrl. Not adding "vme" to Nehalem-IBRS is safe as QEMU will just provide the feature anyway, which matches what happens with Nehalem (and new enough machine types). Signed-off-by: NJiri Denemark <jdenemar@redhat.com> Reviewed-by: NPavel Hrdina <phrdina@redhat.com>
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由 Paolo Bonzini 提交于
Added in QEMU commits TBD and TBD. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NJiri Denemark <jdenemar@redhat.com> Reviewed-by: NPavel Hrdina <phrdina@redhat.com>
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- 10 1月, 2018 2 次提交
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由 Jiri Denemark 提交于
When specifying a new CPU model in cpu_map.xml as an extension to an existing model, we forgot to copy the signature (family + model) from the original CPU model. We don't use this way of specifying CPU models, but it's still supported and it becomes useful when someone wants to quickly hack up a CPU model for testing or when creating additional variants of existing models to help with fixing some spectral issues. Signed-off-by: NJiri Denemark <jdenemar@redhat.com> Reviewed-by: NPavel Hrdina <phrdina@redhat.com>
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由 Jiri Denemark 提交于
When translating CPUID data into CPU model + features, the code sometimes uses an unexpected CPU model. There may be several reasons for this, starting with wrong expectations and ending with an actual bug in our code. These debug messages will help determining the reason. Signed-off-by: NJiri Denemark <jdenemar@redhat.com> Reviewed-by: NPavel Hrdina <phrdina@redhat.com>
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- 04 1月, 2018 2 次提交
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由 Paolo Bonzini 提交于
A microcode update can cause the CPUID bits to change; an example from the past was the update that disabled TSX on several Haswell and Broadwell machines. In order to track the x86 microcode version in the QEMU capabilities, we have to fetch it and store it in the host CPU. This also makes the version visible in "virsh capabilities", which is a nice side effect. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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由 Jiri Denemark 提交于
The function will be used to initialize internal data of the x86 CPU driver (including the CPU map). Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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- 03 11月, 2017 2 次提交
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由 Andrea Bolognani 提交于
Right-aligning backslashes when defining macros or using complex commands in Makefiles looks cute, but as soon as any changes is required to the code you end up with either distractingly broken alignment or unnecessarily big diffs where most of the changes are just pushing all backslashes a few characters to one side. Generated using $ git grep -El '[[:blank:]][[:blank:]]\\$' | \ grep -E '*\.([chx]|am|mk)$$' | \ while read f; do \ sed -Ei 's/[[:blank:]]*[[:blank:]]\\$/ \\/g' "$f"; \ done Signed-off-by: NAndrea Bolognani <abologna@redhat.com>
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由 Jiri Denemark 提交于
Linux kernel shows our "cmt" feature as "cqm". Let's mention the name in the cpu_map.xml to make it easier to find. Signed-off-by: NJiri Denemark <jdenemar@redhat.com> Reviewed-by: NJohn Ferlan <jferlan@redhat.com>
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- 18 10月, 2017 1 次提交
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由 Jiri Denemark 提交于
Even though only family and model are used for matching CPUID data with CPU models from cpu_map.xml, stepping is used by x86DataFilterTSX which is supposed to disable TSX on CPU models with broken TSX support. Thus we need to start parsing stepping from QEMU to make sure we don't disable TSX on CPUs which provide working TSX implementation. See the following patch for a real world example of such CPU. Signed-off-by: NJiri Denemark <jdenemar@redhat.com> Reviewed-by: NJohn Ferlan <jferlan@redhat.com>
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- 16 10月, 2017 5 次提交
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由 Jiri Denemark 提交于
When decoding CPUID data to virCPUDef we need to be careful about using a CPU model which cannot be directly used on the current host. Normally, libvirt would notice the features which prevent the model from being usable and it would disable them in the computed virCPUDef, but this won't work in case the definition of the CPU model in QEMU contains more features than what we have in cpu_map.xml. We need to count with the usability blockers we got from QEMU and explicitly disable all of them to make the computed virCPUDef usable. https://bugzilla.redhat.com/show_bug.cgi?id=1464832Signed-off-by: NJiri Denemark <jdenemar@redhat.com> Reviewed-by: NJohn Ferlan <jferlan@redhat.com>
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由 Jiri Denemark 提交于
Signed-off-by: NJiri Denemark <jdenemar@redhat.com> Reviewed-by: NJohn Ferlan <jferlan@redhat.com>
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由 Jiri Denemark 提交于
This internal API can be used to find a specific CPU model in virDomainCapsCPUModels list. Signed-off-by: NJiri Denemark <jdenemar@redhat.com> Reviewed-by: NJohn Ferlan <jferlan@redhat.com>
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由 Jiri Denemark 提交于
The "preferred" parameter is not used by any caller of cpuDecode anymore. It's only used internally in cpu_x86 to implement cpuBaseline. Signed-off-by: NJiri Denemark <jdenemar@redhat.com> Reviewed-by: NJohn Ferlan <jferlan@redhat.com>
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由 Jiri Denemark 提交于
All APIs which expect a list of CPU models supported by hypervisors were switched from char **models and int models to just accept a pointer to virDomainCapsCPUModels object stored in domain capabilities. This avoids the need to transform virDomainCapsCPUModelsPtr into a NULL-terminated list of model names and also allows the various cpu driver APIs to access additional details (such as its usability) about each CPU model. Signed-off-by: NJiri Denemark <jdenemar@redhat.com> Reviewed-by: NJohn Ferlan <jferlan@redhat.com>
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- 12 10月, 2017 1 次提交
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由 Nitesh Konkar 提交于
libvirtd throws unhandled signal 11 on ppc while running virsh cpu-compare with missing model tag in the xml. This patch errors out in such situation. Signed-off-by: NNitesh Konkar <nitkon12@linux.vnet.ibm.com> Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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- 18 9月, 2017 8 次提交
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由 Jiri Denemark 提交于
Available since QEMU 2.10.0 (specifically commit v2.9.0-2233-g53f9a6f45f). Signed-off-by: NJiri Denemark <jdenemar@redhat.com> Reviewed-by: NPavel Hrdina <phrdina@redhat.com>
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由 Jiri Denemark 提交于
The features were added to QEMU by commit v2.4.0-1690-gf7fda28094 as Skylake Server features. Signed-off-by: NJiri Denemark <jdenemar@redhat.com> Reviewed-by: NPavel Hrdina <phrdina@redhat.com>
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由 Jiri Denemark 提交于
The function checks whether all CPU features used in a CPU definition are specified in cpu_map.xml. https://bugzilla.redhat.com/show_bug.cgi?id=1460086Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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由 Jiri Denemark 提交于
Only feature policy is checked on s390, which was previously done in virCPUUpdate, but that's not the correct place for the check once we have virCPUValidateFeatures. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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由 Jiri Denemark 提交于
This new API may be used to check whether all features used in a CPU definition are valid (e.g., libvirt knows their name, their policy is supported, etc.). Leaving this API unimplemented in an arch subdriver means libvirt does not restrict CPU features usable on the associated architectures. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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由 Jiri Denemark 提交于
The implementation of virConnectBaselineCPU may be different for each hypervisor. Thus it shouldn't really be implmented in the cpu code. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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由 Jiri Denemark 提交于
They are logged in cpuBaseline anyway. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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由 Jiri Denemark 提交于
Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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- 07 9月, 2017 1 次提交
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由 Brijesh Singh 提交于
Add a new CPU model called 'EPYC' to model processors from AMD EPYC family (which includes EPYC 76xx,75xx,74xx, 73xx and 72xx). The following features bits have been added/removed compare to Opteron_G5 Added: monitor, movbe, rdrand, mmxext, ffxsr, rdtscp, cr8legacy, osvw, fsgsbase, bmi1, avx2, smep, bmi2, rdseed, adx, smap, clfshopt, sha xsaveopt, xsavec, xgetbv1, arat Removed: xop, fma4, tbm The patch is depend on EPYC CPU model supported introduced in qemu [1] [1] https://patchwork.kernel.org/patch/9902205/ Cc: Tom Lendacky <Thomas.Lendacky@amd.com> Signed-off-by: NBrijesh Singh <brijesh.singh@amd.com> Signed-off-by: NJiri Denemark <jdenemar@redhat.com> Reviewed-by: NPavel Hrdina <phrdina@redhat.com>
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- 04 8月, 2017 1 次提交
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CPUID leaf 7 is sub-leaf aware. Add missing attribute. Signed-off-by: NMarek Marczykowski-Górecki <marmarek@invisiblethingslab.com> Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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- 13 7月, 2017 1 次提交
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由 Jiri Denemark 提交于
CPU features unknown to a hypervisor will not be present in dataDisabled even though the features won't naturally be enabled because. Thus any features we asked for which are not in dataEnabled should be considered disabled. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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- 13 6月, 2017 2 次提交
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由 Jiri Denemark 提交于
Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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由 Marc Hartmayer 提交于
Use ATTRIBUTE_FALLTHROUGH, introduced by commit 5d84f596, instead of comments to indicate that the fall through is an intentional behavior. Signed-off-by: NMarc Hartmayer <mhartmay@linux.vnet.ibm.com> Reviewed-by: NBoris Fiuczynski <fiuczy@linux.vnet.ibm.com> Reviewed-by: NBjoern Walk <bwalk@linux.vnet.ibm.com>
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- 07 6月, 2017 1 次提交
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由 Jiri Denemark 提交于
Signed-off-by: NJiri Denemark <jdenemar@redhat.com> Reviewed-by: NPavel Hrdina <phrdina@redhat.com>
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- 09 5月, 2017 1 次提交
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由 Kothapally Madhu Pavan 提交于
As POWER9 model is not available in cpu_map.xml virsh capabilities donot display the cpu model and vendor details. This patch provides those details
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- 19 4月, 2017 2 次提交
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由 Jiri Denemark 提交于
Sometimes we want to call virCPUGetHost only when it is implemented for a given architecture to avoid logging expected and possibly misleading errors. The new virCPUGetHostIsSupported API may be used to guard such calls to virCPUGetHost. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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由 Jiri Denemark 提交于
Because of the changes done in the previous commit, @host is already a migratable CPU and there's no need to do any additional filtering. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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- 07 4月, 2017 2 次提交
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由 Jiri Denemark 提交于
This reverts commit 5f96b3fe which was pushed accidentally.
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由 Jiri Denemark 提交于
Because of the changes done in the previous commit, @host is already a migratable CPU and there's no need to do any additional filtering. Signed-off-by: NJiri Denemark <jdenemar@redhat.com>
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