1. 26 4月, 2016 1 次提交
    • J
      secret: Create virsecretobj.c and virsecretconf.h · 4652b158
      John Ferlan 提交于
      Move virSecretObj from secret_driver.c to virsecretobj.h
      
      To support being able to create a hashed secrets list, move the
      virSecretObj to virsecretobj.h so that the code can at least find
      the definition.
      
      This should be a temporary situation while the virsecretobj.c code
      is patched in order to support a hashed secret object while still
      having the linked list support in secret_driver.c. Eventually, the
      goal is to move the virSecretObj into virsecretobj.c, although it
      is notable that the existing model from which virSecretObj was
      derived has virDomainObj in src/conf/domain_conf.h and virNetworkObj
      in src/conf/network_conf.h, so virSecretObj wouldn't be unique if
      it were to remain in virsecretobj.h  Still adding accessors to fetch
      and store hashed object data will be the end goal.
      
      Add definitions and infrastucture in virsecretobj.c to create and
      handle a hashed virSecretObj and virSecretObjList including the class,
      object, lock setup, and disposal API's. Nothing will call these yet.
      
      This infrastructure will replace the forward linked list logic
      within the secret_driver, eventually.
      4652b158
  2. 21 4月, 2016 13 次提交
  3. 20 4月, 2016 4 次提交
  4. 19 4月, 2016 1 次提交
  5. 15 4月, 2016 8 次提交
    • O
      storage: add ploop volume type · ee369755
      Olga Krishtal 提交于
      Ploop image consists of directory with two files: ploop image itself,
      called root.hds and DiskDescriptor.xml that contains information about
      ploop device: https://openvz.org/Ploop/format.
      Such volume are difficult to manipulate in terms of existing volume types
      because they are neither a single files nor a directory.
      This patch introduces new volume type - ploop. This volume type is used
      by ploop volume's exclusively.
      Signed-off-by: NOlga Krishtal <okrishtal@virtuozzo.com>
      Signed-off-by: NJán Tomko <jtomko@redhat.com>
      ee369755
    • P
      d6cb0d25
    • L
      conf: new pci controller model pcie-expander-bus · bc07251f
      Laine Stump 提交于
      This controller provides a single PCIe port on a new root. It is
      similar to pci-expander-bus, intended to provide a bus that can be
      associated with a guest-identifiable NUMA node, but is for
      machinetypes with PCIe rather than PCI (e.g. q35-based machinetypes).
      
      Aside from PCIe vs. PCI, the other main difference is that a
      pci-expander-bus has a companion pci-bridge that is automatically
      attached along with it, but pcie-expander-bus has only a single port,
      and that port will only connect to a pcie-root-port, or to a
      pcie-switch-upstream-port. In order for the bus to be of any use in
      the guest, it must have either a pcie-root-port or a
      pcie-switch-upstream-port attached (and one or more
      pcie-switch-downstream-ports attached to the
      pcie-switch-upstream-port).
      bc07251f
    • L
      conf: new pci controller model pci-expander-bus · 52f3d0a4
      Laine Stump 提交于
      This is a standard PCI root bus (not a bridge) that can be added to a
      440fx-based domain. Although it uses a PCI slot, this is *not* how it
      is connected into the PCI bus hierarchy, but is only used for
      control. Each pci-expander-bus provides 32 slots (0-31) that can
      accept hotplug of standard PCI devices.
      
      The usefulness of pci-expander-bus relative to a pci-bridge is that
      the NUMA node of the bus can be specified with the <node> subelement
      of <target>. This gives guest-side visibility to the NUMA node of
      attached devices (presuming that management apps only assign a device
      to a bus that has a NUMA node number matching the node number of the
      device on the host).
      
      Each pci-expander-bus also has a "busNr" attribute. The expander-bus
      itself will take the busNr specified, and all buses that are connected
      to this bus (including the pci-bridge that is automatically added to
      any expander bus of model "pxb" (see the next commit)) will use
      busNr+1, busNr+2, etc, and the pci-root (or the expander-bus with next
      lower busNr) will use bus numbers lower than busNr.
      52f3d0a4
    • L
      conf: utility function to convert PCI controller model into connect type · a0616ee8
      Laine Stump 提交于
      There are two places in qemu_domain_address.c where we have a switch
      statement to convert PCI controller models
      (VIR_DOMAIN_CONTROLLER_MODEL_PCI*) into the connection type flag that
      is matched when looking for an upstream connection for that model of
      controller (VIR_PCI_CONNECT_TYPE_*). This patch makes a utility
      function in conf/domain_addr.c to do that, so that when a new PCI
      controller is added, we only need to add the new model-->connect-type
      in a single place.
      a0616ee8
    • L
      conf/qemu: change the way VIR_PCI_CONNECT_TYPE_* flags work · d1cc4605
      Laine Stump 提交于
      The flags used to determine which devices could be plugged into which
      controllers were quite confusing, as they tried to create classes of
      connections, then put particular devices into possibly multiple
      classes, while sometimes setting multiple flags for the controllers
      themselves. The attempt to have a single flag indicate, e.g. that a
      root-port or a switch-downstream-port could connect was not only
      confusing, it was leading to a situation where it would be impossible
      to specify exactly the right combinations for a new controller.
      
      The solution is for the VIR_PCI_CONNECT_TYPE_* flags to have a 1:1
      correspondence with each type of PCI controller, plus a flag for a PCI
      endpoint device and another for a PCIe endpoint device (the only
      exception to this is that pci-bridge and pcie-expander-bus controllers
      have their upstream connection classified as
      VIR_PCI_CONNECT_TYPE_PCI_DEVICE since they can be plugged into
      *exactly* the same ports as any endpoint device).  Each device then
      has a single flag for connect type (plus the HOTPLUG flag if that
      device can e hotplugged), and each controller sets the CONNECT bits
      for all controllers that can be plugged into it, as well as for either
      type of endpoint device that can be plugged in (and the HOTPLUG flag
      if it can accept hotplugged devices).
      
      With this change, it is *slightly* easier to understand the matching
      of connections (as long as you remember that the flag for a
      device/upstream-facing connection of a controller is the same as that
      device's type, while the flags for a controller's downstream
      connections is the OR of all device types that can be plugged into
      that controller). More importantly, it will be possible to correctly
      specify what can be plugged into a pcie-switch-expander-bus, when
      support for it is added.
      d1cc4605
    • L
      conf: allow use of slot 0 in a dmi-to-pci-bridge · 0d668434
      Laine Stump 提交于
      When support for dmi-to-pci-bridge was added, it was assumed that,
      just as with the pci-root bus, slot 0 was reserved. This is not the
      case - it can be used to connect a device just like any other slot, so
      remove the restriction and update the test cases that auto-assign an
      address on a dmi-to-pci-bridge.
      0d668434
    • L
      conf: use #define instead of literal for highest slot in upstream port · 6d0902a5
      Laine Stump 提交于
      Every other maxSlot was either set to 0 or to
      VIR_PCI_ADDRESS_SLOT_LAST, but this one was for some reason set to the
      literal value 31 (which is the same as VIR_PCI_ADDRESS_SLOT_LAST).
      This makes them all consistent.
      6d0902a5
  6. 13 4月, 2016 13 次提交