提交 76379a6e 编写于 作者: L Laine Stump

conf: new pcie-controller model "pcie-switch-downstream-port"

This controller can be connected only to a port on a
pcie-switch-upstream-port. It provides a single hotpluggable port that
will accept any PCI or PCIe device, as well as any device requiring a
pcie-*-port (the only current example of such a device is the
pcie-switch-upstream-port).
上级 ad1748a1
...@@ -3032,11 +3032,12 @@ ...@@ -3032,11 +3032,12 @@
PCI controllers have an optional <code>model</code> attribute with PCI controllers have an optional <code>model</code> attribute with
possible values <code>pci-root</code>, <code>pcie-root</code>, possible values <code>pci-root</code>, <code>pcie-root</code>,
<code>pcie-root-port</code>, <code>pci-bridge</code>, <code>pcie-root-port</code>, <code>pci-bridge</code>,
<code>dmi-to-pci-bridge</code>, or <code>pcie-switch-upstream-port</code>. <code>dmi-to-pci-bridge</code>, <code>pcie-switch-upstream-port</code>, or
<code>pcie-switch-downstream-port</code>.
(pci-root and pci-bridge <span class="since">since 1.0.5</span>, (pci-root and pci-bridge <span class="since">since 1.0.5</span>,
pcie-root and dmi-to-pci-bridge <span class="since">since pcie-root and dmi-to-pci-bridge <span class="since">since
1.1.2</span>, pcie-root-port and 1.1.2</span>, pcie-root-port, pcie-switch-upstream-port, and
pcie-switch-upstream-port <span class="since">since 1.2.19</span>) pcie-switch-downstream-port <span class="since">since 1.2.19</span>)
The root controllers (<code>pci-root</code> and <code>pcie-root</code>) The root controllers (<code>pci-root</code> and <code>pcie-root</code>)
have an optional <code>pcihole64</code> element specifying how big have an optional <code>pcihole64</code> element specifying how big
(in kilobytes, or in the unit specified by <code>pcihole64</code>'s (in kilobytes, or in the unit specified by <code>pcihole64</code>'s
...@@ -3083,8 +3084,8 @@ ...@@ -3083,8 +3084,8 @@
</dd> </dd>
<dt><code>chassis</code></dt> <dt><code>chassis</code></dt>
<dd> <dd>
pcie-root-port controllers can also have pcie-root-port and pcie-switch-downstream-port controllers can
a <code>chassis</code> attribute in also have a <code>chassis</code> attribute in
the <code>&lt;target&gt;</code> subelement, which is used to the <code>&lt;target&gt;</code> subelement, which is used to
set the controller's "chassis" configuration value, which is set the controller's "chassis" configuration value, which is
visible to the virtual machine. If set, chassis must be visible to the virtual machine. If set, chassis must be
...@@ -3092,8 +3093,9 @@ ...@@ -3092,8 +3093,9 @@
</dd> </dd>
<dt><code>port</code></dt> <dt><code>port</code></dt>
<dd> <dd>
pcie-root-port controllers can also have a <code>port</code> pcie-root-port and pcie-switch-downstream-port controllers can
attribute in the <code>&lt;target&gt;</code> subelement, which also have a <code>port</code> attribute in
the <code>&lt;target&gt;</code> subelement, which
is used to set the controller's "port" configuration value, is used to set the controller's "port" configuration value,
which is visible to the virtual machine. If set, port must be which is visible to the virtual machine. If set, port must be
between 0 and 255. between 0 and 255.
...@@ -3146,14 +3148,32 @@ ...@@ -3146,14 +3148,32 @@
</p> </p>
<p> <p>
Domains with an implicit pcie-root can also add controllers Domains with an implicit pcie-root can also add controllers
with <code>model='pcie-root-port'</code>. This is a simple type of with <code>model='pcie-root-port'</code>,
bridge device that can connect only to one of the 31 slots on <code>model='pcie-switch-upstream-port'</code>,
the pcie-root bus on the upstream side, and makes a single and <code>model='pcie-switch-downstream-port'</code>. pcie-root-port
(PCIe, hotpluggable) port (at slot='0') available on the is a simple type of bridge device that can connect only to one
downstream side. This controller can be used to provide a single of the 31 slots on the pcie-root bus on its upstream side, and
slot to later hotplug a PCIe device (but is not itself makes a single (PCIe, hotpluggable) port available on the
hotpluggable - it must be in the configuration when the domain downstream side (at slot='0'). pcie-root-port can be used to
is started). (<span class="since">since 1.2.19</span>) provide a single slot to later hotplug a PCIe device (but is not
itself hotpluggable - it must be in the configuration when the
domain is started).
(<span class="since">since 1.2.19</span>)
</p>
<p>
pcie-switch-upstream-port is a more flexible (but also more
complex) device that can only plug into a pcie-root-port or
pcie-switch-downstream-port on the upstream side (and only
before the domain is started - it is not hot-pluggable), and
provides 32 ports on the downstream side (slot='0' - slot='31')
that accept only pcie-switch-downstream-port devices; each
pcie-switch-downstream-port device can only plug into a
pcie-switch-upstream-port on its upstream side (again, not
hot-pluggable), and on its downstream side provides a single
hotpluggable pcie port that can accept any standard pci or pcie
device (or another pcie-switch-upstream-port), i.e. identical in
function to a pcie-root-port. (<span class="since">since
1.2.19</span>)
</p> </p>
<pre> <pre>
... ...
......
...@@ -1743,6 +1743,8 @@ ...@@ -1743,6 +1743,8 @@
<value>ioh3420</value> <value>ioh3420</value>
<!-- implementations of 'pcie-switch-upstream-port' --> <!-- implementations of 'pcie-switch-upstream-port' -->
<value>x3130-upstream</value> <value>x3130-upstream</value>
<!-- implementations of 'pcie-switch-downstream-port' -->
<value>xio3130-downstream</value>
</choice> </choice>
</attribute> </attribute>
<empty/> <empty/>
...@@ -1790,6 +1792,7 @@ ...@@ -1790,6 +1792,7 @@
<value>dmi-to-pci-bridge</value> <value>dmi-to-pci-bridge</value>
<value>pcie-root-port</value> <value>pcie-root-port</value>
<value>pcie-switch-upstream-port</value> <value>pcie-switch-upstream-port</value>
<value>pcie-switch-downstream-port</value>
</choice> </choice>
</attribute> </attribute>
</group> </group>
......
...@@ -197,6 +197,7 @@ virDomainPCIAddressBusSetModel(virDomainPCIAddressBusPtr bus, ...@@ -197,6 +197,7 @@ virDomainPCIAddressBusSetModel(virDomainPCIAddressBusPtr bus,
bus->maxSlot = VIR_PCI_ADDRESS_SLOT_LAST; bus->maxSlot = VIR_PCI_ADDRESS_SLOT_LAST;
break; break;
case VIR_DOMAIN_CONTROLLER_MODEL_PCIE_ROOT_PORT: case VIR_DOMAIN_CONTROLLER_MODEL_PCIE_ROOT_PORT:
case VIR_DOMAIN_CONTROLLER_MODEL_PCIE_SWITCH_DOWNSTREAM_PORT:
/* provides one slot which is pcie, can be used by devices /* provides one slot which is pcie, can be used by devices
* that must connect to some type of "pcie-*-port", and * that must connect to some type of "pcie-*-port", and
* is hotpluggable * is hotpluggable
......
...@@ -326,7 +326,8 @@ VIR_ENUM_IMPL(virDomainControllerModelPCI, VIR_DOMAIN_CONTROLLER_MODEL_PCI_LAST, ...@@ -326,7 +326,8 @@ VIR_ENUM_IMPL(virDomainControllerModelPCI, VIR_DOMAIN_CONTROLLER_MODEL_PCI_LAST,
"pci-bridge", "pci-bridge",
"dmi-to-pci-bridge", "dmi-to-pci-bridge",
"pcie-root-port", "pcie-root-port",
"pcie-switch-upstream-port") "pcie-switch-upstream-port",
"pcie-switch-downstream-port")
VIR_ENUM_IMPL(virDomainControllerPCIModelName, VIR_ENUM_IMPL(virDomainControllerPCIModelName,
VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_LAST, VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_LAST,
...@@ -334,7 +335,8 @@ VIR_ENUM_IMPL(virDomainControllerPCIModelName, ...@@ -334,7 +335,8 @@ VIR_ENUM_IMPL(virDomainControllerPCIModelName,
"pci-bridge", "pci-bridge",
"i82801b11-bridge", "i82801b11-bridge",
"ioh3420", "ioh3420",
"x3130-upstream") "x3130-upstream",
"xio3130-downstream")
VIR_ENUM_IMPL(virDomainControllerModelSCSI, VIR_DOMAIN_CONTROLLER_MODEL_SCSI_LAST, VIR_ENUM_IMPL(virDomainControllerModelSCSI, VIR_DOMAIN_CONTROLLER_MODEL_SCSI_LAST,
"auto", "auto",
......
...@@ -754,6 +754,7 @@ typedef enum { ...@@ -754,6 +754,7 @@ typedef enum {
VIR_DOMAIN_CONTROLLER_MODEL_DMI_TO_PCI_BRIDGE, VIR_DOMAIN_CONTROLLER_MODEL_DMI_TO_PCI_BRIDGE,
VIR_DOMAIN_CONTROLLER_MODEL_PCIE_ROOT_PORT, VIR_DOMAIN_CONTROLLER_MODEL_PCIE_ROOT_PORT,
VIR_DOMAIN_CONTROLLER_MODEL_PCIE_SWITCH_UPSTREAM_PORT, VIR_DOMAIN_CONTROLLER_MODEL_PCIE_SWITCH_UPSTREAM_PORT,
VIR_DOMAIN_CONTROLLER_MODEL_PCIE_SWITCH_DOWNSTREAM_PORT,
VIR_DOMAIN_CONTROLLER_MODEL_PCI_LAST VIR_DOMAIN_CONTROLLER_MODEL_PCI_LAST
} virDomainControllerModelPCI; } virDomainControllerModelPCI;
...@@ -764,6 +765,7 @@ typedef enum { ...@@ -764,6 +765,7 @@ typedef enum {
VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_I82801B11_BRIDGE, VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_I82801B11_BRIDGE,
VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_IOH3420, VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_IOH3420,
VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_X3130_UPSTREAM, VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_X3130_UPSTREAM,
VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_XIO3130_DOWNSTREAM,
VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_LAST VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_LAST
} virDomainControllerPCIModelName; } virDomainControllerPCIModelName;
......
...@@ -2307,6 +2307,7 @@ qemuDomainAssignPCIAddresses(virDomainDefPtr def, ...@@ -2307,6 +2307,7 @@ qemuDomainAssignPCIAddresses(virDomainDefPtr def,
if (options->modelName == VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_NONE) if (options->modelName == VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_NONE)
options->modelName = VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_X3130_UPSTREAM; options->modelName = VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_X3130_UPSTREAM;
break; break;
case VIR_DOMAIN_CONTROLLER_MODEL_PCIE_SWITCH_DOWNSTREAM_PORT:
case VIR_DOMAIN_CONTROLLER_MODEL_PCI_ROOT: case VIR_DOMAIN_CONTROLLER_MODEL_PCI_ROOT:
case VIR_DOMAIN_CONTROLLER_MODEL_PCIE_ROOT: case VIR_DOMAIN_CONTROLLER_MODEL_PCIE_ROOT:
case VIR_DOMAIN_CONTROLLER_MODEL_PCI_LAST: case VIR_DOMAIN_CONTROLLER_MODEL_PCI_LAST:
......
<domain type='qemu'>
<name>q35-test</name>
<uuid>11dbdcdd-4c3b-482b-8903-9bdb8c0a2774</uuid>
<memory unit='KiB'>2097152</memory>
<currentMemory unit='KiB'>2097152</currentMemory>
<vcpu placement='static' cpuset='0-1'>2</vcpu>
<os>
<type arch='x86_64' machine='q35'>hvm</type>
<boot dev='hd'/>
</os>
<clock offset='utc'/>
<on_poweroff>destroy</on_poweroff>
<on_reboot>restart</on_reboot>
<on_crash>destroy</on_crash>
<devices>
<emulator>/usr/libexec/qemu-kvm</emulator>
<disk type='block' device='disk'>
<source dev='/dev/HostVG/QEMUGuest1'/>
<target dev='sda' bus='sata'/>
<address type='drive' controller='0' bus='0' target='0' unit='0'/>
</disk>
<controller type='pci' index='0' model='pcie-root'/>
<controller type='pci' index='1' model='dmi-to-pci-bridge'/>
<controller type='pci' index='2' model='pci-bridge'/>
<controller type='pci' index='3' model='pcie-root-port'/>
<controller type='pci' index='4' model='pcie-switch-upstream-port'/>
<controller type='pci' index='5' model='pcie-switch-downstream-port'/>
<controller type='pci' index='6' model='pcie-switch-downstream-port'/>
<controller type='pci' index='7' model='pcie-switch-downstream-port'/>
<controller type='pci' index='8' model='pcie-switch-downstream-port'>
<model name='xio3130-downstream'/>
<target chassis='30' port='0x27'/>
</controller>
<controller type='pci' index='9' model='pcie-switch-upstream-port'/>
<controller type='pci' index='10' model='pcie-switch-downstream-port'/>
<controller type='pci' index='11' model='pcie-switch-downstream-port'/>
<controller type='pci' index='12' model='pcie-switch-downstream-port'/>
<controller type='sata' index='0'/>
<video>
<model type='qxl' ram='65536' vram='32768' vgamem='8192' heads='1'/>
</video>
<memballoon model='none'/>
</devices>
</domain>
...@@ -570,6 +570,7 @@ mymain(void) ...@@ -570,6 +570,7 @@ mymain(void)
DO_TEST("pcie-root-port"); DO_TEST("pcie-root-port");
DO_TEST("pcie-root-port-too-many"); DO_TEST("pcie-root-port-too-many");
DO_TEST("pcie-switch-upstream-port"); DO_TEST("pcie-switch-upstream-port");
DO_TEST("pcie-switch-downstream-port");
DO_TEST("hostdev-scsi-lsi"); DO_TEST("hostdev-scsi-lsi");
DO_TEST("hostdev-scsi-virtio-scsi"); DO_TEST("hostdev-scsi-virtio-scsi");
......
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