提交 528356f4 编写于 作者: Y Yingle Hou 提交者: Daniel P. Berrangé

cpu: Remove the verification conditions of the model in the x86 signatures

The x86ModelParseSignatures function makes an assumption that CPU signature
model equals 0 as an invalid case. While in Hygon processor definition, A1
version (model 0, stepping 1) is mass production version, to support Hygon
Dhyana A1 version, we have removed CPU signature model zero checking condition.
Reviewed-by: NDaniel P. Berrangé <berrange@redhat.com>
Signed-off-by: NYingle Hou <houyingle@hygon.cn>
上级 f411b7ef
...@@ -1418,7 +1418,7 @@ x86ModelParseSignatures(virCPUx86ModelPtr model, ...@@ -1418,7 +1418,7 @@ x86ModelParseSignatures(virCPUx86ModelPtr model,
} }
rc = virXPathUInt("string(@model)", ctxt, &sigModel); rc = virXPathUInt("string(@model)", ctxt, &sigModel);
if (rc < 0 || sigModel == 0) { if (rc < 0) {
virReportError(VIR_ERR_INTERNAL_ERROR, virReportError(VIR_ERR_INTERNAL_ERROR,
_("Invalid CPU signature model in model %s"), _("Invalid CPU signature model in model %s"),
model->name); model->name);
......
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册