- 25 5月, 2019 19 次提交
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由 Evan Quan 提交于
Support ppfeatures sysfs interface on Vega20 sw smu routine. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
smu_get_clk_info_from_vbios() was called repeatedly. It seems a merge error. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
There is already sw smu check on IP block adding. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
Update Vega10 ACG Avfs GB parameters. Signed-off-by: NEvan Quan <evan.quan@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
On OD reset, the clock tables in SMU need to be reset to default. Signed-off-by: NEvan Quan <evan.quan@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
Update Vega10 top performance level power state accordingly on OD. Signed-off-by: NEvan Quan <evan.quan@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
No need to enable or disable AVFS if it's already in wanted state. Signed-off-by: NEvan Quan <evan.quan@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
With user specified voltage(DPMTABLE_OD_UPDATE_VDDC), the AVFS will be disabled. However, the buggy code makes this actually not working as expected. - V2: clear all OD flags excpet DPMTABLE_OD_UPDATE_VDDC Signed-off-by: NEvan Quan <evan.quan@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
This may affects the Vega10 MCLK OD functionality. Signed-off-by: NEvan Quan <evan.quan@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
Enable realtime memory utilization report on SMU7 asics. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
Enable realtime memory utilization report on Vega12. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
Enable realtime memory utilization report on Vega20. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Kevin Wang 提交于
add this helper function to get smc version. Signed-off-by: NKevin Wang <kevin1.wang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
Provide the real sensor information for current gpu activity. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
Provide the real sensor information for current power. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
Two new hwmon interfaces(temp2_input and temp3_input) are added. They are supported on SOC15 dGPUs only. - V2: correct thermal sensor output Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
That should provide some necessary sensor information. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
These new interfaces(temp1_emergency, temp2_emergency, temp3_emergency) are supported on SOC15 dGPUs only. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
These new interfaces(temp2_crit, temp2_crit_hyst, temp3_crit, temp3_crit_hyst) are supported on SOC15 dGPUs only. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 30 4月, 2019 2 次提交
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由 Evan Quan 提交于
Power down the engine also along with disabling its DPM functionality. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 hersen wu 提交于
[WHY] clock unit mis-match between caller DC and SMU interface. dc pass lock in mhz. the same unit as smu. no covert is needed. [HOW] remove covert_10k_to_mhz in smu interface this fixes corruption issue with 4k @60 display and stutter mode enable Reviewed-by: NKenneth Feng <kenneth.feng@amd.com> Signed-off-by: Nhersen wu <hersenxs.wu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 24 4月, 2019 2 次提交
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由 Chengming Gui 提交于
enable UMDPSTATE support to force performance level for raven2. v2: squash in warning fix (Alex) Signed-off-by: NChengming Gui <Jack.Gui@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Chengming Gui 提交于
The power profile allows the user to adjust the power state heuristics for clock level transitions. v2: squash in warning fix (Alex) Reviewed-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NChengming Gui <Jack.Gui@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 20 4月, 2019 1 次提交
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由 shaoyunl 提交于
Send message with parameter to SMC to set xgmi pstate Signed-off-by: Nshaoyunl <shaoyun.liu@amd.com> Reviewed-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 13 4月, 2019 1 次提交
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由 shaoyunl 提交于
XGMI pstate is controlled by SMU, driver need this interface to communicate with SMU Signed-off-by: Nshaoyunl <shaoyun.liu@amd.com> Reviewed-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 11 4月, 2019 2 次提交
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由 Kevin Wang 提交于
use smu_update_table_with_arg to replace old code logic Signed-off-by: NKevin Wang <kevin1.wang@amd.com> Reviewed-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Kevin Wang 提交于
in fact, the firmware need 2 parameter: 1.table_id, 2.XferArg so change the function interface to match the firmware code Signed-off-by: NKevin Wang <kevin1.wang@amd.com> Reviewed-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 04 4月, 2019 1 次提交
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由 Evan Quan 提交于
Need to check for invalid profile mode settings before determining to switch to that. Signed-off-by: NEvan Quan <evan.quan@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 03 4月, 2019 3 次提交
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由 Kent Russell 提交于
Vega20 stores a CUSTOM profile on the GPU, but it may not be valid. Add a bool to vega20_hwmgr to determine whether or not a valid CUSTOM profile has been set, and use that to check when a user requests switching to the CUSTOM profile without passing in any arguments. Then if the CUSTOM profile has been set already, we can switch to it without providing the parameters again Signed-off-by: NKent Russell <kent.russell@amd.com> Reviewed-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Kent Russell 提交于
Don't return an error if the CUSTOM profile is selected, just apply it with the values saved to the GPU. But ensure that we zero out the copy stored in adev to ensure that a valid profile has been submitted at some point first v2: Fix comment that wasn't updated from previous patch Signed-off-by: NKent Russell <kent.russell@amd.com> Reviewed-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Kent Russell 提交于
Allow changing to the CUSTOM profile without requiring the parameters being passed in each time. Store the values in the smu7_profiling table since it's defined here anyways v2: Add check that CUSTOM was previously set Signed-off-by: NKent Russell <kent.russell@amd.com> Reviewed-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 02 4月, 2019 1 次提交
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由 Alex Deucher 提交于
Fixes warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] on 32 bit platforms. Reviewed-by: NTao Zhou <tao.zhou1@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 28 3月, 2019 4 次提交
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由 Evan Quan 提交于
No need to update current profile mode if the new profile mode does not take effect in fact. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NKent Russell <kent.russell@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
If DAL requires to force MCLK high, the FCLK will be forced to high also. Signed-off-by: NEvan Quan <evan.quan@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
Avoid left shift overflow. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
It's OK to have this feature bit with old SMU firmwares. But the feature should be disabled on them. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 22 3月, 2019 3 次提交
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由 Dan Carpenter 提交于
We already unlocked a few lines earlier so this code unlocks twice on the success path. Fixes: 289921b0 ("drm/amd/powerplay: implement sysfs of pp_table for smu11 (v2)") Reviewed-by: NHuang Rui <ray.huang@amd.com> Reviewed-by: NKevin Wang <kevin1.wang@amd.com> Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Dan Carpenter 提交于
The > should be >= so that we don't read one element beyond the end of the vega20_message_map[] array. Fixes: 78031c2c ("drm/amd/powerplay: implement smu vega20_message_map for vega20") Reviewed-by: NKevin Wang <kevin1.wang@amd.com> Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Dan Carpenter 提交于
The "size" variable is unsigned. We never pass invalid sizes to this function and we already used it as an array offset earlier so it's too late to check here. Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 21 3月, 2019 1 次提交
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由 Huang Rui 提交于
This patch enables gfxoff and stutter mode again, since we take more testing on raven series. For raven2 and picasso, we can enable it directly. And for raven, we need check the RLC/SMC ucode version cannot be less than #531/0x1e45. v2: add smc version checking for raven. Signed-off-by: NHuang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1) Tested-by: Likun Gao <Likun.Gao@amd.com> (v2) Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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