- 01 11月, 2019 1 次提交
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由 Jiaxun Yang 提交于
CPU_LOONGSON2 -> CPU_LOONGSON2EF CPU_LOONGSON3 -> CPU_LOONGSON64 As newer loongson-2 products (2G/2H/2K1000) can share kernel implementation with loongson-3 while 2E/2F are less similar with other LOONGSON64 products. Signed-off-by: NJiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: NPaul Burton <paulburton@kernel.org> Cc: linux-mips@vger.kernel.org Cc: chenhc@lemote.com Cc: paul.burton@mips.com
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- 29 10月, 2019 2 次提交
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由 Chris Packham 提交于
This driver supports the Chip Common A GPIO controller present on a number of Broadcom switch ASICs with integrated SoCs. The controller is similar to the pinctrl-nsp-gpio and pinctrl-iproc-gpio blocks but different enough that a separate driver is required. This has been ported from Broadcom's XLDK 5.0.3 retaining only the CCA support (pinctrl-iproc-gpio covers CCB). Signed-off-by: NChris Packham <chris.packham@alliedtelesis.co.nz> Link: https://lore.kernel.org/r/20191024202703.8017-3-chris.packham@alliedtelesis.co.nzAcked-by: NScott Branden <scott.branden@broadcom.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Manivannan Sadhasivam 提交于
Add support for GPIO controller from RDA Micro. This GPIO controller is an in house IP, developed by RDA Micro (now Unisoc) for the use in RDA88* series of SoCs. There are multiple GPIO ports present in all SoCs, each capable of addressing 32 GPIOs. But only first 8 pins have the interrupt capability. Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20191021064413.19840-4-manivannan.sadhasivam@linaro.orgReviewed-by: NBartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 09 10月, 2019 1 次提交
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由 Jonathan Neuschäfer 提交于
Let's declutter Documentation/driver-api a bit. Signed-off-by: NJonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20191004164059.10397-1-j.neuschaefer@gmx.netSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 05 10月, 2019 1 次提交
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由 Thierry Reding 提交于
The GPIO controller doesn't have any controls to enable the system to wake up from low power states based on activity on GPIO pins. An extra hardware block that is part of the power management controller (PMC) contains these controls. In order for the GPIO controller to be able to cooperate with the PMC, obtain a reference to the PMC's IRQ domain and make it a parent to the GPIO controller's IRQ domain. This way the PMC gets an opportunity to program the additional registers required to enable wakeup sources on suspend. Based on additional work by Bitan Biswas <bbiswas@nvidia.com>. Signed-off-by: NThierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20191002144502.156393-2-thierry.reding@gmail.comSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 01 10月, 2019 1 次提交
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由 Linus Walleij 提交于
This renames the "gpio-aspeed" driver to conform with other GPIO drivers as "gpio-aspeed-sgpio.c". All GPIO drivers should start with the string "gpio-" no special exceptions. Also the Kconfig and Makefile entries should normally go with the driver but I missed this in my review, sorry for mistake. "CONFIG_GPIO_ASPEED_SGPIO" is used to activate this driver. Cc: Hongwei Zhang <hongweiz@ami.com> Fixes: 7db47faa ("gpio: aspeed: Add SGPIO driver") Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NAndrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20190927114833.12551-1-linus.walleij@linaro.org
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- 20 8月, 2019 1 次提交
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由 Uwe Kleine-König 提交于
config GPIO_MOCKUP is defined in a big if GPIOLIB ... endif block so it doesn't need to depend explicitly on GPIOLIB. Signed-off-by: NUwe Kleine-König <uwe@kleine-koenig.org> Link: https://lore.kernel.org/r/20190725131002.14597-1-uwe@kleine-koenig.orgSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 16 8月, 2019 1 次提交
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由 Arnd Bergmann 提交于
The driver uses hardwire MMIO addresses instead of the data that is passed in device tree. Change it over to only hardcode the register offset values and allow compile-testing. Link: https://lore.kernel.org/r/20190809144043.476786-6-arnd@arndb.deAcked-by: NSylvain Lemieux <slemieux.tyco@gmail.com> Tested-by: NSylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 15 8月, 2019 2 次提交
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由 Linus Walleij 提交于
Use the new infrastructure for hierarchical irqchips in gpiolib. The major part of the rewrite was dues to the fact that the driver was passing around a per-irq pointer to struct thunderx_line * data container, and the central handlers will assume struct gpio_chip * to be passed to we need to use the hwirq as index to look up the struct thunderx_line * for each IRQ. The pushing and pop:ing of the irqdomain was confusing because I've never seen this before, but I tried to replicate it as best I could. I have no chance to test or debug this so I need help. Cc: David Daney <david.daney@cavium.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Brian Masney <masneyb@onstation.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20190808123242.5359-4-linus.walleij@linaro.org
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由 Linus Walleij 提交于
This modifies the IXP4xx driver to use the new helpers to handle the remapping of parent to child hardware irqs in the gpiolib core. This pulls the majority of the code out of the driver and use the generic code in gpiolib. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Lina Iyer <ilina@codeaurora.org> Cc: Jon Hunter <jonathanh@nvidia.com> Cc: Sowjanya Komatineni <skomatineni@nvidia.com> Cc: Bitan Biswas <bbiswas@nvidia.com> Cc: linux-tegra@vger.kernel.org Cc: Thierry Reding <treding@nvidia.com> Cc: Brian Masney <masneyb@onstation.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20190808123242.5359-2-linus.walleij@linaro.org
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- 14 8月, 2019 2 次提交
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由 Arnd Bergmann 提交于
There are three families of IOP machines we support in Linux: iop32x (which includes EP80219), iop33x and iop13xx (aka IOP34x aka WP8134x). All products we support in the kernel are based on the first of these, iop32x, the other families only ever supported the Intel reference boards but no actual machine anyone could ever buy. While one could clearly make them all three work in a single kernel with some work, this takes the easy way out, removing the later two platforms entirely, under the assumption that there are no remaining users. Earlier versions of OpenWRT and Debian both had support for iop32x but not the others, and they both dropped iop32x as well in their 2015 releases. Link: https://lore.kernel.org/r/20190809163334.489360-1-arnd@arndb.deSigned-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: Wolfram Sang <wsa@the-dreams.de> # for I2C parts Acked-by: NDan Williams <dan.j.williams@intel.com> Acked-by: NMartin Michlmayr <tbm@cyrius.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Marek Behún 提交于
This adds support for interpreting the input and output bits of one device on Moxtet bus as GPIOs. This is needed for example by the SFP cage module of Turris Mox. Link: https://lore.kernel.org/r/20190812161118.21476-5-marek.behun@nic.czSigned-off-by: NMarek Behún <marek.behun@nic.cz> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 12 8月, 2019 1 次提交
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由 Arnd Bergmann 提交于
The driver uses hardwire MMIO addresses instead of the data that is passed in device tree. Change it over to only hardcode the register offset values and allow compile-testing. Acked-by: NSylvain Lemieux <slemieux.tyco@gmail.com> Tested-by: NSylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
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- 15 7月, 2019 1 次提交
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由 Mauro Carvalho Chehab 提交于
There are lots of documents under Documentation/*.txt and a few other orphan documents elsehwere that belong to the driver-API book. Move them to their right place. Reviewed-by: Cornelia Huck <cohuck@redhat.com> # vfio-related parts Acked-by: Logan Gunthorpe <logang@deltatee.com> # switchtec Signed-off-by: NMauro Carvalho Chehab <mchehab+samsung@kernel.org>
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- 04 7月, 2019 1 次提交
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由 Martin Blumenstingl 提交于
Enable compile-testing of the stp-xway GPIO driver now that it does not depend on any architecture specific includes anymore. Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://lore.kernel.org/r/20190702223248.31934-5-martin.blumenstingl@googlemail.comSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 27 6月, 2019 1 次提交
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由 Matti Vaittinen 提交于
ROHM BD70528 PMIC has 4 GPIO pins. Allow them to be controlled by GPIO framework. IRQs are handled by regmap-irq and GPIO driver is not aware of the irq usage. Signed-off-by: NMatti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NLee Jones <lee.jones@linaro.org>
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- 10 6月, 2019 1 次提交
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由 Robert Hancock 提交于
This driver was using the OF GPIO helper API, but barely used any of its features and it cost more code than it saved. Also, the OF GPIO code is now deprecated. Convert it to use a more standard setup and use devm APIs for initialization to avoid the need for a remove function. Our rationale for this change is that we are using the Xilinx GPIO with resources injected using the MFD core rather than on the device tree itself. Using platform rather than OF-specific resources allows this to work for free. Signed-off-by: NRobert Hancock <hancock@sedsystems.ca> Acked-by: NMichal Simek <michal.simek@xilinx.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 08 6月, 2019 1 次提交
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由 Keerthy 提交于
Add K3 dependencies to enable the driver on K3 platforms. Signed-off-by: NKeerthy <j-keerthy@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 28 5月, 2019 1 次提交
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由 Linus Walleij 提交于
This feature is deprecated, it is helpful to inform users about this. I'm resisting the temptation to add "depends on BROKEN" to this, but saving that for later. Reviewed-by: NBartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 24 5月, 2019 1 次提交
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由 Randy Dunlap 提交于
The gpio-adp5588 driver uses interfaces that are provided by GPIOLIB_IRQCHIP, so select that symbol in its Kconfig entry. Fixes these build errors: ../drivers/gpio/gpio-adp5588.c: In function ‘adp5588_irq_handler’: ../drivers/gpio/gpio-adp5588.c:266:26: error: ‘struct gpio_chip’ has no member named ‘irq’ dev->gpio_chip.irq.domain, gpio)); ^ ../drivers/gpio/gpio-adp5588.c: In function ‘adp5588_irq_setup’: ../drivers/gpio/gpio-adp5588.c:298:2: error: implicit declaration of function ‘gpiochip_irqchip_add_nested’ [-Werror=implicit-function-declaration] ret = gpiochip_irqchip_add_nested(&dev->gpio_chip, ^ ../drivers/gpio/gpio-adp5588.c:307:2: error: implicit declaration of function ‘gpiochip_set_nested_irqchip’ [-Werror=implicit-function-declaration] gpiochip_set_nested_irqchip(&dev->gpio_chip, ^ Fixes: 459773ae ("gpio: adp5588-gpio: support interrupt controller") Reported-by: Nkbuild test robot <lkp@intel.com> Signed-off-by: NRandy Dunlap <rdunlap@infradead.org> Cc: linux-gpio@vger.kernel.org Reviewed-by: NBartosz Golaszewski <bgolaszewski@baylibre.com> Acked-by: NMichael Hennerich <michael.hennerich@analog.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 21 5月, 2019 1 次提交
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由 Thomas Gleixner 提交于
Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 08 5月, 2019 1 次提交
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由 Bartosz Golaszewski 提交于
Add GPIO support for max77650 mfd device. This PMIC exposes a single GPIO line. Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NLee Jones <lee.jones@linaro.org>
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- 23 4月, 2019 1 次提交
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由 Linus Walleij 提交于
This adds a driver for the IXP4xx GPIO block found in the Intel XScale IXP4xx systems. The GPIO part of this block is pretty straight-forward and just uses the generic MMIO GPIO library. The irqchip side of this driver is hierarchical where the main irqchip will receive a processed level trigger in response to the edge detector of the GPIO block, so for this reason the v2 version of the irqdomain API is used (as well as in the parent IXP4xx irqchip) and masking, unmasking and setting up the type on IRQ happens on several levels. Currently this GPIO controller will grab the parent irqdomain using a special function, but as the platform move toward device tree probing, this will not be needed: we can just look up the parent irqdomain from the device tree. Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 19 4月, 2019 1 次提交
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由 David Howells 提交于
Make the anon_inodes facility unconditional so that it can be used by core VFS code and pidfd code. Signed-off-by: NDavid Howells <dhowells@redhat.com> Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk> [christian@brauner.io: adapt commit message to mention pidfds] Signed-off-by: NChristian Brauner <christian@brauner.io>
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- 05 4月, 2019 1 次提交
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Align the Kconfig formatting with the vast majority of the Kconfig files, to make it a bit easier / more pleasant to read ;-) Signed-off-by: NEnrico Weigelt, metux IT consult <info@metux.net> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 27 3月, 2019 2 次提交
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由 Shravan Kumar Ramani 提交于
Fixes a compile test failure Fixes: c78c42d7 ("gpio: add driver for Mellanox BlueField GPIO controller") Signed-off-by: NShravan Kumar Ramani <sramani@mellanox.com> Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
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由 Shravan Kumar Ramani 提交于
This patch adds support for the GPIO controller used by Mellanox BlueField SOCs. Reviewed-by: NDavid Woods <dwoods@mellanox.com> Signed-off-by: NShravan Kumar Ramani <sramani@mellanox.com> Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
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- 22 3月, 2019 2 次提交
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由 Bartosz Golaszewski 提交于
The testing driver doesn't really depend on HAS_IOMEM. We may want to build it for testing purposes on architectures not supporting IOMEM, for example: on user-mode linux. Move it out of the "Memory Mapped GPIO drivers" section. Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
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由 Bartosz Golaszewski 提交于
The testing module doesn't need GPIO irqchip nor does it depend on sysfs. Remove unnecessary dependencies from Kconfig. Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
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- 21 3月, 2019 1 次提交
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由 David Howells 提交于
Make the anon_inodes facility unconditional so that it can be used by core VFS code. Signed-off-by: NDavid Howells <dhowells@redhat.com> Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
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- 23 2月, 2019 1 次提交
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GPIO platform driver for the AMD G-series PCH (eg. on GX-412TC) This driver doesn't registers itself automatically, as it needs to be provided with platform specific configuration, provided by some board driver setup code. Didn't implement oftree probing yet, as it's rarely found on x86. Cc: linux-gpio@vger.kernel.org Cc: linus.walleij@linaro.org Cc: bgolaszewski@baylibre.com Cc: dvhart@infradead.org Cc: platform-driver-x86@vger.kernel.org Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NEnrico Weigelt, metux IT consult <info@metux.net> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 09 2月, 2019 1 次提交
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由 Linus Walleij 提交于
This adds a driver for Gateworks PLD GPIO, that exist in two instances on the Gateworks Cambria GW2358-4 router platform at least. Cc: Imre Kaloz <kaloz@openwrt.org> Cc: Tim Harvey <tharvey@gateworks.com> Reviewed-by: NBartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 28 1月, 2019 1 次提交
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由 Andrew Lunn 提交于
Some TQ-Systems ComExpress modules contain an IO controller with 8 GPIO lines. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 21 1月, 2019 1 次提交
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由 Jonathan Neuschäfer 提交于
This patch implements level-triggered IRQs in the Hollywood GPIO driver. Edge triggered interrupts are not supported in this GPIO controller, so I moved their emulation into a separate patch. Signed-off-by: NJonathan Neuschäfer <j.neuschaefer@gmx.net> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 22 12月, 2018 1 次提交
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由 Linus Walleij 提交于
This driver clearly needs OF_GPIO so depend on it. Fixes a build error. Cc: Andrei Stefanescu <Andrei.Stefanescu@microchip.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 21 12月, 2018 2 次提交
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由 Jan Kotas 提交于
This patch adds a driver for Cadence GPIO controller. It can be enabled with GPIO_CADENCE Kconfig option. It uses generic GPIO infrastructure and works as an interrupt controller. At the moment it only supports level sensitive irqs. Signed-off-by: NJan Kotas <jank@cadence.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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PIOBU pins do not lose their voltage during Backup/Self-refresh. This patch adds a simple GPIO controller for them and a maintainer for the driver. This driver adds support for using the pins as GPIO offering the possibility to read/set the voltage. Signed-off-by: NAndrei Stefanescu <andrei.stefanescu@microchip.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 17 12月, 2018 1 次提交
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由 Marek Vasut 提交于
Select REGMAP_I2C in Kconfig, since the driver now depends on regmap and this was missing, thus breaking build on various systems. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 07 12月, 2018 1 次提交
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由 Vladimir Zapolskiy 提交于
The change adds support of LPC18xx/LPC43xx GPIO pin interrupt controller block within SoC GPIO controller. The new interrupt controller driver allows to configure and capture edge or level interrupts on 8 arbitrary selectedinput GPIO pins, and lift the signals to be reported as NVIC rising edge interrupts. Configuration of a particular GPIO pin to serve as interrupt and its mapping to an interrupt on NVIC is done by SCU pin controller, for more details see description of 'nxp,gpio-pin-interrupt' device tree property of a GPIO pin [1]. From LPC18xx and LPC43xx User Manuals the GPIO controller consists of the following blocks: * GPIO pin interrupt block at 0x40087000, this change adds its support, * GPIO GROUP0 interrupt block at 0x40088000, * GPIO GROUP1 interrupt block at 0x40089000, * GPIO port block at 0x400F4000, it is supported by the original driver. While all 4 sub-controller blocks have their own I/O addresses, moreover all 3 interrupt blocks are APB0 peripherals and high-speed GPIO block is an AHB slave, according to the hardware manual the GPIO controller is seen as a single block, and 4 sub-controllers have the shared reset signal RGU #28 and clock to register interface CLK_CPU_GPIO on CCU1. Likely support of two GPIO group interrupt blocks won't be added in short term, because the mechanism to mask several interrupt sources is not well defined. [1] Documentation/devicetree/bindings/pinctrl/nxp,lpc1850-scu.txt Signed-off-by: NVladimir Zapolskiy <vz@mleia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 15 10月, 2018 1 次提交
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由 Randy Dunlap 提交于
Fix kconfig warning for GPIO_SNPS_CREG: WARNING: unmet direct dependencies detected for OF_GPIO Depends on [n]: GPIOLIB [=y] && OF [=n] && HAS_IOMEM [=y] Selected by [y]: - GPIO_SNPS_CREG [=y] && GPIOLIB [=y] && HAS_IOMEM [=y] && (ARC || COMPILE_TEST [=y]) Drivers in drivers/gpio/Kconfig depend on OF_GPIO, not select it. This prevents attempting to build when OF is not enabled. Signed-off-by: NRandy Dunlap <rdunlap@infradead.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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