1. 26 3月, 2008 15 次提交
  2. 13 3月, 2008 6 次提交
  3. 12 3月, 2008 14 次提交
  4. 11 3月, 2008 5 次提交
    • J
      [POWERPC] spufs: fix rescheduling of non-runnable contexts · c368392a
      Jeremy Kerr 提交于
      At present, we can hit the BUG_ON in __spu_update_sched_info by reading
      the regs file of a context between two calls to spu_run. The
      spu_release_saved called by spufs_regs_read() is resulting in the (now
      non-runnable) context being placed back on the run queue, so the next
      call to spu_run ends up in the bug condition.
      
      This change uses the SPU_SCHED_SPU_RUN flag to only reschedule a context
      if it's still in spu_run().
      Signed-off-by: NJeremy Kerr <jk@ozlabs.org>
      c368392a
    • J
      [POWERPC] spufs: don't (ab)use SCHED_IDLE · ce7c191b
      Jeremy Kerr 提交于
      commit 4ef11014 introduced a usage of SCHED_IDLE to detect when
      a context is within spu_run.
      
      Instead of SCHED_IDLE (which has other meaning), add a flag to
      sched_flags to tell if a context should be running.
      Signed-off-by: NJeremy Kerr <jk@ozlabs.org>
      ce7c191b
    • I
      fix BIOS PCI config cycle buglet causing ACPI boot regression · f5dbb55b
      Ingo Molnar 提交于
      I figured out another ACPI related regression today.
      
      randconfig testing triggered an early boot-time hang on a laptop of mine
      (32-bit x86, config attached) - the screen was scrolling ACPI AML
      exceptions [with no serial port and no early debugging available].
      
      v2.6.24 works fine on that laptop with the same .config, so after a few
      hours of bisection (had to restart it 3 times - other regressions
      interacted), it honed in on this commit:
      
      | 10270d48 is first bad commit
      |
      | Author: Linus Torvalds <torvalds@woody.linux-foundation.org>
      | Date:   Wed Feb 13 09:56:14 2008 -0800
      |
      |     acpi: fix acpi_os_read_pci_configuration() misuse of raw_pci_read()
      
      reverting this commit ontop of -rc5 gave a correctly booting kernel.
      
      But this commit fixes a real bug so the real question is, why did it
      break the bootup?
      
      After quite some head-scratching, the following change stood out:
      
      -                               pci_id->bus = tu8;
      +                               pci_id->bus = val;
      
      pci_id->bus is defined as u16:
      
         struct acpi_pci_id {
                 u16 segment;
                 u16 bus;
         ...
      
      and 'tu8' changed from u8 to u32. So previously we'd unconditionally
      mask the return value of acpi_os_read_pci_configuration()
      (raw_pci_read()) to 8 bits, but now we just trust whatever comes back
      from the PCI access routines and only crop it to 16 bits.
      
      But if the high 8 bits of that result contains any noise then we'll
      write that into ACPI's PCI ID descriptor and confuse the heck out of the
      rest of ACPI.
      
      So lets check the PCI-BIOS code on that theory. We have this codepath
      for 8-bit accesses (arch/x86/pci/pcbios.c:pci_bios_read()):
      
              switch (len) {
              case 1:
                      __asm__("lcall *(%%esi); cld\n\t"
                              "jc 1f\n\t"
                              "xor %%ah, %%ah\n"
                              "1:"
                              : "=c" (*value),
                                "=a" (result)
                              : "1" (PCIBIOS_READ_CONFIG_BYTE),
                                "b" (bx),
                                "D" ((long)reg),
                                "S" (&pci_indirect));
      
      Aha! The "=a" output constraint puts the full 32 bits of EAX into
      *value. But if the BIOS's routines set any of the high bits to nonzero,
      we'll return a value with more set in it than intended.
      
      The other, more common PCI access methods (v1 and v2 PCI reads) clear
      out the high bits already, for example pci_conf1_read() does:
      
              switch (len) {
              case 1:
                      *value = inb(0xCFC + (reg & 3));
      
      which explicitly converts the return byte up to 32 bits and zero-extends
      it.
      
      So zero-extending the result in the PCI-BIOS read routine fixes the
      regression on my laptop. ( It might fix some other long-standing issues
      we had with PCI-BIOS during the past decade ... ) Both 8-bit and 16-bit
      accesses were buggy.
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      f5dbb55b
    • R
      lguest: Revert 1ce70c4f, fix real problem. · 4357bd94
      Rusty Russell 提交于
      Ahmed managed to crash the Host in release_pgd(), which cannot be a Guest
      bug, and indeed it wasn't.
      
      The bug was that handing a 0 as the address of the toplevel page table
      being manipulated can cause the lookup code in find_pgdir() to return
      an uninitialized cache entry (we shadow up to 4 top level page tables
      for each Guest).
      
      Commit 37cc8d7f introduced this
      behaviour in the Guest, uncovering the bug.
      
      The patch which he submitted (which removed the /4 from the index
      calculation) simply ensured that these high-indexed entries hit the
      early exit path of guest_set_pmd().  But you get lots of segfaults in
      guest userspace as the PMDs aren't being updated.
      Signed-off-by: NRusty Russell <rusty@rustcorp.com.au>
      4357bd94
    • R
      lguest: Sanitize the lguest clock. · 3fabc55f
      Rusty Russell 提交于
      Now the TSC code handles a zero return from calculate_cpu_khz(),
      lguest can simply pass through the value it gets from the Host: if
      non-zero, all the normal TSC code applies.
      
      Otherwise (or if the Host really doesn't support TSC), the clocksource
      code will fall back to the slower but reasonable lguest clock.
      Signed-off-by: NRusty Russell <rusty@rustcorp.com.au>
      3fabc55f