1. 05 2月, 2019 9 次提交
    • T
      net/mlx5: Fix code style issue in mlx driver · fc9c5a4a
      Tonghao Zhang 提交于
      Add the tab before '}' and keep the code style consistent.
      Signed-off-by: NTonghao Zhang <xiangxia.m.yue@gmail.com>
      Reviewed-by: NOr Gerlitz <ogerlitz@mellanox.com>
      Acked-by: NSaeed Mahameed <saeedm@mellanox.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      fc9c5a4a
    • D
      Merge branch 'sh_eth-implement-simple-RX-checksum-offload' · d3ab9df5
      David S. Miller 提交于
      Sergei Shtylyov says:
      
      ====================
      sh_eth: implement simple RX checksum offload
      
      Here's a set of 7 patches against DaveM's 'net-next.git' repo. I'm implemeting
      the simple RX checksum offload (like was done for the 'ravb' driver by Simon
      Horman); it has been only tested on the R8A7740 and R8A77980 SoCs, the other
      SoCs should just work (according to their manuals)...
      ====================
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      d3ab9df5
    • S
      sh_eth: offload RX checksum on SH7763 · 997feb11
      Sergei Shtylyov 提交于
      The SH7763 SoC manual describes the Ether MAC's RX checksum offload
      the same way as it's implemented in the EtherAVB MACs...
      Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      997feb11
    • S
      sh_eth: offload RX checksum on SH7734 · 06240e1b
      Sergei Shtylyov 提交于
      The SH7734 SoC manual describes the Ether MAC's RX checksum offload
      the same way as it's implemented in the EtherAVB MACs...
      Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      06240e1b
    • S
      sh_eth: offload RX checksum on R8A77980 · 0da843ad
      Sergei Shtylyov 提交于
      The R-Car V3H (R8A77980) SoC manual describes the Ether MAC's RX checksum
      offload the same way as it's implemented in the EtherAVB MAC...
      Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      0da843ad
    • S
      sh_eth: offload RX checksum on R8A7740 · 040c16fd
      Sergei Shtylyov 提交于
      The R-Mobile A1 (R8A7740) SoC manual describes the Ether MAC's RX checksum
      offload the same way as it's implemented in the EtherAVB MAC...
      Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
      Tested-by: NGeert Uytterhoeven <geert+renesas@glider.be>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      040c16fd
    • S
      sh_eth: offload RX checksum on R7S72100 · 48132cd0
      Sergei Shtylyov 提交于
      The RZ/A1H (R7S721000) SoC manual describes the Ether MAC's RX checksum
      offload the same way as it's implemented in the EtherAVB MACs...
      Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      48132cd0
    • S
      sh_eth: RX checksum offload support · f8e022db
      Sergei Shtylyov 提交于
      Add support for the RX checksum offload. This is enabled by default and
      may be disabled and re-enabled using 'ethtool':
      
      # ethtool -K eth0 rx off
      # ethtool -K eth0 rx on
      
      Some Ether MACs provide a simple checksumming scheme which appears to be
      completely compatible with CHECKSUM_COMPLETE: sum of all packet data after
      the L2 header is appended to packet data; this may be trivially read by
      the driver and used to update the skb accordingly. The same checksumming
      scheme is implemented in the EtherAVB MACs and now supported by the 'ravb'
      driver.
      
      In terms of performance, throughput is close to gigabit line rate with the
      RX checksum offload both enabled and disabled.  The 'perf' output, however,
      appears to indicate that significantly less time is spent in do_csum() --
      this is as expected.
      
      Test results with RX checksum offload enabled:
      
      ~/netperf-2.2pl4# perf record -a ./netperf -t TCP_MAERTS -H 192.168.2.4
      TCP MAERTS TEST to 192.168.2.4
      Recv   Send    Send
      Socket Socket  Message  Elapsed
      Size   Size    Size     Time     Throughput
      bytes  bytes   bytes    secs.    10^6bits/sec
      
      131072  16384  16384    10.01     933.93
      [ perf record: Woken up 8 times to write data ]
      [ perf record: Captured and wrote 1.955 MB perf.data (41940 samples) ]
      ~/netperf-2.2pl4# perf report
      Samples: 41K of event 'cycles:ppp', Event count (approx.): 9915302763
      Overhead  Command          Shared Object             Symbol
         9.44%  netperf          [kernel.kallsyms]         [k] __arch_copy_to_user
         7.75%  swapper          [kernel.kallsyms]         [k] _raw_spin_unlock_irq
         6.31%  swapper          [kernel.kallsyms]         [k] default_idle_call
         5.89%  swapper          [kernel.kallsyms]         [k] arch_cpu_idle
         4.37%  swapper          [kernel.kallsyms]         [k] tick_nohz_idle_exit
         4.02%  netperf          [kernel.kallsyms]         [k] _raw_spin_unlock_irq
         2.52%  netperf          [kernel.kallsyms]         [k] preempt_count_sub
         1.81%  netperf          [kernel.kallsyms]         [k] tcp_recvmsg
         1.80%  netperf          [kernel.kallsyms]         [k] _raw_spin_unlock_irqres
         1.78%  netperf          [kernel.kallsyms]         [k] preempt_count_add
         1.36%  netperf          [kernel.kallsyms]         [k] __tcp_transmit_skb
         1.20%  netperf          [kernel.kallsyms]         [k] __local_bh_enable_ip
         1.10%  netperf          [kernel.kallsyms]         [k] sh_eth_start_xmit
      
      Test results with RX checksum offload disabled:
      
      ~/netperf-2.2pl4# perf record -a ./netperf -t TCP_MAERTS -H 192.168.2.4
      TCP MAERTS TEST to 192.168.2.4
      Recv   Send    Send
      Socket Socket  Message  Elapsed
      Size   Size    Size     Time     Throughput
      bytes  bytes   bytes    secs.    10^6bits/sec
      131072  16384  16384    10.01     932.04
      [ perf record: Woken up 14 times to write data ]
      [ perf record: Captured and wrote 3.642 MB perf.data (78817 samples) ]
      ~/netperf-2.2pl4# perf report
      Samples: 78K of event 'cycles:ppp', Event count (approx.): 18091442796
      Overhead  Command          Shared Object       Symbol
         7.00%  swapper          [kernel.kallsyms]   [k] do_csum
         3.94%  swapper          [kernel.kallsyms]   [k] sh_eth_poll
         3.83%  ksoftirqd/0      [kernel.kallsyms]   [k] do_csum
         3.23%  swapper          [kernel.kallsyms]   [k] _raw_spin_unlock_irq
         2.87%  netperf          [kernel.kallsyms]   [k] __arch_copy_to_user
         2.86%  swapper          [kernel.kallsyms]   [k] arch_cpu_idle
         2.13%  swapper          [kernel.kallsyms]   [k] default_idle_call
         2.12%  ksoftirqd/0      [kernel.kallsyms]   [k] sh_eth_poll
         2.02%  swapper          [kernel.kallsyms]   [k] _raw_spin_unlock_irqrestore
         1.84%  swapper          [kernel.kallsyms]   [k] __softirqentry_text_start
         1.64%  swapper          [kernel.kallsyms]   [k] tick_nohz_idle_exit
         1.53%  netperf          [kernel.kallsyms]   [k] _raw_spin_unlock_irq
         1.32%  netperf          [kernel.kallsyms]   [k] preempt_count_sub
         1.27%  swapper          [kernel.kallsyms]   [k] __pi___inval_dcache_area
         1.22%  swapper          [kernel.kallsyms]   [k] check_preemption_disabled
         1.01%  ksoftirqd/0      [kernel.kallsyms]   [k] _raw_spin_unlock_irqrestore
      
      The above results collected on the R-Car V3H Starter Kit board.
      
      Based on the commit 4d86d381 ("ravb: RX checksum offload")...
      Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      f8e022db
    • S
      sh_eth: rename sh_eth_cpu_data::hw_checksum · 2c2ab5af
      Sergei Shtylyov 提交于
      Commit 62e04b7e ("sh_eth: rename 'sh_eth_cpu_data::hw_crc'") renamed
      the field to 'hw_checksum' for the Ether DMAC "intelligent checksum",
      however some Ether MACs implement a simpler checksumming scheme, so that
      name now seems misleading. Rename that field to 'csmr' as the "intelligent
      checksum" is always controlled by the CSMR register.
      Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
      Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      2c2ab5af
  2. 04 2月, 2019 27 次提交
  3. 03 2月, 2019 4 次提交