- 17 9月, 2009 1 次提交
-
-
由 Philippe Gerum 提交于
Signed-off-by: NPhilippe Gerum <rpm@xenomai.org> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
-
- 12 6月, 2009 1 次提交
-
-
由 Robin Getz 提交于
Hardware errors on the Blackfin architecture are queued by nature of the hardware design. Things that could generate a hardware level queue up at the system interface and might not process until much later, at which point the system would send a notification back to the core. As such, it is possible for user space code to do something that would trigger a hardware error, but have it delay long enough for the process context to switch. So when the hardware error does signal, we mistakenly evaluate it as a different process or as kernel context and panic (erp!). This makes it pretty difficult to find the offending context. But wait, there is good news somewhere. By forcing a SSYNC in the interrupt entry, we force all pending queues at the system level to be processed and all hardware errors to be signaled. Then we check the current interrupt state to see if the hardware error is now signaled. If so, we re-queue the current interrupt and return thus allowing the higher priority hardware error interrupt to process properly. Since we haven't done any other context processing yet, the right context will be selected and killed. There is still the possibility that the exact offending instruction will be unknown, but at least we'll have a much better idea of where to look. The downside of course is that this causes system-wide syncs at every interrupt point which results in significant performance degradation. Since this situation should not occur in any properly configured system (as hardware errors are triggered by things like bad pointers), make it a debug configuration option and disable it by default. Signed-off-by: NRobin Getz <robin.getz@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
-
- 04 3月, 2009 1 次提交
-
-
由 Philippe Gerum 提交于
Signed-off-by: NPhilippe Gerum <rpm@xenomai.org> Signed-off-by: NBryan Wu <cooloney@kernel.org>
-
- 04 2月, 2009 1 次提交
-
-
由 Robin Getz 提交于
Signed-off-by: NRobin Getz <rgetz@blackfin.uclinux.org> Signed-off-by: NBryan Wu <cooloney@kernel.org>
-
- 07 1月, 2009 3 次提交
-
-
由 Graf Yang 提交于
Signed-off-by: NGraf Yang <graf.yang@analog.com> Signed-off-by: NBryan Wu <cooloney@kernel.org>
-
由 Yi Li 提交于
[Mike Frysinger <vapier.adi@gmail.com>: - handle bf531/bf532/bf534/bf536 variants in ipipe.h - cleanup IPIPE logic for bfin_set_irq_handler() - cleanup ipipe asm code a bit and add missing ENDPROC() - simplify IPIPE code in trap_c - unify some of the IPIPE code and fix style - simplify DO_IRQ_L1 handling with ipipe code - revert IRQ_SW_INT# addition from ipipe merge - remove duplicate get_{c,s}clk() prototypes ] Signed-off-by: NYi Li <yi.li@analog.com> Signed-off-by: NMike Frysinger <vapier.adi@gmail.com> Signed-off-by: NBryan Wu <cooloney@kernel.org>
-
由 Graf Yang 提交于
Signed-off-by: NGraf Yang <graf.yang@analog.com> Signed-off-by: NBryan Wu <cooloney@kernel.org>
-
- 09 10月, 2008 2 次提交
-
-
由 Robin Getz 提交于
The kernel does not properly clear the EBIU Error Master (EBIU_ERRMST) Register on BF548, which causes the kernel to panic. We need to make sure that we clear the EBIU_ERRMST (necessary on BF54x) Signed-off-by: NRobin Getz <rgetz@blackfin.uclinux.org> Signed-off-by: NBryan Wu <cooloney@kernel.org>
-
由 Michael Hennerich 提交于
Apply ANOMALY_05000283 & ANOMALY_05000315 Workaround also to the EXCEPTION path. Cover evt_ivhw also with ANOMALY_05000315 The Workaround needs to be prior to accesses (either read or write) to any system MMR. Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com> Signed-off-by: NBryan Wu <cooloney@kernel.org>
-
- 27 8月, 2008 1 次提交
-
-
由 Bryan Wu 提交于
Signed-off-by: NBryan Wu <cooloney@kernel.org>
-
- 21 12月, 2007 1 次提交
-
-
由 Robin Getz 提交于
Signed-off-by: NRobin Getz <robin.getz@analog.com> Signed-off-by: NBryan Wu <bryan.wu@analog.com>
-
- 27 1月, 2008 1 次提交
-
-
由 Robin Getz 提交于
http://blackfin.uclinux.org/gf/project/uclinux-dist/tracker/?action=TrackerItemEdit&tracker_item_id=3719 When the CPLBs get a miss, we do: - find a victim in the HW table - remove the victim - find the replacement in the software table - put it into the HW table. If we can't find a replacement in the software table, we accidently leave a duplicate in the HW table. This patch ensures that duplicate is marked as not valid. What we should do is find the replacement in the software table, before we find a victim in the HW table - but its too late in the release cycle to do that much restructuring of this code. Rather that duplicate code, connect Hardware Errors (irq5) into trap_c, so user space processes get killed properly. The rest of irq_panic() can be moved into traps.c (later) There is still a small corner case that causes problems when a pheriperal interrupt goes off a single cycle before a user space hardware error. This causes a kernel panic, rather than the user space process being killed. But, this checkin makes things work in 99.9% of the cases, and is a vast improvement from what is there today (which fails 100% of the time). Signed-off-by: NRobin Getz <robin.getz@analog.com> Signed-off-by: NBryan Wu <bryan.wu@analog.com>
-
- 15 11月, 2007 1 次提交
-
-
由 Mike Frysinger 提交于
Signed-off-by: NMike Frysinger <michael.frysinger@analog.com> Signed-off-by: NBryan Wu <bryan.wu@analog.com>
-
- 05 8月, 2007 1 次提交
-
-
由 Mike Frysinger 提交于
- allow people to select the feature that is unavailable to the kernel: NMI, JTAG, or CYCLES. - change default NMI handler to simply dump hardware trace buffer. - remove default NMI handler completely as calling into kernel code is not safe move example handler to wiki so people dont haphazardly copy and paste this stuff thinking its safe Signed-off-by: NMike Frysinger <michael.frysinger@analog.com> Signed-off-by: NBryan Wu <bryan.wu@analog.com>
-
- 03 8月, 2007 1 次提交
-
-
由 Mike Frysinger 提交于
Signed-off-by: NMike Frysinger <michael.frysinger@analog.com> Signed-off-by: NBryan Wu <bryan.wu@analog.com>
-
- 25 7月, 2007 1 次提交
-
-
由 Mike Frysinger 提交于
revise anomaly handling by basing things on the compiler not the kconfig defines, so the header is stable and usable outside of the kernel. This also allows us to move some code from preprocessing to compiling (gcc culls dead code) which should help with code quality (readability, catch minor bugs, etc...). Signed-off-by: NMike Frysinger <michael.frysinger@analog.com> Signed-off-by: NBryan Wu <bryan.wu@analog.com>
-
- 21 6月, 2007 2 次提交
-
-
由 Robin Getz 提交于
Turns on trace earlier, so crashes at kernel start should print out a trace, making things easier to debug. Signed-off-by: NRobin Getz <robin.getz@analog.com> Signed-off-by: NMike Frysinger <michael.frysinger@analog.com> Signed-off-by: NBryan Wu <bryan.wu@analog.com>
-
由 Robin Getz 提交于
update lists for 533, 537, and add SSYNC workaround into assembly files. Signed-off-by: NRobin Getz <robin.getz@analog.com> Signed-off-by: NBryan Wu <bryan.wu@analog.com>
-
- 11 6月, 2007 1 次提交
-
-
由 Mike Frysinger 提交于
add proper ENDPROC() to close out assembly functions so size/type is set properly in the final ELF image Signed-off-by: NMike Frysinger <michael.frysinger@analog.com> Signed-off-by: NBryan Wu <bryan.wu@analog.com>
-
- 08 5月, 2007 1 次提交
-
-
由 Bryan Wu 提交于
This adds support for the Analog Devices Blackfin processor architecture, and currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561 (Dual Core) devices, with a variety of development platforms including those avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP, BF561-EZKIT), and Bluetechnix! Tinyboards. The Blackfin architecture was jointly developed by Intel and Analog Devices Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in December of 2000. Since then ADI has put this core into its Blackfin processor family of devices. The Blackfin core has the advantages of a clean, orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC (Multiply/Accumulate), state-of-the-art signal processing engine and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture. The Blackfin architecture, including the instruction set, is described by the ADSP-BF53x/BF56x Blackfin Processor Programming Reference http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf The Blackfin processor is already supported by major releases of gcc, and there are binary and source rpms/tarballs for many architectures at: http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete documentation, including "getting started" guides available at: http://docs.blackfin.uclinux.org/ which provides links to the sources and patches you will need in order to set up a cross-compiling environment for bfin-linux-uclibc This patch, as well as the other patches (toolchain, distribution, uClibc) are actively supported by Analog Devices Inc, at: http://blackfin.uclinux.org/ We have tested this on LTP, and our test plan (including pass/fails) can be found at: http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel [m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files] Signed-off-by: NBryan Wu <bryan.wu@analog.com> Signed-off-by: NMariusz Kozlowski <m.kozlowski@tuxland.pl> Signed-off-by: NAubrey Li <aubrey.li@analog.com> Signed-off-by: NJie Zhang <jie.zhang@analog.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-