1. 16 12月, 2015 9 次提交
    • A
      ARM: debug-ll: reorder Kconfig alphanumerically · 1dc93416
      Arnd Bergmann 提交于
      The file has gotten a little out of sync, as platforms got
      added in the wrong place, or have been renamed. This moves
      the options around, but should not change any functionality.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      1dc93416
    • A
      ARM: debug-ll: rework footbridge handling · 0045c0dd
      Arnd Bergmann 提交于
      Footbridge has two debug ports that are handled a bit differently:
      
      The 8250 port uses the normal debug/8250.S implementation that is shared
      with a lot of other platforms, but it relies on the DEBUG_UART_8250
      option to be turned on automatically instead of being selected by
      DEBUG_FOOTBRIDGE_COM1 as we do for most other platforms. I'm changing
      this to use a 'select' and change the dependency to the debug symbol
      rather than the platform symbol for consistency.
      
      The DC21285 UART has a separate top-level option, and relies on
      the traditional include/mach/debug-macro.S method. With the s3c64xx
      multiplatform series queued up for 4.5, it is now the last one that does
      this, so by moving this file to include/debug/dc21285.S, we can get
      all platforms to do things the same way.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      0045c0dd
    • A
      ARM: debug-ll: rework lpc32xx handling · 59bd4c38
      Arnd Bergmann 提交于
      LPC32xx can not yet be configured in a multiplatform kernel, but
      if we ever get there, enabling one of the LPC32xx platforms
      while trying to use DEBUG_LL for another platform can default to
      the wrong UART address, as the options are purely based on the
      architecture being enabled or not.
      
      This changes the logic to use the LPC32xx default addresses only
      if we have also picked the respective Kconfig symbols introduced
      here.
      
      While we're at it, this also reorders the virtual address as
      it should be.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Acked-by: NVladimir Zapolskiy <vz@mleia.com>
      59bd4c38
    • A
      ARM: debug-ll: rework gemini handling · d7175a3b
      Arnd Bergmann 提交于
      Gemini can not yet be configured in a multiplatform kernel, but
      if we ever get there, enabling one of the gemini platforms
      while trying to use DEBUG_LL for another platform can default to
      the wrong UART address, as the options are purely based on the
      architecture being enabled or not.
      
      This changes the logic to use the gemini default addresses and
      the flow control settings only if we have also picked the respective
      Kconfig symbols introduced here.
      
      While we're at it, this also reorders the virtual address as
      it should be.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Acked-by: NHans Ulli Kroll <ulli.kroll@googlemail.com>
      d7175a3b
    • A
      ARM: debug-ll: rework integrator/versatile handling · 4db22c10
      Arnd Bergmann 提交于
      Enabling one of the integrator platforms in a multiplatform kernel
      while trying to use DEBUG_LL for another platform can default to
      the wrong UART address, as the options are purely based on the
      architecture being enabled or not.
      
      This changes the logic to use the integrator default addresses only
      if we have also picked the respective Kconfig symbols introduced
      here. Versatile is not yet part of multiplatform, but hopefully
      soon will be, so we do the same change for versatile as well.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      4db22c10
    • A
      ARM: debug-ll: rework SPEAr handling · 375d84cf
      Arnd Bergmann 提交于
      Enabling one of the SPEAr platforms in a multiplatform kernel
      while trying to use DEBUG_LL for another platform can default to
      the wrong UART address, as the options are purely based on the
      architecture being enabled or not.
      
      This changes the logic to use the SPEAr default addresses only
      if we have also picked the respective Kconfig symbols introduced
      here.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      375d84cf
    • A
      ARM: debug-ll: rework ep93xx handling · f06455fa
      Arnd Bergmann 提交于
      This makes ep93xx debug-ll handling more consistent with the other
      platforms, by adding a separate Kconfig symbol for it that
      in turn selects the standard DEBUG_UART_PL01X symbol.
      
      We still have to pick a physical address even if DEBUG_LL is disabled
      here, because the EP93xx uncompress output code uses
      CONFIG_DEBUG_UART_PHYS. If we ever move to multiplatform support,
      this can go away.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      f06455fa
    • A
      ARM: debug-ll: reorganize mvebu debug uart config · c047f529
      Arnd Bergmann 提交于
      As we are moving dove/mv78xx0/orion into multiplatform, the debug-ll
      configuration options for these platforms are conflicting with the
      multiplatform configuration: enabling one of those platforms sometimes
      changes the default addresses to the ones used on one of them, rather
      than the one that was selected in Kconfig.
      
      This changes the configuration so we share the physical address
      configuration with mach-mvebu.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      c047f529
    • A
      ARM: debug-ll: fix UART configuration with ARCH_KEYSTONE · cdd2e08b
      Arnd Bergmann 提交于
      We may have multiple platforms enabled and also DEBUG_LL
      configured for one of them. However if we enable ARCH_KEYSTONE,
      we default to using 32-bit UART access independent of which
      platform we are actually using, which can be confusing.
      
      This changes the logic so the 32-bit default gets only
      used by default if we actually configure the keystone
      UART, as opposed to picking some other 8250 setting on
      a kernel that has keystone support enabled.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      cdd2e08b
  2. 02 12月, 2015 15 次提交
  3. 29 11月, 2015 1 次提交
    • A
      ARM: 8454/1: OF implies OF_FLATTREE · aa7d5f18
      Arnd Bergmann 提交于
      On the ARM architecture, individual platforms select CONFIG_USE_OF if they
      need it, but all device tree code is keyed off CONFIG_OF. When building
      a platform without DT support and manually enabling CONFIG_OF, we now
      get a number of build errors, e.g.
      
      arch/arm/kernel/devtree.c: In function 'setup_machine_fdt':
      arch/arm/kernel/devtree.c:215:19: error: implicit declaration of function 'early_init_dt_verify' [-Werror=implicit-function-declaration]
      
      We could now try to separate the use case of booting from DT vs. the
      case of using the dynamic implementation, but that seems more complicated
      than it can gain us.
      
      This simply changes the ARM Kconfig file to always enable OF_RESERVED_MEM
      and OF_EARLY_FLATTREE when CONFIG_OF is enabled. These options add a little
      extra code when we just want the dynamic OF implementation, but that seems
      like a rather obscure case, and this version solves all CONFIG_OF related
      randconfig regressions.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Fixes: 0166dc11 ("of: make CONFIG_OF user selectable")
      Acked-by: NRob Herring <robh@kernel.org>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      aa7d5f18
  4. 28 11月, 2015 1 次提交
  5. 27 11月, 2015 6 次提交
  6. 26 11月, 2015 7 次提交
    • C
      Revert "arm64: Mark kernel page ranges contiguous" · 667c2759
      Catalin Marinas 提交于
      This reverts commit 348a65cd.
      
      Incorrect page table manipulation that does not respect the ARM ARM
      recommended break-before-make sequence may lead to TLB conflicts. The
      contiguous PTE patch makes the system even more susceptible to such
      errors by changing the mapping from a single page to a contiguous range
      of pages. An additional TLB invalidation would reduce the risk window,
      however, the correct fix is to switch to a temporary swapper_pg_dir.
      Once the correct workaround is done, the reverted commit will be
      re-applied.
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      Reported-by: NJeremy Linton <jeremy.linton@arm.com>
      667c2759
    • W
      arm64: mm: keep reserved ASIDs in sync with mm after multiple rollovers · 0ebea808
      Will Deacon 提交于
      Under some unusual context-switching patterns, it is possible to end up
      with multiple threads from the same mm running concurrently with
      different ASIDs:
      
      1. CPU x schedules task t with mm p containing ASID a and generation g
         This task doesn't block and the CPU doesn't context switch.
         So:
           * per_cpu(active_asid, x) = {g,a}
           * p->context.id = {g,a}
      
      2. Some other CPU generates an ASID rollover. The global generation is
         now (g + 1). CPU x is still running t, with no context switch and
         so per_cpu(reserved_asid, x) = {g,a}
      
      3. CPU y schedules task t', which shares mm p with t. The generation
         mismatches, so we take the slowpath and hit the reserved ASID from
         CPU x. p is then updated so that p->context.id = {g + 1,a}
      
      4. CPU y schedules some other task u, which has an mm != p.
      
      5. Some other CPU generates *another* CPU rollover. The global
         generation is now (g + 2). CPU x is still running t, with no context
         switch and so per_cpu(reserved_asid, x) = {g,a}.
      
      6. CPU y once again schedules task t', but now *fails* to hit the
         reserved ASID from CPU x because of the generation mismatch. This
         results in a new ASID being allocated, despite the fact that t is
         still running on CPU x with the same mm.
      
      Consequently, TLBIs (e.g. as a result of CoW) will not be synchronised
      between the two threads.
      
      This patch fixes the problem by updating all of the matching reserved
      ASIDs when we hit on the slowpath (i.e. in step 3 above). This keeps
      the reserved ASIDs in-sync with the mm and avoids the problem.
      Reported-by: NTony Thompson <anthony.thompson@arm.com>
      Reviewed-by: NCatalin Marinas <catalin.marinas@arm.com>
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      0ebea808
    • A
      arm64: KASAN depends on !(ARM64_16K_PAGES && ARM64_VA_BITS_48) · f1b9032f
      Andrey Ryabinin 提交于
      On KASAN + 16K_PAGES + 48BIT_VA
       arch/arm64/mm/kasan_init.c: In function ‘kasan_early_init’:
       include/linux/compiler.h:484:38: error: call to ‘__compiletime_assert_95’ declared with attribute error: BUILD_BUG_ON failed: !IS_ALIGNED(KASAN_SHADOW_END, PGDIR_SIZE)
          _compiletime_assert(condition, msg, __compiletime_assert_, __LINE__)
      
      Currently KASAN will not work on 16K_PAGES and 48BIT_VA, so
      forbid such configuration to avoid above build failure.
      Signed-off-by: NAndrey Ryabinin <aryabinin@virtuozzo.com>
      Reported-by: NSuzuki K. Poulose <Suzuki.Poulose@arm.com>
      Acked-by: NMark Rutland <mark.rutland@arm.com>
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      f1b9032f
    • L
      nios2: fix cache coherency · 8e3d7c83
      Ley Foon Tan 提交于
      There is intermittent cache coherency issue caught in toolchian tests.
      Revert to use flushd.
      Signed-off-by: NLey Foon Tan <lftan@altera.com>
      8e3d7c83
    • G
      ARM/PCI: Move align_resource function pointer to pci_host_bridge structure · 7c7a0e94
      Gabriele Paoloni 提交于
      Commit b3a72384 ("ARM/PCI: Replace pci_sys_data->align_resource with
      global function pointer") introduced an ARM-specific align_resource()
      function pointer.  This is not portable to other arches and doesn't work
      for platforms with two different PCIe host bridge controllers.
      
      Move the function pointer to the pci_host_bridge structure so each host
      bridge driver can specify its own align_resource() function.
      Signed-off-by: NGabriele Paoloni <gabriele.paoloni@huawei.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Reviewed-by: NArnd Bergmann <arnd@arndb.de>
      7c7a0e94
    • G
      ARM: OMAP4+: SMP: use lockless clkdm/pwrdm api in omap4_boot_secondary · 918af9f9
      Grygorii Strashko 提交于
      OMAP CPU hotplug uses cpu1's clocks and power domains for CPU1 wake up
      from low power states (or turn on CPU1). This part of code is also
      part of system suspend (disable_nonboot_cpus()).
      >From other side, cpu1's clocks and power domains are used by CPUIdle. All above
      functionality is mutually exclusive and, therefore, lockless clkdm/pwrdm api
      can be used in omap4_boot_secondary().
      
      This fixes below back-trace on -RT which is triggered by
      pwrdm_lock/unlock():
      
      BUG: sleeping function called from invalid context at kernel/locking/rtmutex.c:917
       in_atomic(): 1, irqs_disabled(): 0, pid: 118, name: sh
       9 locks held by sh/118:
        #0:  (sb_writers#4){.+.+.+}, at: [<c0144a6c>] vfs_write+0x13c/0x164
        #1:  (&of->mutex){+.+.+.}, at: [<c01b4c70>] kernfs_fop_write+0x48/0x19c
        #2:  (s_active#24){.+.+.+}, at: [<c01b4c78>] kernfs_fop_write+0x50/0x19c
        #3:  (device_hotplug_lock){+.+.+.}, at: [<c03cbff0>] lock_device_hotplug_sysfs+0xc/0x4c
        #4:  (&dev->mutex){......}, at: [<c03cd284>] device_online+0x14/0x88
        #5:  (cpu_add_remove_lock){+.+.+.}, at: [<c003af90>] cpu_up+0x50/0x1a0
        #6:  (cpu_hotplug.lock){++++++}, at: [<c003ae48>] cpu_hotplug_begin+0x0/0xc4
        #7:  (cpu_hotplug.lock#2){+.+.+.}, at: [<c003aec0>] cpu_hotplug_begin+0x78/0xc4
        #8:  (boot_lock){+.+...}, at: [<c002b254>] omap4_boot_secondary+0x1c/0x178
       Preemption disabled at:[<  (null)>]   (null)
      
       CPU: 0 PID: 118 Comm: sh Not tainted 4.1.12-rt11-01998-gb4a62c3-dirty #137
       Hardware name: Generic DRA74X (Flattened Device Tree)
       [<c0017574>] (unwind_backtrace) from [<c0013be8>] (show_stack+0x10/0x14)
       [<c0013be8>] (show_stack) from [<c05a8670>] (dump_stack+0x80/0x94)
       [<c05a8670>] (dump_stack) from [<c05ad158>] (rt_spin_lock+0x24/0x54)
       [<c05ad158>] (rt_spin_lock) from [<c0030dac>] (clkdm_wakeup+0x10/0x2c)
       [<c0030dac>] (clkdm_wakeup) from [<c002b2c0>] (omap4_boot_secondary+0x88/0x178)
       [<c002b2c0>] (omap4_boot_secondary) from [<c0015d00>] (__cpu_up+0xc4/0x164)
       [<c0015d00>] (__cpu_up) from [<c003b09c>] (cpu_up+0x15c/0x1a0)
       [<c003b09c>] (cpu_up) from [<c03cd2d4>] (device_online+0x64/0x88)
       [<c03cd2d4>] (device_online) from [<c03cd360>] (online_store+0x68/0x74)
       [<c03cd360>] (online_store) from [<c01b4ce0>] (kernfs_fop_write+0xb8/0x19c)
       [<c01b4ce0>] (kernfs_fop_write) from [<c0144124>] (__vfs_write+0x20/0xd8)
       [<c0144124>] (__vfs_write) from [<c01449c0>] (vfs_write+0x90/0x164)
       [<c01449c0>] (vfs_write) from [<c01451e4>] (SyS_write+0x44/0x9c)
       [<c01451e4>] (SyS_write) from [<c0010240>] (ret_fast_syscall+0x0/0x54)
       CPU1: smp_ops.cpu_die() returned, trying to resuscitate
      
      Cc: Tero Kristo <t-kristo@ti.com>
      Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      918af9f9
    • N
      arm: omap2+: add missing HWMOD_NO_IDLEST in 81xx hwmod data · 29f5b34c
      Neil Armstrong 提交于
      Add missing HWMOD_NO_IDLEST hwmod flag for entries not
      having omap4 clkctrl values.
      The emac0 hwmod flag fixes the davinci_emac driver probe
      since the return of pm_resume() call is now checked.
      
      This solves the following boot errors :
      [    0.121429] omap_hwmod: l4_ls: _wait_target_ready failed: -16
      [    0.121441] omap_hwmod: l4_ls: cannot be enabled for reset (3)
      [    0.124342] omap_hwmod: l4_hs: _wait_target_ready failed: -16
      [    0.124352] omap_hwmod: l4_hs: cannot be enabled for reset (3)
      [    1.967228] omap_hwmod: emac0: _wait_target_ready failed: -16
      
      Cc: Brian Hutchinson <b.hutchman@gmail.com>
      Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      29f5b34c
  7. 25 11月, 2015 1 次提交
    • M
      arm64: efi: correctly map runtime regions · 3b12acf4
      Mark Rutland 提交于
      The kernel may use a page granularity of 4K, 16K, or 64K depending on
      configuration.
      
      When mapping EFI runtime regions, we use memrange_efi_to_native to round
      the physical base address of a region down to a kernel page boundary,
      and round the size up to a kernel page boundary, adding the residue left
      over from rounding down the physical base address. We do not round down
      the virtual base address.
      
      In __create_mapping we account for the offset of the virtual base from a
      granule boundary, adding the residue to the size before rounding the
      base down to said granule boundary.
      
      Thus we account for the residue twice, and when the residue is non-zero
      will cause __create_mapping to map an additional page at the end of the
      region. Depending on the memory map, this page may be in a region we are
      not intended/permitted to map, or may clash with a different region that
      we wish to map. In typical cases, mapping the next item in the memory
      map will overwrite the erroneously created entry, as we sort the memory
      map in the stub.
      
      As __create_mapping can cope with base addresses which are not page
      aligned, we can instead rely on it to map the region appropriately, and
      simplify efi_virtmap_init by removing the unnecessary code.
      Signed-off-by: NMark Rutland <mark.rutland@arm.com>
      Reviewed-by: NArd Biesheuvel <ard.biesheuvel@linaro.org>
      Cc: Leif Lindholm <leif.lindholm@linaro.org>
      Cc: Will Deacon <will.deacon@arm.com>
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      3b12acf4