Stoney is DCE 11.x.
Signed-off-by: NSamuel Li <samuel.li@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Stoney is SMC 8.x.
Signed-off-by: NSamuel Li <samuel.li@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Stoney is GMC 8.x.
Signed-off-by: NSamuel Li <samuel.li@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Stoney is based on Carrizo with some IP upgrades.
Signed-off-by: NSamuel Li <samuel.li@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

fix the vm->mutex and ww_mutex confilcts.
vm->mutex is always token first, then ww_mutex.

V2: remove unneccessary checking for pt bo.

Change-Id: Iea56e183752c02831126d06d2f5b7a474a6e4743
Signed-off-by: NChunming Zhou <david1.zhou@amd.com>
Reviewed-by: NChristian König <christian.koenig@amd.com>

Signed-off-by: NJunwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: NChristian König <christian.koenig@amd.com>

Finally getting rid of it.
Signed-off-by: NChristian König <christian.koenig@amd.com>

It didn't worked to well anyway.
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NChunming Zhou <david1.zhou@amd.com>
Reviewed-by: NJunwei Zhang <Jerry.Zhang@amd.com>

s/regsiter/register/
Signed-off-by: NGeliang Tang <geliangtang@163.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

We were basically opencoding the same thing in both
hw_init and resume and hw_fini and suspend.
Reviewed-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This is the recommended setting from the hw team for newer
versions of the firmware.
Reviewed-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org

This removes the last depency of radeon for dev->struct_mutex!

Also the locking scheme for hyperz/cmask owners seems a bit unsound,
there's no protection in the preclose handler (and that never did hold
dev->struct_mutex while being called). So grab the same lock there,
too.

There's also all the checks in the cs checker, but since the overall
design seems to never stall for the previous owner I figured it's ok
if I leave this racy. It was racy even before I touched it after all
too.
Reviewed-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

The first lockup fence will lock the fence list of scheduler.
Then cancel the delayed workqueues for all clean pending fences
without waiting the workqueues to finish.

Change-Id: I9bec826de1aa49d587b0662f3fb4a95333979429
Signed-off-by: NJunwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: NChristian König <christian.koenig@amd.com>

Change-Id: I67e987db0efdca28faa80b332b75571192130d33
Signed-off-by: NJunwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: NDavid Zhou <david1.zhou@amd.com>
Reviewed-by: NChristian König <christian.koenig@amd.com>

Output all VM mappings a command submission uses.
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>

This makes it much easier to find when userspace misses to send some buffers.
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>

Port of radeon commit 9b7d786b.
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>

This was added to two radeon files even though they don't use any
vga_switcheroo symbols, the amdgpu fork inherited them:

Added to amdgpu_acpi.c by commit d7a2952f ("drm/radeon: Add
support for the ATIF ACPI method to the radeon driver").

Added to amdgpu_bios.c by commit 6a9ee8af ("vga_switcheroo:
initial implementation (v15)").
Signed-off-by: NLukas Wunner <lukas@wunner.de>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This was added to three files even though they don't use any
vga_switcheroo symbols:

Added to radeon_acpi.c by commit d7a2952f ("drm/radeon: Add
support for the ATIF ACPI method to the radeon driver").

Added to radeon_asic.c by commit 0a10c851 ("drm/radeon: create
radeon_asic.c").

Added to radeon_bios.c by commit 6a9ee8af ("vga_switcheroo:
initial implementation (v15)").
Signed-off-by: NLukas Wunner <lukas@wunner.de>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Check to make sure we aren't touching a non-existent
display controller and simplify the code.
Reviewed-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Rework the sdma structures in the driver to
consolidate all of the sdma info into a single
structure and allow for asics that may have
different numbers of sdma instances.
Reviewed-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Everything is evicted from VRAM before suspend, so we need to make
sure all BOs are unpinned and re-pinned after resume. Fixes broken
mouse cursor after resume introduced by commit b9729b17.

Port of radeon commit:
f3cbb17bReviewed-by: NMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Port of radeon commit:
8991668aReviewed-by: NMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Take a GEM reference for and pin the new cursor BO, unpin and drop the
GEM reference for the old cursor BO in dce8 crtc_cursor_set2, and use
amdgpu_crtc->cursor_addr in dce8 set_cursor.

This fixes dce8 cursor_reset accidentally incrementing the cursor BO
pin count, and cleans up the code a little.

Port of radeon commit:
cd404af0Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

It's only needed in dce8 crtc_cursor_set2.

Port of radeon commit:
2e007e61Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Setting a mode seems to clear the cursor registers, so we need to
re-program them to make sure the cursor is visible.

Port of radeon commit:
6d3759fa

v2: change radeon reference in error message
Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

The cursor_set2 hook provides the cursor hotspot position within the
cursor image. When the hotspot position changes, we can adjust the cursor
position such that the hotspot doesn't move on the screen. This prevents
the cursor from appearing to intermittently jump around on the screen
when the position of the hotspot within the cursor image changes.

Port of radeon commits:
78b1a601
3feba08dReviewed-by: NMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Port of radeon commit:
8991668aReviewed-by: NMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Take a GEM reference for and pin the new cursor BO, unpin and drop the
GEM reference for the old cursor BO in dce11 crtc_cursor_set2, and use
amdgpu_crtc->cursor_addr in dce11 set_cursor.

This fixes dce11 cursor_reset accidentally incrementing the cursor BO
pin count, and cleans up the code a little.

Port of radeon commit:
cd404af0Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

It's only needed in dce11 crtc_cursor_set2.

Port of radeon commit:
2e007e61Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Setting a mode seems to clear the cursor registers, so we need to
re-program them to make sure the cursor is visible.

Port of radeon commit:
6d3759fa

v2: change radeon reference in error output
Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

The cursor_set2 hook provides the cursor hotspot position within the
cursor image. When the hotspot position changes, we can adjust the cursor
position such that the hotspot doesn't move on the screen. This prevents
the cursor from appearing to intermittently jump around on the screen
when the position of the hotspot within the cursor image changes.

Port of radeon commits:
78b1a601
3feba08dReviewed-by: NMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Port of radeon commit:
8991668aReviewed-by: NMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Take a GEM reference for and pin the new cursor BO, unpin and drop the
GEM reference for the old cursor BO in dce10 crtc_cursor_set2, and use
amdgpu_crtc->cursor_addr in dce10 set_cursor.

This fixes dce10 cursor_reset accidentally incrementing the cursor BO
pin count, and cleans up the code a little.

Port of radeon commit:
cd404af0Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

It's only needed in dce10 crtc_cursor_set2.

Port of radeon commit:
2e007e61Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Setting a mode seems to clear the cursor registers, so we need to
re-program them to make sure the cursor is visible.

Port of radeon commit:
6d3759fa

v2: change radeon reference in error message
Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

The cursor_set2 hook provides the cursor hotspot position within the
cursor image. When the hotspot position changes, we can adjust the cursor
position such that the hotspot doesn't move on the screen. This prevents
the cursor from appearing to intermittently jump around on the screen
when the position of the hotspot within the cursor image changes.

Port of radeon commits:
78b1a601
3feba08dReviewed-by: NMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Better precision than the regular div opcode.

v2: drop 64 bit divide
v3: fix op handling.  This actually is a 64 bit divide.
Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>