1. 06 3月, 2014 34 次提交
  2. 04 3月, 2014 6 次提交
    • B
      drm/i915: Make clear/insert vfuncs args absolute · 782f1495
      Ben Widawsky 提交于
      This patch converts insert_entries and clear_range, both functions which
      are specific to the VM. These functions tend to encapsulate the gen
      specific PTE writes. Passing absolute addresses to the insert_entries,
      and clear_range will help make the logic clearer within the functions as
      to what's going on. Currently, all callers simply do the appropriate
      page shift, which IMO, ends up looking weird with an upcoming change for
      the gen8 page table allocations.
      
      Up until now, the PPGTT was a funky 2 level page table. GEN8 changes
      this to look more like a 3 level page table, and to that extent we need
      a significant amount more memory simply for the page tables. To address
      this, the allocations will be split up in finer amounts.
      
      v2: Replace size_t with uint64_t (Chris, Imre)
      
      v3: Fix size in gen8_ppgtt_init (Ben)
      Fix Size in i915_gem_suspend_gtt_mappings/restore (Imre)
      
      Reviewed-by: Imre Deak <imre.deak@intel.com> (v2)
      Signed-off-by: NBen Widawsky <ben@bwidawsk.net>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      782f1495
    • B
      drm/i915/bdw: Split ppgtt initialization up · bf2b4ed2
      Ben Widawsky 提交于
      Like cleanup in an earlier patch, the code becomes much more readable,
      and easier to extend if we extract out helper functions for the various
      stages of init.
      
      Note that with this patch it becomes really simple, and tempting to begin
      using the 'goto out' idiom with explicit free/fini semantics. I've
      kept the error path as similar as possible to the cleanup() function to
      make sure cleanup is as robust as possible
      
      v2: Remove comment "NB:From here on, ppgtt->base.cleanup() should
      function properly"
      Update commit message to reflect above
      
      v3: Rebased on top of bugfixes found in the previous patch by Imre
      Moved number of pd pages assertion to the proper place (Imre)
      
      v4:
      Allocate dma address space for num_pd_pages, not num_pd_entries (Ben)
      Don't use gen8_pt_dma_addr after free on error path (Imre)
      With new fix from v4 of the previous patch.
      Signed-off-by: NBen Widawsky <ben@bwidawsk.net>
      Reviewed-by: NImre Deak <imre.deak@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      bf2b4ed2
    • B
      drm/i915/bdw: Reorganize PPGTT init · f3a964b9
      Ben Widawsky 提交于
      Create 3 clear stages in PPGTT init. This will help with upcoming
      changes be more readable. The 3 stages are, allocation, dma mapping, and
      writing the P[DT]Es
      
      One nice benefit to the patches is that it makes 2 very clear error
      points, allocation, and mapping, and avoids having to do any handling
      after writing PTEs (something which was likely buggy before). This
      simplified error handling I suspect will be helpful when we move to
      deferred/dynamic page table allocation and mapping.
      
      The patches also attempts to break up some of the steps into more
      logical reviewable chunks, particularly when we free.
      
      v2: Don't call cleanup on the error path since that takes down the
      drm_mm and list entry, which aren't setup at this point.
      
      v3: Fixes addressing Imre's comments from:
      <1392821989.19792.13.camel@intelbox>
      
      Don't do dynamic allocation for the page table DMA addresses. I can't
      remember why I did it in the first place. This addresses one of Imre's
      other issues.
      
      Fix error path leak of page tables.
      
      v4: Fix the fix of the error path leak. Original fix still leaked page
      tables. (Imre)
      Reviewed-by: NImre Deak <imre.deak@intel.com>
      Signed-off-by: NBen Widawsky <ben@bwidawsk.net>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      f3a964b9
    • B
      drm/i915/bdw: Free PPGTT struct · b18b6bde
      Ben Widawsky 提交于
      GEN8 never freed the PPGTT struct. As GEN8 doesn't use full PPGTT, the
      leak is small and only found on a module reload. ie. I don't think this
      needs to go to stable.
      
      v2: The very naive, kfree in gen8 ppgtt cleanup, is subject to a double
      free on PPGTT initialization failure. (Spotted by Imre). Instead this
      patch pulls the ppgtt struct freeing out of the cleanup and leaves it to
      the allocators/callers or the one doing the last kref_put as in standard
      convention
      Reported-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Signed-off-by: NBen Widawsky <ben@bwidawsk.net>
      Reviewed-by: NImre Deak <imre.deak@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      b18b6bde
    • B
      drm/i915: Move ppgtt_release out of the header · 321f2ada
      Ben Widawsky 提交于
      At one time it was expected to be called in multiple places by kref_put.
      At the current time however, it is all contained within
      i915_gem_context.c.
      
      This patch makes an upcoming required addition a bit nicer since it too
      doesn't need to be defined in a header file.
      Signed-off-by: NBen Widawsky <ben@bwidawsk.net>
      Reviewed-by: NImre Deak <imre.deak@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      321f2ada
    • V
      drm/i915: Add a comment about WIZ hashing vs. thread counts · c5c98a58
      Ville Syrjälä 提交于
      Add a comment next to our WIZ hashing setup to remind people about the
      link between WIZ hashing disable bit and PS/WM thread counts.
      Suggested-by: NChris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      c5c98a58