- 13 3月, 2012 4 次提交
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由 Russell King - ARM Linux 提交于
Provide a common function to do the cookie mechanics for completing a DMA descriptor. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Tested-by: NLinus Walleij <linus.walleij@linaro.org> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NJassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Russell King - ARM Linux 提交于
Everyone deals with assigning DMA cookies in the same way (it's part of the API so they should be), so lets consolidate the common code into a helper function to avoid this duplication. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Tested-by: NLinus Walleij <linus.walleij@linaro.org> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NJassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Russell King - ARM Linux 提交于
Add a local private header file to contain definitions and declarations which should only be used by DMA engine drivers. We also fix linux/dmaengine.h to use LINUX_DMAENGINE_H to guard against multiple inclusion. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Tested-by: NLinus Walleij <linus.walleij@linaro.org> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NJassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Russell King - ARM Linux 提交于
Every DMA engine implementation declares a last completed dma cookie in their private dma channel structures. This is pointless, and forces driver specific code. Move this out into the common dma_chan structure. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Tested-by: NLinus Walleij <linus.walleij@linaro.org> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NJassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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- 31 1月, 2012 1 次提交
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由 Nikolaus Voss 提交于
commit 46389470 deleted redundant chan_id and chancnt initialization in dma drivers as this is done in dma_async_device_register(). However, atc_enable_irq() relied on chan_id set before registering the device, what left only channel 0 functional for this driver. This patch introduces atc_enable/disable_chan_irq() as a variant of atc_enable/disable_irq() with the channel as explicit argument. Signed-off-by: NNikolaus Voss <n.voss@weinmann.de> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Cc: stable <stable@vger.kernel.org> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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- 28 11月, 2011 3 次提交
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由 Nicolas Ferre 提交于
Using a configuration structure simplify the finding of SoC dependent parameters. Both platform data and device tree ids are using these structures. This will separate data from code and remove the need for an enum. Idea from Grant Likely. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Nicolas Ferre 提交于
Trivial form modification to unify structure look. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Nicolas Ferre 提交于
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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- 10 11月, 2011 2 次提交
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由 Nicolas Ferre 提交于
Add device tree probe support for atmel at_hdmac DMA driver. Bindings are added to specify DMA controller configuration. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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由 Nicolas Ferre 提交于
We remove the use of platform data from DMA controller driver. We now use of .id_table to distinguish between compatible types. The two implementations allow to determine the number of channels and the capabilities of the controller. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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- 27 10月, 2011 1 次提交
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由 Vinod Koul 提交于
fixup usage of dma direction by introducing dma_transfer_direction, this patch moves dma/drivers/* to use new enum Cc: Jassi Brar <jaswinder.singh@linaro.org> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Viresh Kumar <viresh.kumar@st.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Mika Westerberg <mika.westerberg@iki.fi> Cc: H Hartley Sweeten <hartleys@visionengravers.com> Cc: Li Yang <leoli@freescale.com> Cc: Zhang Wei <zw@zh-kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Cc: Shawn Guo <shawn.guo@freescale.com> Cc: Yong Wang <yong.y.wang@intel.com> Cc: Tomoya MORINAGA <tomoya-linux@dsn.lapis-semi.com> Cc: Boojin Kim <boojin.kim@samsung.com> Cc: Barry Song <Baohua.Song@csr.com> Acked-by: NMika Westerberg <mika.westerberg@iki.fi> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NViresh Kumar <viresh.kumar@st.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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- 20 9月, 2011 1 次提交
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由 Barry Song 提交于
dma_async_device_register will re-init chan_id and chancnt, so whatever chan_id and chancnt are set in drivers, they will be re-written by dma_async_device_register. Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Viresh Kumar <viresh.kumar@st.com> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Piotr Ziecik <kosmo@semihalf.com> Cc: Yong Wang <yong.y.wang@intel.com> Cc: Jaswinder Singh <jassi.brar@samsung.com> Cc: Pelagicore AB <info@pelagicore.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Acked-by: NViresh Kumar <viresh.kumar@st.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 19 8月, 2011 4 次提交
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由 Nicolas Ferre 提交于
In this driver, we can trigger cyclic transfer on peripherals-DMA interfaces. It is dependent on driver implementation but cannot depend on a platform property: we remove the dma_has_cap(DMA_CYCLIC, ) test which has no meaning. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Nicolas Ferre 提交于
Cyclic property and paused state are encoded as bits in the channel status bitfield. Tests of those bits are wrapped in convenient helper functions. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Nicolas Ferre 提交于
Save/restore dma controller state across a suspend-resume sequence. The prepare() function will wait for the non-cyclic channels to become idle. It also deals with cyclic operations with the start at next period while resuming. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Nicolas Ferre 提交于
dmaengine routines can be called from interrupt context and with interrupts disabled. Whereas spin_unlock_bh can't be called from such contexts. So this patch converts all spin_lock* routines to irqsave variants. Also, spin_lock() used in tasklet is converted to irqsave variants, as tasklet can be interrupted, and dma requests from such interruptions may also call spin_lock. Idea from dw_dmac patch by Viresh Kumar. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 06 6月, 2011 1 次提交
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由 H Hartley Sweeten 提交于
Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Vinod Koul <vinod.koul@intel.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 12 5月, 2011 1 次提交
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由 Nicolas Ferre 提交于
With the addition of the "pause" feature, an active wait was introduced to check the "FIFO empty" event. This event was not always happening and a timout contition was needed. But, in some cases, this event depend on the peripheral connected to the channel that is paused: FIFO becomes empty if the peripheral consumes data. The timeout is pretty difficult to evaluate. Moreover, this check is not needed. In conclusion, it seems sensible to entirely remove the checking of "FIFO empty" status when pausing. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> [commit msg edited for grammer] Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 09 5月, 2011 3 次提交
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由 Nicolas Ferre 提交于
A little function helps to chain descriptors: it is already used in cyclic dma operations, now use it in memcpy and slave_sg preparation functions. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Nicolas Ferre 提交于
Pause and resume controls are useful for audio devices. This also returns correct status from atc_tx_status() in case chan is paused. Idea from dw_dmac patch by Linus Walleij. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Nicolas Ferre 提交于
If transfer status is !=DMA_SUCCESS, return total transfer len as residue, instead of zero. Idea from dw_dmac patch by Viresh Kumar. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 02 5月, 2011 5 次提交
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由 Nicolas Ferre 提交于
DMA controller has two AHB interfaces on the SOC internal matrix. It is more efficient to specialize each interface as the access to memory can introduce latencies that are not compatible with peripheral accesses requirements. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Nicolas Ferre 提交于
There is no need to test if channel is enabled in tasklet: - in error path, channel is disabled in interrupt routine - in normal path, this test is performed in sub functions to report a misuse of the engine. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Nicolas Ferre 提交于
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Nicolas Ferre 提交于
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Nicolas Ferre 提交于
Now we use Buffer Transfer Completed interrupts. If we want a chained buffer completed information, we setup the ATC_IEN bit in CTRLB register in the lli. This is done by set_desc_eol() function and used by memcpy/slave_sg functions. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 31 3月, 2011 1 次提交
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由 Lucas De Marchi 提交于
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: NLucas De Marchi <lucas.demarchi@profusion.mobi>
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- 15 1月, 2011 6 次提交
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由 Nicolas Ferre 提交于
We were reading channel status then taking a lock. This lead to a race because this lock may delay us and then make this channel not idle anymore. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Nicolas Ferre 提交于
Place flags on first descriptor of chain instead of last. This is the one used by atc_chain_complete() function while unmapping. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Eric Xu 提交于
Use subsys_initcall instead of module_init in order to keep DMA engine rolling before other peripheral drivers. Signed-off-by: NEric Xu <hong.xu@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Nicolas Ferre 提交于
Following descriptor flow in at_hdmac driver, descriptor comming from atc_desc_get() as already DMA_CTRL_ACK flag set. No need to set it again. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Nicolas Ferre 提交于
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Nicolas Ferre 提交于
In atc_prep_slave_sg() function we use dma_address field of scatterlist with sg_dma_address() macro instead of sg_phys(). DMA address is already computed by dma_map_sg() or another mapping function in calling driver. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 14 12月, 2010 1 次提交
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由 Nicolas Ferre 提交于
Buffer transfer size is the number of transfers to be performed in relation with the width of the _source_ interface. So in the DMA_FROM_DEVICE case, it should be the register width that should be taken into account. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 05 8月, 2010 1 次提交
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由 Yong Wang 提交于
atc_chain_complete shall be called with atchan->lock held and bh disabled. Signed-off-by: NYong Wang <yong.y.wang@intel.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 17 6月, 2010 1 次提交
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由 Uwe Kleine-König 提交于
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 18 5月, 2010 1 次提交
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由 Linus Walleij 提交于
This adds an argument to the DMAengine control function, so that we can later provide control commands that need some external data passed in through an argument akin to the ioctl() operation prototype. [dan.j.williams@intel.com: fix up some missed conversions] Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 30 3月, 2010 1 次提交
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由 Tejun Heo 提交于
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: NTejun Heo <tj@kernel.org> Guess-its-ok-by: NChristoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
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- 27 3月, 2010 2 次提交
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由 Dan Williams 提交于
Simple conditional struct filler to cut out some duplicated code. Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Linus Walleij 提交于
Convert the device_is_tx_complete() operation on the DMA engine to a generic device_tx_status()operation which can return three states, DMA_TX_RUNNING, DMA_TX_COMPLETE, DMA_TX_PAUSED. [dan.j.williams@intel.com: update for timberdale] Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Cc: Maciej Sosnowski <maciej.sosnowski@intel.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Pavel Machek <pavel@ucw.cz> Cc: Li Yang <leoli@freescale.com> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Cc: Magnus Damm <damm@opensource.se> Cc: Liam Girdwood <lrg@slimlogic.co.uk> Cc: Joe Perches <joe@perches.com> Cc: Roland Dreier <rdreier@cisco.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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