1. 02 8月, 2017 1 次提交
    • M
      nand: fix wrong default oob layout for small pages using soft ecc · f7f8c175
      Miquel Raynal 提交于
      When using soft ecc, if no ooblayout is given, the core automatically
      uses one of the nand_ooblayout_{sp,lp}*() functions to determine the
      layout inside the out of band data.
      
      Until kernel version 4.6, struct nand_ecclayout was used for that
      purpose. During the migration from 4.6 to 4.7, an error shown up in the
      small page layout, in the case oob section is only 8 bytes long.
      
      The layout was using three bytes (0, 1, 2) for ecc, two bytes (3, 4)
      as free bytes, one byte (5) for bad block marker and finally
      two bytes (6, 7) as free bytes, as shown there:
      
      [linux-4.6] drivers/mtd/nand/nand_base.c:52
      static struct nand_ecclayout nand_oob_8 = {
      	.eccbytes = 3,
      	.eccpos = {0, 1, 2},
      	.oobfree = {
      		{.offset = 3,
      		 .length = 2},
      		{.offset = 6,
      		 .length = 2} }
      };
      
      This fixes the current implementation which is incoherent. It
      references bit 3 at the same time as an ecc byte and a free byte.
      
      Furthermore, it is clear with the previous implementation that there
      is only one ecc section with 8 bytes oob sections. We shall return
      -ERANGE in the nand_ooblayout_ecc_sp() function when asked for the
      second section.
      Signed-off-by: NMiquel Raynal <miquel.raynal@free-electrons.com>
      Fixes: 41b207a7 ("mtd: nand: implement the default mtd_ooblayout_ops")
      Cc: <stable@vger.kernel.org>
      Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
      f7f8c175
  2. 10 6月, 2017 1 次提交
    • M
      mtd: nand: add generic helpers to check, match, maximize ECC settings · 2c8f8afa
      Masahiro Yamada 提交于
      Driver are responsible for setting up ECC parameters correctly.
      Those include:
        - Check if ECC parameters specified (usually by DT) are valid
        - Meet the chip's ECC requirement
        - Maximize ECC strength if NAND_ECC_MAXIMIZE flag is set
      
      The logic can be generalized by factoring out common code.
      
      This commit adds 3 helpers to the NAND framework:
      nand_check_ecc_caps - Check if preset step_size and strength are valid
      nand_match_ecc_req - Match the chip's requirement
      nand_maximize_ecc - Maximize the ECC strength
      
      To use the helpers above, a driver needs to provide:
        - Data array of supported ECC step size and strength
        - A hook that calculates ECC bytes from the combination of
          step_size and strength.
      
      By using those helpers, code duplication among drivers will be
      reduced.
      Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
      Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
      2c8f8afa
  3. 01 6月, 2017 7 次提交
  4. 30 5月, 2017 1 次提交
  5. 22 5月, 2017 3 次提交
  6. 16 5月, 2017 1 次提交
  7. 15 5月, 2017 2 次提交
    • T
      mtd: nand: export nand_{read,write}_page_raw() · cc0f51ec
      Thomas Petazzoni 提交于
      The nand_read_page_raw() and nand_write_page_raw() functions might be
      re-used by vendor-specific implementations of the read_page/write_page
      functions. Instead of having vendor-specific code duplicate this code,
      it is much better to export those functions and allow them to be
      re-used.
      Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Reviewed-by: NRichard Weinberger <richard@nod.at>
      Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
      cc0f51ec
    • T
      mtd: nand: add core support for on-die ECC · 785818fa
      Thomas Petazzoni 提交于
      A number of NAND flashes have a capability called "on-die ECC" where the
      NAND chip itself is capable of detecting and correcting errors.
      
      Linux already has support for using the ECC implementation of the NAND
      controller, or a software based ECC implementation, but not for using
      the ECC implementation of the NAND controller. However, such an
      implementation is sometimes useful in situations where the NAND
      controller provides ECC algorithms that are not strong enough for the
      NAND chip used on the system. A typical case is a NAND chip that
      requires a 4-bit ECC, while the NAND controller only provides a 1-bit
      ECC algorithm.
      
      This commit introduces the support for the NAND_ECC_ON_DIE ECC mode:
      
       - Parsing of the "on-die" value for the "nand-ecc-mode" Device Tree
         property
      
       - Handling NAND_ECC_ON_DIE case in nand_scan_tail(). The idea is that
         the vendor specific code for the NAND chip must implement
         ->read_page() and ->write_page(). It may optionally provide its own
         ->read_page_raw() and ->write_page_raw() as well. For OOB operation,
         we assume the standard operations are good enough, but they can be
         overridden by the vendor specific code if needed.
      Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Reviewed-by: NRichard Weinberger <richard@nod.at>
      Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
      785818fa
  8. 03 5月, 2017 1 次提交
  9. 25 4月, 2017 4 次提交
  10. 24 3月, 2017 4 次提交
  11. 09 3月, 2017 12 次提交
  12. 02 3月, 2017 1 次提交
  13. 09 2月, 2017 2 次提交