Merge tag 'qcom-arm64-for-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt64

Qualcomm ARM64 Updates for v4.12

* Fixup MSM8996 SMP2P and add ADSP PIL / SLPI SMP2P node
* Replace PMU compatible w/ A53 specific one
* Add APQ8016 ramoops
* Update MSM8916 hexagon node
* Add PM8994 RTC

* tag 'qcom-arm64-for-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
  arm64: dts: msm8996: Add ADSP PIL node
  arm64: dts: qcom: pm8994: Add rtc node
  arm64: dts: apq8016-sbc: Add ramoops
  arm64: dts: qcom: msm8916: Update hexagon node
  arm64: dts: msm8996: Add SLPI SMP2P dt node.
  arm64: dts: qcom: Replace PMU compatible with a53 specific one
  arm64: dts: qcom: msm8996: Fixup smp2p node
Signed-off-by: NOlof Johansson <olof@lixom.net>

Merge tag 'tegra-for-4.12-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt64

arm64: tegra: Device tree changes for v4.12-rc1

This adds a bunch of features for Tegra186, such as PMC, ethernet, I2C,
SDHCI and GPIO. It also enables various features on the P2771 devkit.

A small fix is made to the compatible string list for the flow
controller on Tegra132 and the IOMMU is enabled for host1x on Tegra210.

* tag 'tegra-for-4.12-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Update the Tegra132 flowctrl compatible string
  arm64: tegra: Add GPU node for Tegra186
  arm64: tegra: Enable IOMMU for host1x on Tegra210
  arm64: tegra: Enable VIC on Tegra210
  arm64: tegra: Add GPIO expanders on P2771
  arm64: tegra: Add power monitors on P2771
  arm64: tegra: Add GPIO keys on P2771
  arm64: tegra: Enable current monitors on P3310
  arm64: tegra: Enable SD/MMC slot on P2771
  arm64: tegra: Enable SDHCI controllers on P3110
  arm64: tegra: Add initial power tree for P3310
  arm64: tegra: Enable ethernet on P3310
  arm64: tegra: Enable I2C controllers on P3310
  arm64: tegra: Invert the PMC interrupt on P3310
  arm64: tegra: Add ethernet support for Tegra186
  arm64: tegra: Add PMC controller on Tegra186
Signed-off-by: NOlof Johansson <olof@lixom.net>

Merge tag 'sunxi-dt-h5-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt64

Allwinner H5 DT changes for 4.12

H5 patches for 4.12, which are mostly related to reworking the H3 DTSI to
be usable on the arm64 H5 DTSI, that shares almost everything with the H3
but the CPU cores.

We then have patches to support the H5 boards on top.

* tag 'sunxi-dt-h5-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  ARM: sunxi: h3/h5: switch apb0-related clocks to r_ccu
  arm64: allwinner: h5: enable USB OTG on Orange Pi PC 2 board
  arm64: allwinner: h5: add support for the Orange Pi PC 2 board
  arm64: allwinner: h5: add Allwinner H5 .dtsi
  ARM: sunxi: h3/h5: add usb_otg and OHCI/EHCI for usbc0 on H3/H5
  arm: sun8i: h3: split Allwinner H3 .dtsi
  arm: sun8i: h3: correct the GIC compatible in H3 to gic-400
  arm: sun8i: h3: drop pinctrl-a10.h inclusion for H3 DTSI
  arm: sun8i: h3: drop skeleton.dtsi inclusion in H3 DTSI
Signed-off-by: NOlof Johansson <olof@lixom.net>

Merge tag 'sunxi-dt64-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt64

Allwinner arm64 DT changes for 4.12

Some patches to enable the PRCM block in the A64

* tag 'sunxi-dt64-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  arm64: allwinner: a64: add R_PIO pinctrl node
  arm64: allwinner: a64: add r_ccu node
Signed-off-by: NOlof Johansson <olof@lixom.net>

Merge tag 'amlogic-dt64-redo' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt64

Amlogic 64-bit DT updates for v4.12
- pinctrl: new pins for audio
- clocks: more clocks exposed for GFX, audio
- new board: Khadas Vim (S905X)
- new board: HwaCom AmazeTV (S905X)
- ethernet phy: add GPIO resets

* tag 'amlogic-dt64-redo' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (41 commits)
  ARM64: dts: meson-gx: Add support for HDMI output
  ARM64: dts: meson-gx: Add shared CMA dma memory pool
  ARM64: dts: meson-gxbb-odroidc2: Enable SARADC node
  dt-bindings: clock: gxbb-clkc: Add GXL compatible variant
  clk: meson-gxbb: Expose GP0 dt-bindings clock id
  clk: meson-gxbb: Add MALI clock IDS
  dt-bindings: clk: gxbb: expose i2s output clock gates
  ARM64: dts: meson-gxl: add spdif output pins
  ARM64: dts: meson-gxl: add i2s output pins
  ARM64: dts: meson-gxbb: add spdif output pins
  ARM64: dts: meson-gxbb: add i2s output pins
  ARM64: dts: meson-gxbb: Add USB Hub GPIO hog
  ARM: dts: meson8b: Add gpio-ranges properties
  ARM: dts: meson8: Add gpio-ranges properties
  ARM64: dts: meson-gxl: Add gpio-ranges properties
  ARM64: dts: meson-gxbb: Add gpio-ranges properties
  ARM64: dts: meson-gx: Add Mali nodes for GXBB and GXL
  ARM64: dts: meson-gxl: Add missing pinctrl pins groups
  ARM64: dts: meson-gx: Prepend GX generic compatible like other nodes
  ARM64: dts: meson-gx: empty line cleanup
  ...
Signed-off-by: NOlof Johansson <olof@lixom.net>

Amlogic clock headers and DT binding updates for v4.12
- add clocks for I2S and Mali

# gpg: Signature made Tue Apr  4 16:07:50 2017 PDT using RSA key ID D3FBC665
# gpg: Good signature from "Kevin Hilman <khilman@kernel.org>" [ultimate]
# gpg:                 aka "Kevin Hilman <khilman@deeprootsystems.com>" [ultimate]
# gpg:                 aka "Kevin Hilman <khilman@gmail.com>" [ultimate]
# gpg:                 aka "Kevin Hilman <khilman@baylibre.com>" [ultimate]

* tag 'amlogic-clk-headers':
  dt-bindings: clock: gxbb-clkc: Add GXL compatible variant
  clk: meson-gxbb: Expose GP0 dt-bindings clock id
  clk: meson-gxbb: Add MALI clock IDS
  dt-bindings: clk: gxbb: expose i2s output clock gates

Add HDMI output and connector nodes.
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>

The HDMI modes needs more CMA memory to be reserved at boot-time.
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>

Now that 3adbf342 "iio: adc: add a driver for the SAR ADC found in
Amlogic Meson SoCs" has added support for the ADC, let's enable it
on Odroid C2.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>

Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
Signed-off-by: NMichael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1490178747-14837-6-git-send-email-narmstrong@baylibre.com

This patch exposes the GP0 PLL clock id in the dt bindings.
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
Signed-off-by: NMichael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1490178747-14837-5-git-send-email-narmstrong@baylibre.com

Add missing MALI clock IDs and expose the muxes and gates in the dt-bindings.
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
Signed-off-by: NMichael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1490177935-9646-2-git-send-email-narmstrong@baylibre.com

Signed-off-by: NJerome Brunet <jbrunet@baylibre.com>
Signed-off-by: NMichael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20170309104154.28295-10-jbrunet@baylibre.com

Now we have driver for the PRCM CCU, switch to use it instead of
old-style clock nodes for apb0-related clocks in sunxi-h3-h5.dtsi .

The mux 3 of R_CCU is still the internal oscillator, which is said to be
16MHz plus minus 30%, and get a measured value of 15MHz~16MHz on my two
H3 boards and one H5 board.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Allwinner A64 have a dedicated pin controller to manage the PL pin bank.
As the driver and the required clock support are added, add the device
node for it.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

A64 SoC have a CCU (r_ccu) in PRCM block.

Add the device node for it.

The mux 3 of R_CCU is an internal oscillator, which is 16MHz according
to the user manual, and has only 30% accuracy based on our experience
on older SoCs. The real mesaured value of it on two Pine64 boards is
around 11MHz, which is around 70% of 16MHz.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Update the Tegra132 flowctrl compatible string to include
"nvidia,tegra132-flowctrl" so it is aligned with the flowctrl binding
documentation.
Signed-off-by: NJon Hunter <jonathanh@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

Add the DT node for the GP10B GPU on Tegra186.
Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

Merge tag 'v4.12-rockchip-dts64-symlinks-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64

Pull "Rockchip dts64 updates (using arm/arm64 symlinks) for 4.12 part1" from Heiko Stübner

Rockchip dts changes based on the newly created arm/arm64 symlinks.
The core addition is the support for the rk3399-based Gru family of
ChromeOS devices, like the Kevin board which is the recently released
Samsung Chromebook Plus. Additionally the usb3 controllers are added
to rk3399 as they're used on Gru devices and even without full type-c
support they can at least drive usb2 devices already.

* tag 'v4.12-rockchip-dts64-symlinks-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: dts: rockchip: add regulator info for Kevin digitizer
  arm64: dts: rockchip: describe Gru/Kevin OPPs + CPU regulators
  arm64: dts: rockchip: add Gru/Kevin DTS
  dt-bindings: Document rk3399 Gru/Kevin
  arm64: dts: rockchip: support dwc3 USB for rk3399

Merge tag 'v4.12-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64

Pull "Rockchip dts64 updates for 4.12 part1" from Heiko Stübner:

Contains various changes for the rk3368 (dma, i2s, disable mailbox per
default, mmc-resets) and also removes the wrongly added idle states, that
do not match the hardware's capabilities, as well as some general rk3399
pcie fixes as well as also the mmc resets.

* tag 'v4.12-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: dts: rockchip: fix PCIe domain number for rk3399
  arm64: dts: rockchip: add rk3399 dw-mmc resets
  arm64: dts: rockchip: add rk3368 dw-mmc resets
  arm64: dts: rockchip: disable mailbox of RK3368 SoCs per default
  arm64: dts: rockchip: add i2s nodes support for RK3368 SoCs
  arm64: dts: rockchip: add dmac nodes for rk3368 SoCs
  arm64: dts: rockchip: remove wrongly added idle states on rk3368
  arm64: dts: rockchip: sort rk3399-pcie by unit address

Pull "Broadcom devicetree-arm64 changes for 4.12" from Florian Fainelli:

This pull request contains Broadcom ARM64-based SoCs Device Tree updates for
4.12, please pull the following:

- Rob enables the cryptographic block on Northstar 2 (SPU) by adding the proper
  Device Tree nodes

- Jon replaces all occurences of: status = "ok" with status = "okay" to better
  conform to the Device Tree specification

* tag 'arm-soc/for-4.12/devicetree-arm64' of http://github.com/Broadcom/stblinux:
  arm64: dts: NS2: convert "ok" to "okay"
  arm64: dts: NS2: Add Broadcom SPU driver DT entry

Pull "mvebu dt64 for 4.12 (part 1)" from Gregory CLEMENT:

- Add RTC support on Armada 7k/8k
- Improve i2c support on Armada 37xx
- Add gpio expander and RTC on Armada 3720 board
- Improve USB3 support on Armada 37xx
- Add network support on Armada 7k/8k

* tag 'mvebu-dt64-4.12-1' of git://git.infradead.org/linux-mvebu:
  arm64: marvell: dts: add PPv2.2 description to Armada 7K/8K
  ARM64: dts: marvell: armada-3720 add RTC support
  ARM64: dts: marvell: armada-3720-db: Add phy for USB3
  ARM64: dts: marvell: armada-37xx: Add clock resource for USB3
  ARM64: dts: marvell: armada-37xx: Fix interrupt mapping for USB3
  ARM64: dts: marvell: armada-3720-db: add gpio expander
  ARM64: dts: marvell: armada37xx: add address and size property for i2c cells
  arm64: dts: marvell: add RTC description for Armada 7K/8K

Merge tag 'uniphier-dt64-v4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into next/dt64

Pull "UniPhier ARM64 SoC DT updates for v4.12" from Masahiro Yamada:

- Fix W=* build warnings
- Add pinctrl properties to eMMC nodes
- Fix resets properties of USB nodes

* tag 'uniphier-dt64-v4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
  arm64: dts: uniphier: re-order reset deassertion of USB of LD11
  arm64: dts: uniphier: add pinctrl property to eMMC node for LD11/LD20
  arm64: dts: uniphier: move memory node below aliases node
  arm64: dts: uniphier: fix no unit name warnings

Move and update device tree files as part of transition from Broadcom
Vulcan to Cavium ThunderX2.

The changes are to:
 * rename dts/broadcom/vulcan.dtsi to cavium/thunder2-99xx.dtsi,
   update cpu cores to be "cavium,thunder2", and update SoC to be
   "cavium,thunderx2-cn9900"
 * move SoC dts/broadcom/vulcan-eval.dtsi to cavium/thunder2-99xx.dtsi
   and update board name string
 * Update dts/broadcom/Makefile not to build vulcan dtbs
 * Update dts/cavium/Makefile to build thunder2 dtbs

No changes to the dts contents except the updated "compatible" and
"model" properties.
Signed-off-by: NJayachandran C <jnair@caviumnetworks.com>
Reviewed-by: NMatthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Add documentation for Cavium's ThunderX2 CN99XX ARM64 processor. This
SoC will use "cavium,thunderx2-cn9900" as the compatible property.

Also add a documentation entry for the "cavium,thunder2" cpu core
present in these SoCs.
Signed-off-by: NJayachandran C <jnair@caviumnetworks.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Add ADSP node required for Qualcomm ADSP Peripheral Image Loader.
Signed-off-by: NSarangdhar Joshi <spjoshi@codeaurora.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

Declare a ramoops memory segment to aid debugging for those without UART
access. Verified to carry console log when holding volume down for 15
seconds.

No memory region for ramoops-like support was found downstream, so the
arbitrarily picked region is the last MB of System RAM.

Cc: John Stultz <john.stultz@linaro.org>
Cc: Mart Raudsepp <leio@gentoo.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

It's necessary to reference the xo clock and cx supply, so specify these
in the node. Also move the Hexagon smd-edge into the hexagon node, to
enable SSR.

As cxo is not yet available we reference the fixed version of cxo for
now, which will work until proper power management is implemented.
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

Add smp2p support to communicate with slpi processor.
Signed-off-by: NAvaneesh Kumar Dwivedi <akdwived@codeaurora.org>
Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

The PMU on msm8916 is for the cortex-a53 type CPU. Update the
compatible to the more specific one so we can get the a53
specific events out of the PMU.
Signed-off-by: NStephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

The SMEM state property name changes between the integration branch and
mainline, update to use the correct one.

Fixes: 2f45d9fc ("arm64: dts: msm8996: Add SMP2P and APCS nodes")
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: NSarangdhar Joshi <spjoshi@codeaurora.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

Add EE and AO domains pins for the spdif output to the gxl device tree.
Acked-by: NKevin Hilman <khilman@baylibre.com>
Signed-off-by: NJerome Brunet <jbrunet@baylibre.com>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>

Add EE and AO domains pins for the i2s output clocks and data the gxl
device tree
Acked-by: NKevin Hilman <khilman@baylibre.com>
Signed-off-by: NJerome Brunet <jbrunet@baylibre.com>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>

Add EE and AO domains pins for the spdif output to the gxbb device tree.
Acked-by: NKevin Hilman <khilman@baylibre.com>
Signed-off-by: NJerome Brunet <jbrunet@baylibre.com>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>

Add EE and AO domains pins for the i2s output clocks and data to the gxbb
device tree.
Acked-by: NKevin Hilman <khilman@baylibre.com>
Signed-off-by: NJerome Brunet <jbrunet@baylibre.com>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>

The ODroid-C2 on-board USB Hub needs to to have it's reset signal set to
high level in order to be enumerated by the USB Host Controller.

But this management must be part of the currently in-development Generic
Power Sequence patch that will allow a USB Controller driver to start and stop
a power sequence associated to the USB Bus.

In the meantime, a simple USB Hog will work to enable the USB Hub.
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>

Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>

Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>

Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>