- 03 3月, 2013 40 次提交
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由 James Hogan 提交于
Various file systems indirectly use metag_code_cache_flush_all(), so when they're built as modules we get build errors like the following: ERROR: "metag_code_cache_flush_all" [fs/xfs/xfs.ko] undefined! Therefore export this function to modules to fix the errors. This was hit by a randconfig build. Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
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由 James Hogan 提交于
Rename setup_txprivext() to setup_priv() and add initialisation of some more per-thread privilege protection registers: - TxPRIVSYSR: 0x04400000-0x047fffff 0x05000000-0x07ffffff 0x84000000-0x87ffffff - TxPIOREG: 0x02000000-0x02ffffff 0x04800000-0x048fffff - TxSYREG: 0x04000000-0x04000fff (except write fetch system event) Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
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由 James Hogan 提交于
Define PRIV_BITS using explicit constants from <asm/metag_regs.h> rather than with a hard coded value. This also adds a couple of missing definitions for the TXPRIVEXT priv bits for protecting writes to TXTIMER and the trace registers. Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
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由 James Hogan 提交于
Sort includes in kernel/setup.c. Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
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由 James Hogan 提交于
Define rmb(), cpu_relax(), and CPUINFO_PROC for Meta so that the perf tools can be built for Meta. Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Paul Mackerras <paulus@samba.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
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由 James Hogan 提交于
Add boot time check for whether LNKGET/LNKSET go through or around the cache. Depending on the configuration an info message (no harm), warning (technically wrong but no harm), or big WARN (expect failure in either kernel or userland) may be emitted if the behaviour is not as expected: Configuration Hardware Response ------------------------------------------ -------- -------- AROUND_CACHE through pr_info !AROUND_CACHE && ATOMICITY_LNKGET around WARN (kernel) " && !ATOMICITY_LNKGET && SMP around WARN (user) " " && !SMP around pr_warn Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
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由 James Hogan 提交于
metag_cache_probe() is only called from setup_arch(), so add the __init attribute to it. Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
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由 James Hogan 提交于
Add basic JTAG Debug Adapter (DA) support so that drivers which communicate with the DA can detect whether one is actually present (otherwise the target will halt indefinitely). This allows the metag_da TTY driver and imgdafs filesystem driver to be built, updates defconfigs, and sets up the metag_da console early if it's configured in. Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
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由 James Hogan 提交于
Adapt checkstack.pl so that it works for metag. Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
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由 James Hogan 提交于
Add ftrace support for metag. Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Ingo Molnar <mingo@redhat.com> Reviewed-by: NSteven Rostedt <rostedt@goodmis.org>
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由 James Hogan 提交于
Add Perf support for metag. Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Paul Mackerras <paulus@samba.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
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由 James Hogan 提交于
Add metag build infrastructure. Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
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由 James Hogan 提交于
Add [!]METAG to a couple of Kconfig dependencies in lib/Kconfig.debug. Don't allow stack utilization instrumentation on metag, and allow building with frame pointers. Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: "Paul E. McKenney" <paul.mckenney@linaro.org> Cc: Akinobu Mita <akinobu.mita@gmail.com> Cc: Michel Lespinasse <walken@google.com> Cc: Catalin Marinas <catalin.marinas@arm.com>
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由 James Hogan 提交于
Commit cc2383ec ("mm: introduce arch-specific vma flag VM_ARCH_1") merged in v3.7-rc1. The above commit combined several arch-specific vma flags into one, and in the process it changed the VM_GROWSUP definition to depend on specific architectures rather than CONFIG_STACK_GROWSUP. Therefore add an ifdef for CONFIG_METAG to also set VM_GROWSUP. Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Cc: Konstantin Khlebnikov <khlebnikov@openvz.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Mel Gorman <mgorman@suse.de> Cc: Michel Lespinasse <walken@google.com> Cc: Al Viro <viro@zeniv.linux.org.uk> Cc: linux-mm@kvack.org
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由 James Hogan 提交于
Add the remaining metag header files: - byteorder.h, swab.h (byte order and swapping) - barrier.h, cpu.h. hwthread.h, processor.h (hardware thread related) - bug.h, elf.h, gpio.h, linkage.h, resource.h (other) Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
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由 James Hogan 提交于
Add stack unwinding support for metag. Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
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由 James Hogan 提交于
Add optimised library functions for metag. Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
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由 James Hogan 提交于
Add DMA mapping code. Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
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由 James Hogan 提交于
Add SMP support for metag. This allows Linux to take control of multiple hardware threads on a single Meta core, treating them as separate Linux CPUs. Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
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由 James Hogan 提交于
Add basic metag documentation. This includes an outline description of the ABIs (including syscall ABI) and calling conventions, similar to the one in Documentation/frv/. Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Cc: Rob Landley <rob@landley.net> Cc: Al Viro <viro@ZenIV.linux.org.uk> Cc: linux-doc@vger.kernel.org
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由 James Hogan 提交于
Add header files to implement Meta hardware thread locks (used by some other atomic operations), atomics, spinlocks, and bitops. There are 2 main types of atomic primitives for metag (in addition to IRQs off on UP): - LOCK instructions provide locking between hardware threads. - LNKGET/LNKSET instructions provide load-linked/store-conditional operations allowing for lighter weight atomics on Meta2 LOCK instructions allow for hardware threads to acquire voluntary or exclusive hardware thread locks: - LOCK0 releases exclusive and voluntary lock from the running hardware thread. - LOCK1 acquires the voluntary hardware lock, blocking until it becomes available. - LOCK2 implies LOCK1, and additionally acquires the exclusive hardware lock, blocking all other hardware threads from executing. Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
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由 James Hogan 提交于
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
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由 James Hogan 提交于
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
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由 James Hogan 提交于
Add metag system call and gateway page interfaces. The metag architecture port uses the generic system call numbers from asm-generic/unistd.h, as well as a user gateway page mapped at 0x6ffff000 which contains fast atomic primitives (depending on SMP) and a fast method of accessing TLS data. System calls use the SWITCH instruction with the immediate 0x440001 to signal a system call. Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
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由 James Hogan 提交于
Meta core internal interrupts (from HWSTATMETA and friends) are vectored onto the TR1 core trigger for the current thread. This is demultiplexed in irq-metag.c to individual Linux IRQs for each internal interrupt. External SoC interrupts (from HWSTATEXT and friends) are vectored onto the TR2 core trigger for the current thread. This is demultiplexed in irq-metag-ext.c to individual Linux IRQs for each external SoC interrupt. The external irqchip has devicetree bindings for configuring the number of irq banks and the type of masking available. Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Rob Landley <rob@landley.net> Cc: Dom Cobley <popcornmix@gmail.com> Cc: Simon Arlott <simon@fire.lp0.eu> Cc: Viresh Kumar <viresh.kumar@linaro.org> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: devicetree-discuss@lists.ozlabs.org Cc: linux-doc@vger.kernel.org
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由 James Hogan 提交于
Add core IRQ handling for metag. The code in irq.c exposes the TBX signal numbers as Linux IRQs. Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
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由 James Hogan 提交于
Add trap code for metag. At the lowest level Meta traps (and return from interrupt instruction - RTI) simply swap the PC and PCX registers and optionally toggle the interrupt status bit (ISTAT). Low level TBX code in tbipcx.S handles the core context save, determine the TBX signal number based on the core trigger that fired (using the TXSTATI status register), and call TBX signal handlers (mostly in traps.c) via a vector table. Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Cc: Al Viro <viro@zeniv.linux.org.uk>
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由 James Hogan 提交于
Add time keeping code for metag. Meta hardware threads have 2 timers. The background timer (TXTIMER) is used as a free-running time base, and the interrupt timer (TXTIMERI) is used for the timer interrupt. Both counters traditionally count at approximately 1MHz. Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Cc: John Stultz <johnstul@us.ibm.com> Cc: Thomas Gleixner <tglx@linutronix.de>
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由 James Hogan 提交于
The ptrace interface for metag provides access to some core register sets using the PTRACE_GETREGSET and PTRACE_SETREGSET operations. The details of the internal context structures is abstracted into user API structures to both ease use and allow flexibility to change the internal context layouts. Copyin and copyout functions for these register sets are exposed to allow signal handling code to use them to copy to and from the signal context. struct user_gp_regs (NT_PRSTATUS) provides access to the core general purpose register context. struct user_cb_regs (NT_METAG_CBUF) provides access to the TXCATCH* registers which contains information abuot a memory fault, unaligned access error or watchpoint. This can be modified to alter the way the fault is replayed on resume ("catch replay"), or to prevent the replay taking place. struct user_rp_state (NT_METAG_RPIPE) provides access to the state of the Meta read pipeline which can be used to hide memory latencies in hand optimised data loops. Extended DSP register state, DSP RAM, and hardware breakpoint registers aren't yet exposed through ptrace. Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Denys Vlasenko <vda.linux@googlemail.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Tony Lindgren <tony@atomide.com> Cc: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com>
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由 James Hogan 提交于
Add device tree files to arch/metag. Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Reviewed-by: NVineet Gupta <vgupta@synopsys.com>
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由 James Hogan 提交于
Add signal handling code for metag. Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Cc: Al Viro <viro@zeniv.linux.org.uk>
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由 James Hogan 提交于
Add some TCM support Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
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由 James Hogan 提交于
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
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由 James Hogan 提交于
Add huge TLB support to the metag architecture. Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
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由 James Hogan 提交于
Meta has instructions for accessing: - bytes - GETB (1 byte) - words - GETW (2 bytes) - doublewords - GETD (4 bytes) - longwords - GETL (8 bytes) All accesses must be aligned. Unaligned accesses can be detected and made to fault on Meta2, however it isn't possible to fix up unaligned writes so we don't bother fixing up reads either. This patch adds metag memory handling code including: - I/O memory (io.h, ioremap.c): Actually any virtual memory can be accessed with these helpers. A part of the non-MMUable address space is used for memory mapped I/O. The ioremap() function is implemented one to one for non-MMUable addresses. - User memory (uaccess.h, usercopy.c): User memory is directly accessible from privileged code. - Kernel memory (maccess.c): probe_kernel_write() needs to be overwridden to use the I/O functions when doing a simple aligned write to non-writecombined memory, otherwise the write may be split by the generic version. Note that due to the fact that a portion of the virtual address space is non-MMUable, and therefore always maps directly to the physical address space, metag specific I/O functions are made available (metag_in32, metag_out32 etc). These cast the address argument to a pointer so that they can be used with raw physical addresses. These accessors are only to be used for accessing fixed core Meta architecture registers in the non-MMU region, and not for any SoC/peripheral registers. Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
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由 James Hogan 提交于
Add memory management files for metag. Meta's 32bit virtual address space is split into two halves: - local (0x08000000-0x7fffffff): traditionally local to a hardware thread and incoherent between hardware threads. Each hardware thread has it's own local MMU table. On Meta2 the local space can be globally coherent (GCOn) if the cache partitions coincide. - global (0x88000000-0xffff0000): coherent and traditionally global between hardware threads. On Meta2, each hardware thread has it's own global MMU table. The low 128MiB of each half is non-MMUable and maps directly to the physical address space: - 0x00010000-0x07ffffff: contains Meta core registers and maps SoC bus - 0x80000000-0x87ffffff: contains low latency global core memories Linux usually further splits the local virtual address space like this: - 0x08000000-0x3fffffff: user mappings - 0x40000000-0x7fffffff: kernel mappings Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
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由 James Hogan 提交于
Add cache and TLB handling code for metag, including the required callbacks used by MM switches and DMA operations. Caches can be partitioned between the hardware threads and the global space, however this is usually configured by the bootloader so Linux doesn't make any changes to this configuration. TLBs aren't configurable, so only need consideration to flush them. On Meta1 the L1 cache was VIVT which required a full flush on MM switch. Meta2 has a VIPT L1 cache so it doesn't require the full flush on MM switch. Meta2 can also have a writeback L2 with hardware prefetch which requires some special handling. Support is optional, and the L2 can be detected and initialised by Linux. Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
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由 James Hogan 提交于
Add source files from the Thread Binary Interface (TBI) library which provides useful low level operations and traps/context management. Among other things it handles interrupt/exception/syscall entry (in tbipcx.S). Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
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由 James Hogan 提交于
Add the main header for the Thread Binary Interface (TBI) library which provides useful low level operations and trap/context management. Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
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由 James Hogan 提交于
Add boot code for metag. Due to the multi-threaded nature of Meta it is not uncommon for an RTOS or bare metal application to be started on other hardware threads by the bootloader. Since there is a single MMU switch which affects all threads, the MMU is traditionally configured by the bootloader prior to starting Linux. The bootloader passes a structure to Linux which among other things contains information about memory regions which have been mapped. Linux then assumes control of the local heap memory region. A kernel arguments string pointer or a flattened device tree pointer can be provided in the third argument. Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
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