- 29 5月, 2011 4 次提交
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由 Mike Frysinger 提交于
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Any consumer that needs to access the MMRs has to provide these helpers, so make the default into useless stubs. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Eric W. Biederman 提交于
32bit and 64bit on x86 are tested and working. The rest I have looked at closely and I can't find any problems. setns is an easy system call to wire up. It just takes two ints so I don't expect any weird architecture porting problems. While doing this I have noticed that we have some architectures that are very slow to get new system calls. cris seems to be the slowest where the last system calls wired up were preadv and pwritev. avr32 is weird in that recvmmsg was wired up but never declared in unistd.h. frv is behind with perf_event_open being the last syscall wired up. On h8300 the last system call wired up was epoll_wait. On m32r the last system call wired up was fallocate. mn10300 has recvmmsg as the last system call wired up. The rest seem to at least have syncfs wired up which was new in the 2.6.39. v2: Most of the architecture support added by Daniel Lezcano <dlezcano@fr.ibm.com> v3: ported to v2.6.36-rc4 by: Eric W. Biederman <ebiederm@xmission.com> v4: Moved wiring up of the system call to another patch v5: ported to v2.6.39-rc6 v6: rebased onto parisc-next and net-next to avoid syscall conflicts. v7: ported to Linus's latest post 2.6.39 tree. > arch/blackfin/include/asm/unistd.h | 3 ++- > arch/blackfin/mach-common/entry.S | 1 + Acked-by: NMike Frysinger <vapier@gentoo.org> Oh - ia64 wiring looks good. Acked-by: NTony Luck <tony.luck@intel.com> Signed-off-by: NEric W. Biederman <ebiederm@xmission.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 27 5月, 2011 2 次提交
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由 Mike Frysinger 提交于
The Blackfin arch, like the x86 arch, needs to adjust the PC manually after a breakpoint is hit as normally this is handled by the remote gdb. However, rather than starting another arch ifdef mess, create a common GDB_ADJUSTS_BREAK_OFFSET define for any arch to opt-in via their kgdb.h. Signed-off-by: NMike Frysinger <vapier@gentoo.org> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Jason Wessel <jason.wessel@windriver.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Acked-by: NPaul Mundt <lethal@linux-sh.org> Acked-by: NDongdong Deng <dongdong.deng@windriver.com> Cc: Sergei Shtylyov <sshtylyov@mvista.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Mike Frysinger 提交于
Signed-off-by: NMike Frysinger <vapier@gentoo.org> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Jason Wessel <jason.wessel@windriver.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Sergei Shtylyov <sshtylyov@mvista.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 25 5月, 2011 12 次提交
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由 Scott Jiang 提交于
Now that the Blackfin machine drivers have been updated to the multicomponent support, update the resources to match. The pin settings are now a board issue and removed from the driver. Signed-off-by: NScott Jiang <scott.jiang@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Since the bfin_write() func needs proper type information in order to expand into the right bfin_writeX() variant, preserve the addr's type when setting up the local __addr. Otherwise the helpers will detect the variant based upon sizeof(void) which is almost never right. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Use tabs instead of spaces to indent. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
The BF537 SIC combines the gpio port H mask A interrupts with the emac rx interrupt, so we need to demux this in software. It also combines the gpio port H mask B and the emac tx interrupts, and the watchdog and port F mask B interrupts, but since we don't support mask B yet, just add the defines for now. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
The SIC interrupt line muxing that the bf537 does is specific to this CPU (thankfully), so rip it out of the common code and move it to a bf537-specific file. This tidies up the common code significantly. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
These are only used in a few internal Blackfin places, so move the irq prototypes out of the global header and into the internal irq one. No functional changes other than shuffling locales. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
These are in linux/ptrace.h, so no need for us to duplicate them. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Sonic Zhang 提交于
Make sure we mark cache flushing as unsafe to kgdb in SMP mode so that kgdb doesn't flush things incorrectly on us. Signed-off-by: NSonic Zhang <sonic.zhang@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Not sure when we stopped using this field, but nothing in the tree uses this now, so punt it. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Start a new common IRQ header and move all of the CEC pieces there. This lets the individual part headers worry just about its SIC defines. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Sonic Zhang 提交于
Since the on-chip L1 regions are not cacheable, there is no point in trying to flush/invalidate them. Plus, older Blackfin parts like to trigger an exception (like BF533-0.3). Signed-off-by: NSonic Zhang <sonic.zhang@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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- 14 4月, 2011 1 次提交
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由 Graf Yang 提交于
When suspending/resuming, the common task freezing code will run in parallel and freeze processes on each core. This is because the code uses the non-smp version of memory barriers (as well it should). The Blackfin smp barrier logic at the moment contains the cache sync logic, but the non-smp barriers do not. This is incorrect as Rafel summarized: > ... > The existing memory barriers are SMP barriers too, but they are more > than _just_ SMP barriers. At least that's how it is _supposed_ to be > (eg. rmb() is supposed to be stronger than smp_rmb()). > ... > However, looking at the blackfin's definitions of SMP barriers I see > that it uses extra stuff that should _also_ be used in the definitions > of the mandatory barriers. > ... URL: http://lkml.org/lkml/2011/4/13/11 LKML-Reference: <BANLkTi=F-C-vwX4PGGfbkdTBw3OWL-twfg@mail.gmail.com> Signed-off-by: NGraf Yang <graf.yang@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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- 31 3月, 2011 1 次提交
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由 Lucas De Marchi 提交于
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: NLucas De Marchi <lucas.demarchi@profusion.mobi>
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- 26 3月, 2011 1 次提交
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由 Mike Frysinger 提交于
The le.h header requires things like test_bit to be declared, so we need to move its inclusion to after the point where that happens. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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- 24 3月, 2011 3 次提交
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由 Akinobu Mita 提交于
minix bit operations are only used by minix filesystem and useless by other modules. Because byte order of inode and block bitmaps is different on each architecture like below: m68k: big-endian 16bit indexed bitmaps h8300, microblaze, s390, sparc, m68knommu: big-endian 32 or 64bit indexed bitmaps m32r, mips, sh, xtensa: big-endian 32 or 64bit indexed bitmaps for big-endian mode little-endian bitmaps for little-endian mode Others: little-endian bitmaps In order to move minix bit operations from asm/bitops.h to architecture independent code in minix filesystem, this provides two config options. CONFIG_MINIX_FS_BIG_ENDIAN_16BIT_INDEXED is only selected by m68k. CONFIG_MINIX_FS_NATIVE_ENDIAN is selected by the architectures which use native byte order bitmaps (h8300, microblaze, s390, sparc, m68knommu, m32r, mips, sh, xtensa). The architectures which always use little-endian bitmaps do not select these options. Finally, we can remove minix bit operations from asm/bitops.h for all architectures. Signed-off-by: NAkinobu Mita <akinobu.mita@gmail.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NGreg Ungerer <gerg@uclinux.org> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Roman Zippel <zippel@linux-m68k.org> Cc: Andreas Schwab <schwab@linux-m68k.org> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: Michal Simek <monstr@monstr.eu> Cc: "David S. Miller" <davem@davemloft.net> Cc: Hirokazu Takata <takata@linux-m32r.org> Acked-by: NRalf Baechle <ralf@linux-mips.org> Acked-by: NPaul Mundt <lethal@linux-sh.org> Cc: Chris Zankel <chris@zankel.net> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Akinobu Mita 提交于
As the result of conversions, there are no users of ext2 non-atomic bit operations except for ext2 filesystem itself. Now we can put them into architecture independent code in ext2 filesystem, and remove from asm/bitops.h for all architectures. Signed-off-by: NAkinobu Mita <akinobu.mita@gmail.com> Cc: Jan Kara <jack@suse.cz> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Akinobu Mita 提交于
Introduce little-endian bit operations to the big-endian architectures which do not have native little-endian bit operations and the little-endian architectures. (alpha, avr32, blackfin, cris, frv, h8300, ia64, m32r, mips, mn10300, parisc, sh, sparc, tile, x86, xtensa) These architectures can just include generic implementation (asm-generic/bitops/le.h). Signed-off-by: NAkinobu Mita <akinobu.mita@gmail.com> Cc: Richard Henderson <rth@twiddle.net> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Mikael Starvik <starvik@axis.com> Cc: David Howells <dhowells@redhat.com> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Kyle McMartin <kyle@mcmartin.ca> Cc: Matthew Wilcox <willy@debian.org> Cc: Grant Grundler <grundler@parisc-linux.org> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Kazumoto Kojima <kkojima@rr.iij4u.or.jp> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: Chris Zankel <chris@zankel.net> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: NHans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Acked-by: N"H. Peter Anvin" <hpa@zytor.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 23 3月, 2011 2 次提交
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由 Mike Frysinger 提交于
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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- 18 3月, 2011 6 次提交
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由 Mike Frysinger 提交于
Hook up name_to_handle_at, open_by_handle_at, and clock_adjtime. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Philippe Gerum 提交于
This patch fixes the Blackfin irqflags to make them I-pipe aware anew, after the introduction of the hard_local_irq_*() API. Signed-off-by: NPhilippe Gerum <rpm@xenomai.org> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Philippe Gerum 提交于
This patch introduces Blackfin-specific bits to support the current tip of the interrupt pipeline development, mainly: - 2/3-level interrupt maps (sparse IRQs) - generic virq handling - sysinfo v2 format for ipipe_get_sysinfo() Signed-off-by: NPhilippe Gerum <rpm@xenomai.org> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Sonic Zhang 提交于
In order to safely work around anomaly 05000491, we have to execute IFLUSH from L1 instruction sram. The trouble with multi-core systems is that all L1 sram is visible only to the active core. So we can't just place the functions into L1 and call it directly. We need to setup a jump table and place the entry point in external memory. This will call the right func based on the active core. In the process, convert from the manual relocation of a small bit of code into Core B's L1 to the more general framework we already have in place for loading arbitrary pieces of code into L1. Signed-off-by: NSonic Zhang <sonic.zhang@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Graf Yang 提交于
Re-use some of the existing cpu hotplugging code in the process. Signed-off-by: NGraf Yang <graf.yang@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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- 04 2月, 2011 1 次提交
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由 Sonic Zhang 提交于
The RX lock is used to protect the RX buffer from concurrent access in DMA mode between the timer and RX interrupt routines. It is independent from the uart lock which is used to protect the TX buffer. It is possible for a uart TX transfer to be started up from the RX interrupt handler if low latency is enabled. So we need to split the locks to avoid deadlocking in this situation. In PIO mode, the RX lock is not necessary because the handle_simple_irq and handle_level_irq functions ensure driver interrupt handlers are called once on one core. And now that the RX path has its own lock, the TX interrupt has nothing to do with the RX path, so disabling it at the same time. Signed-off-by: NSonic Zhang <sonic.zhang@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 10 1月, 2011 7 次提交
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由 Mike Frysinger 提交于
Any consumer of dpmc.h expects to use VR_CTL, so also pull in the new mach/pll.h header for those functions. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Graf Yang 提交于
Since we're breaking apart some inter-header dependencies to avoid more circular loops, move the blackfin_core_id() definition to the func that it is based upon. Signed-off-by: NGraf Yang <graf.yang@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
The SMP code needs "asmlinkage" which linkage.h provides. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Graf Yang 提交于
Common code expects these to be defined for SMP ports, so add them. Signed-off-by: NGraf Yang <graf.yang@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
The common asm-generic non-atomic bitops.h defines test_bit() for us, but we need to use our own version. So redirect the definition of this func to avoid having to inline the rest of the asm-generic file. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Graf Yang 提交于
The external functions are named __raw_xxx, not arch_xxx, so rename the prototypes to match reality. This fixes some simple build errors in the bfin_ksyms.c code which exports these helpers to modules. Signed-off-by: NGraf Yang <graf.yang@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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