- 17 11月, 2010 2 次提交
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由 Uwe Kleine-König 提交于
This makes it more assembler friendly and allows it to be used in situation that need an unsigned long and not a pointer. Also the naming is clearer. IOMEM is introduced without IMX_ prefix as it is used this way in more than one ARM subarch and it might become globally available soon. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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由 Uwe Kleine-König 提交于
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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- 27 10月, 2010 3 次提交
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由 Hagen Paul Pfeifer 提交于
Use the new {max,min}3 macros to save some cycles and bytes on the stack. This patch substitutes trivial nested macros with their counterpart. Signed-off-by: NHagen Paul Pfeifer <hagen@jauu.net> Cc: Joe Perches <joe@perches.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Hartley Sweeten <hsweeten@visionengravers.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: Roland Dreier <rolandd@cisco.com> Cc: Sean Hefty <sean.hefty@intel.com> Cc: Pekka Enberg <penberg@cs.helsinki.fi> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Peter Zijlstra 提交于
Since we no longer need to provide KM_type, the whole pte_*map_nested() API is now redundant, remove it. Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl> Acked-by: NChris Metcalf <cmetcalf@tilera.com> Cc: David Howells <dhowells@redhat.com> Cc: Hugh Dickins <hughd@google.com> Cc: Rik van Riel <riel@redhat.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: David Miller <davem@davemloft.net> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Peter Zijlstra 提交于
Keep the current interface but ignore the KM_type and use a stack based approach. The advantage is that we get rid of crappy code like: #define __KM_PTE \ (in_nmi() ? KM_NMI_PTE : \ in_irq() ? KM_IRQ_PTE : \ KM_PTE0) and in general can stop worrying about what context we're in and what kmap slots might be appropriate for that. The downside is that FRV kmap_atomic() gets more expensive. For now we use a CPP trick suggested by Andrew: #define kmap_atomic(page, args...) __kmap_atomic(page) to avoid having to touch all kmap_atomic() users in a single patch. [ not compiled on: - mn10300: the arch doesn't actually build with highmem to begin with ] [akpm@linux-foundation.org: coding-style fixes] [akpm@linux-foundation.org: fix up drivers/gpu/drm/i915/intel_overlay.c] Acked-by: NRik van Riel <riel@redhat.com> Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl> Acked-by: NChris Metcalf <cmetcalf@tilera.com> Cc: David Howells <dhowells@redhat.com> Cc: Hugh Dickins <hughd@google.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: David Miller <davem@davemloft.net> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Dave Airlie <airlied@linux.ie> Cc: Li Zefan <lizf@cn.fujitsu.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 26 10月, 2010 26 次提交
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由 Dinh Nguyen 提交于
Add function definition for irq_chip.set_wake to enable GPIO to wake-up the system. This patch has been tested on a MX51 Babbage system that had suspend code implemented. The set_wake implementation is necessary for a GPIO to wake up a system from suspend. Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Dinh Nguyen 提交于
Add functionality for the power button on MX51 Babbage board. Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Dinh Nguyen 提交于
Add imx_add_gpio_keys function to add gpio-keys in plat-mxc Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Rogerio Pimentel 提交于
Commit (06606ff1) "ARM: imx: dynamically register spi_imx devices (imx31)" registered the wrong SPI port for mx31_3ds board. mx31_3ds uses SPI2 to connect to the MC13783 PMIC. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NRogerio Pimentel <rogerio.pimentel@freescale.com> Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Rogerio Pimentel 提交于
The function mxc_expio_init returns 0 on success, so fix the logic for printing the error case. Also fixed the wording on the error message. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NRogerio Pimentel <rogerio.pimentel@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Nicolas Ferre 提交于
This adds the support of atmel-mci sd/mmc driver in at91sam9g45 devices and board files. This also configures the DMA controller slave interface for at_hdmac dmaengine driver. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
When using CP15 cache operations (c7), we make sure that Rd (r0) is actually 0 as ARM 926 TRM is saying. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
For power management at91_pm_enter() routine, use the cpu_do_idle() for a rock solid "wait for interrupt" implementation. For AT91SAM9 ARM 926 based chips, we can exceed the cache line length as we can access RAM even while in self-refresh mode. We keep plain access to CP15 for at91rm9200 as this feature is not available: instructions have to be in a single cache line. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
Several at91sam9 chips need the alternate reset procedure to be sure to halt SDRAM smoothly before resetting the chip. This is an extension of previous patch "Fix AT91SAM9G20 reset" to all chips affected. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
Generalize assembler reset routine to allow use on several at91sam9 chips. This patch replace double definitions of SDRAM controller registers and RSTC registers with use of classical header files. For this rework, we remove the not needed icache flush as it is already done in the calling function: arm_machine_restart(). Rename at91sam9g20_reset.S to generalize to several chips. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
Preparing next patch with longer names Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Peter Horton 提交于
If the SDRAM is not cleanly shutdown before reset it can be left driving the bus, which then stops the bootloader booting from NAND. Signed-off-by: NPeter Horton <phorton@bitbox.co.uk> [nicolas.ferre@atmel.com: change file header line order] Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Peter Gsellmann 提交于
Board is a carrier board for Stamp9G20, with additional peripherals for a building automation system Signed-off-by: NPeter Gsellmann <pgsellmann@portner-elektronik.at> [nicolas.ferre@atmel.com: remove machine_desc.io_pg_offst and .phys_io] Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Per Fransson 提交于
The generic version of l2x0_inv_all is only called just after disabling the L2 cache and is surrounded by a spinlock. However, we're not really turning off the L2 cache right now, and the PL310 does not support exclusive accesses (used to implement the spinlock). So, the invalidation needs to be done without the spinlock. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Hans-Juergen Koch <hjk@linutronix.de> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NPer Fransson <per.xx.fransson@stericsson.com> Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com>
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由 Santosh Shilimkar 提交于
For the big buffers which are in excess of cache size, the maintaince operations by PA are very slow. For such buffers the maintainace operations can be speeded up by using the WAY based method. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Acked-by: NLinus Walleij <linus.walleij@stericsson.com>
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由 Santosh Shilimkar 提交于
The cache size is needed for to optimise range based maintainance operations Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Acked-by: NLinus Walleij <linus.walleij@stericsson.com>
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由 Santosh Shilimkar 提交于
Replace tab with space after #define to be consisten with other define in the file. Also move the bit mask below the register offsets. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Acked-by: NLinus Walleij <linus.walleij@stericsson.com>
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由 Santosh Shilimkar 提交于
The machine_kexec() calls outer_disable which can crash on OMAP4 becasue of trustzone restrictions. This patch overrides the default l2x0_disable with a OMAP4 specific implementation taking care of trustzone Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: NTony Lindgren <tony@atomide.com> Acked-by: NLinus Walleij <linus.walleij@stericsson.com>
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由 Thomas Gleixner 提交于
Add flush_all, inv_all and disable functions to the l2x0 code. These functions are called from kexec code to prevent random crashes in the new kernel. Platforms like OMAP which control L2 enable/disable via SMI mode can override the outer_cache.disable() function to implement their own. Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Acked-by: NLinus Walleij <linus.walleij@stericsson.com>
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由 Thomas Gleixner 提交于
kexec does not disable the outer cache before disabling the inner caches in cpu_proc_fin(). So L2 is enabled across the kexec jump. When the new kernel enables chaches again, it randomly crashes. Disabling L2 before calling cpu_proc_fin() cures the problem. Disabling L2 requires the following new functions: flush_all(), inv_all() and disable(). Add them to outer_cache_fns and call them from the kexec code. Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Acked-by: NLinus Walleij <linus.walleij@stericsson.com>
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由 Catalin Marinas 提交于
With this L2 cache controller, the cache maintenance by PA and sync operations are atomic and do not require a "wait" loop. This patch conditionally defines the cache_wait() function. Since L2x0 cache controllers do not work with ARMv7 CPUs, the patch automatically enables CACHE_PL310 when only CPU_V7 is defined. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
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由 Daein Moon 提交于
This patch adds to support ethernet for SMDKV310 and SMDKC210 board. - define smc911x resources - define configurations of smc911x platform data - define platform device "smsc911x" - initialize srom controller for lan9215 chip Signed-off-by: NDaein Moon <moon9124@samsung.com> Signed-off-by: NSangbeom Kim <sbkim73@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Rogerio Pimentel 提交于
In commit (c5d38f08): "mx31_3ds: revert 3ds debug board relate code" the debug board definitions are placed in a separate file. Remove the remaining debug board related define from mach-mx31_3ds.c. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NRogerio Pimentel <rogerio.pimentel@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Daein Moon 提交于
This patch adds support SROMC for S5PV310 and S5PC210. Signed-off-by: NDaein Moon <moon9124@samsung.com> Signed-off-by: NSangbeom Kim <sbkim73@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Daein Moon 提交于
This patch adds the s3c_gpio_getpull() API that has been missed in the plat-samsung/gpio-config.c and actullay there is its extern declaration in plat/gpio-cfg.h. Signed-off-by: NDaein Moon <moon9124@samsung.com> Cc: Ben Dooks <ben-linux@fluff.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Simon Guinot 提交于
Signed-off-by: NSimon Guinot <sguinot@lacie.com> Acked-by: NNicolas Pitre <nico@fluxnic.net> Signed-off-by: NGuenter Roeck <guenter.roeck@ericsson.com>
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- 25 10月, 2010 9 次提交
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由 Kukjin Kim 提交于
This patch changes VMALLOC_END from 0xE0000000 to 0xF6000000, because some systems want to use more vmalloc()/ioremap() area and now don't use from at 0xE0000000 to 0xF6000000 (the start of Samsung SoCs' VA space) Cc: Ben Dooks <ben-linux@fluff.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Kukjin Kim 提交于
This patch changes VMALLOC_END from 0xE0000000 to 0xF6000000, because some systems want to use more vmalloc()/ioremap() area and now don't use from at 0xE0000000 to 0xF6000000 (the start of Samsung SoCs' VA space) Cc: Ben Dooks <ben-linux@fluff.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Kukjin Kim 提交于
This patch moves the start address of Samsung SoCs' VA space so that can use more vmalloc()/ioremap() space. Of course need to change the VMALLOC_END for it. Cc: Ben Dooks <ben-linux@fluff.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Jongsun Han 提交于
This patch adds EINT(External Interrupt) support on S5PV310 and S5PC210. All EINTs are transferred to GIC through interrupt combiner. Signed-off-by: NJongsun Han <jongsun.han@samsung.com> Signed-off-by: NJongpill Lee <boyko.lee@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Jongsun Han 提交于
This patch adds the definition for both IRQs and GPIO registers for external interrupts. Signed-off-by: NJongsun Han <jongsun.han@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Kyungmin Park 提交于
This patch adds L2 cache initialization code in cpu.c of ARCH_S5PV310. It includes TAG and Data latency, Prefetch, and Power configurations. Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Kyungmin Park 提交于
Basically, need L2 cache initialize function in ARCH_S5PV310. So it would be better to move it into ARCH_S5PV310 common part. This patch removes L2 cache initialization code at the each board file. Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Kyungmin Park 提交于
This patch adds L2X0 Prefetch and Power control register. Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Seungwhan Youn 提交于
This patch moves DMA clock enable functionality into pl330_probe() of plat-samsung/s3c_pl330.c (PL330 DMAC driver) and disable functionality into pl330_remove(). For now according to clock policy of Samsung SoCs' mainline, clocks which are used in the driver should be controlled by each own. Signed-off-by: NSeungwhan Youn <sw.youn@samsung.com> Acked-by: NJassi Brar <jassi.brar@samsung.com> [kgene.kim@samsung.com: minor title and comment edit] Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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