1. 21 3月, 2020 35 次提交
  2. 20 3月, 2020 5 次提交
    • D
      Merge tag 'drm-intel-fixes-2020-03-19' of... · 5366b96b
      Dave Airlie 提交于
      Merge tag 'drm-intel-fixes-2020-03-19' of git://anongit.freedesktop.org/drm/drm-intel into drm-fixes
      
      drm/i915 fixes for v5.6-rc7:
      - Track active elements during dequeue
      - Fix failure to handle all MCR ranges
      - Revert unnecessary workaround
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      
      From: Jani Nikula <jani.nikula@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/877dzgepvu.fsf@intel.com
      5366b96b
    • D
      Merge tag 'amd-drm-fixes-5.6-2020-03-19' of... · 362b86a3
      Dave Airlie 提交于
      Merge tag 'amd-drm-fixes-5.6-2020-03-19' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
      
      amd-drm-fixes-5.6-2020-03-19:
      
      amdgpu:
      - Pageflip fix
      - VCN clockgating fixes
      - GPR debugfs fix for umr
      - GPU reset fix
      - eDP fix for MBP
      - DCN2.x fix
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      From: Alex Deucher <alexdeucher@gmail.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20200319204054.1036478-1-alexander.deucher@amd.com
      362b86a3
    • M
      drm/amd/display: Fix pageflip event race condition for DCN. · eb916a5a
      Mario Kleiner 提交于
      Commit '16f17eda ("drm/amd/display: Send vblank and user
      events at vsartup for DCN")' introduces a new way of pageflip
      completion handling for DCN, and some trouble.
      
      The current implementation introduces a race condition, which
      can cause pageflip completion events to be sent out one vblank
      too early, thereby confusing userspace and causing flicker:
      
      prepare_flip_isr():
      
      1. Pageflip programming takes the ddev->event_lock.
      2. Sets acrtc->pflip_status == AMDGPU_FLIP_SUBMITTED
      3. Releases ddev->event_lock.
      
      --> Deadline for surface address regs double-buffering passes on
          target pipe.
      
      4. dc_commit_updates_for_stream() MMIO programs the new pageflip
         into hw, but too late for current vblank.
      
      => pflip_status == AMDGPU_FLIP_SUBMITTED, but flip won't complete
         in current vblank due to missing the double-buffering deadline
         by a tiny bit.
      
      5. VSTARTUP trigger point in vblank is reached, VSTARTUP irq fires,
         dm_dcn_crtc_high_irq() gets called.
      
      6. Detects pflip_status == AMDGPU_FLIP_SUBMITTED and assumes the
         pageflip has been completed/will complete in this vblank and
         sends out pageflip completion event to userspace and resets
         pflip_status = AMDGPU_FLIP_NONE.
      
      => Flip completion event sent out one vblank too early.
      
      This behaviour has been observed during my testing with measurement
      hardware a couple of time.
      
      The commit message says that the extra flip event code was added to
      dm_dcn_crtc_high_irq() to prevent missing to send out pageflip events
      in case the pflip irq doesn't fire, because the "DCH HUBP" component
      is clock gated and doesn't fire pflip irqs in that state. Also that
      this clock gating may happen if no planes are active. This suggests
      that the problem addressed by that commit can't happen if planes
      are active.
      
      The proposed solution is therefore to only execute the extra pflip
      completion code iff the count of active planes is zero and otherwise
      leave pflip completion handling to the pflip irq handler, for a
      more race-free experience.
      
      Note that i don't know if this fixes the problem the original commit
      tried to address, as i don't know what the test scenario was. It
      does fix the observed too early pageflip events though and points
      out the problem introduced.
      
      Fixes: 16f17eda ("drm/amd/display: Send vblank and user events at vsartup for DCN")
      Reviewed-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
      Signed-off-by: NMario Kleiner <mario.kleiner.de@gmail.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      eb916a5a
    • L
      Merge tag 'mmc-v5.6-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc · 6c90b86a
      Linus Torvalds 提交于
      Pull MMC fixes from Ulf Hansson:
      
       - rtsx_pci: Fix support for some various speed modes
      
       - sdhci-of-at91: Fix support for GPIO card detect on SAMA5D2
      
       - sdhci-cadence: Fix support for DDR52 speed mode for eMMC on UniPhier
      
       - sdhci-acpi: Fix broken WP support on Acer Aspire Switch 10
      
       - sdhci-acpi: Workaround FW bug for suspend on Lenovo Miix 320
      
      * tag 'mmc-v5.6-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc:
        mmc: rtsx_pci: Fix support for speed-modes that relies on tuning
        mmc: sdhci-of-at91: fix cd-gpios for SAMA5D2
        mmc: sdhci-cadence: set SDHCI_QUIRK2_PRESET_VALUE_BROKEN for UniPhier
        mmc: sdhci-acpi: Disable write protect detection on Acer Aspire Switch 10 (SW5-012)
        mmc: sdhci-acpi: Switch signal voltage back to 3.3V on suspend on external microSD on Lenovo Miix 320
      6c90b86a
    • V
      arm64: compat: Fix syscall number of compat_clock_getres · 3568b889
      Vincenzo Frascino 提交于
      The syscall number of compat_clock_getres was erroneously set to 247
      (__NR_io_cancel!) instead of 264. This causes the vDSO fallback of
      clock_getres() to land on the wrong syscall for compat tasks.
      
      Fix the numbering.
      
      Cc: <stable@vger.kernel.org>
      Fixes: 53c489e1 ("arm64: compat: Add missing syscall numbers")
      Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
      Reviewed-by: NNick Desaulniers <ndesaulniers@google.com>
      Signed-off-by: NVincenzo Frascino <vincenzo.frascino@arm.com>
      Signed-off-by: NWill Deacon <will@kernel.org>
      3568b889