1. 08 7月, 2016 5 次提交
    • I
      cxl: Fix NULL pointer dereference on kernel contexts with no AFU interrupts · f5c9df9a
      Ian Munsie 提交于
      If a kernel context is initialised and does not have any AFU interrupts
      allocated it will cause a NULL pointer dereference when the context is
      detached since the irq_names list will not have been initialised.
      
      Move the initialisation of the irq_names list into the cxl_context_init
      routine so that it will be valid for the entire lifetime of the context
      and will not cause a NULL pointer dereference.
      Signed-off-by: NIan Munsie <imunsie@au1.ibm.com>
      Reviewed-by: NAndrew Donnellan <andrew.donnellan@au1.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      f5c9df9a
    • I
      cxl: Workaround XSL bug that does not clear the RA bit after a reset · 2a4f667a
      Ian Munsie 提交于
      An issue was noted in our debug logs where the XSL would leave the RA
      bit asserted after an AFU reset operation, which would effectively
      prevent further AFU reset operations from working.
      
      Workaround the issue by clearing the RA bit with an MMIO write if it is
      still asserted after any AFU control operation.
      Signed-off-by: NIan Munsie <imunsie@au1.ibm.com>
      Reviewed-by: NFrederic Barrat <fbarrat@linux.vnet.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      2a4f667a
    • I
      cxl: Fix bug where AFU disable operation had no effect · 5e7823c9
      Ian Munsie 提交于
      The AFU disable operation has a bug where it will not clear the enable
      bit and therefore will have no effect. To date this has likely been
      masked by fact that we perform an AFU reset before the disable, which
      also has the effect of clearing the enable bit, making the following
      disable operation effectively a noop on most hardware. This patch
      modifies the afu_control function to take a parameter to clear from the
      AFU control register so that the disable operation can clear the
      appropriate bit.
      
      This bug was uncovered on the Mellanox CX4, which uses an XSL rather
      than a PSL. On the XSL the reset operation will not complete while the
      AFU is enabled, meaning the enable bit was still set at the start of the
      disable and as a result this bug was hit and the disable also timed out.
      
      Because of this difference in behaviour between the PSL and XSL, this
      patch now makes the reset dependent on the card using a PSL to avoid
      waiting for a timeout on the XSL. It is entirely possible that we may be
      able to drop the reset altogether if it turns out we only ever needed it
      due to this bug - however I am not willing to drop it without further
      regression testing and have added comments to the code explaining the
      background.
      
      This also fixes a small issue where the AFU_Cntl register was read
      outside of the lock that protects it.
      Signed-off-by: NIan Munsie <imunsie@au1.ibm.com>
      Reviewed-by: NFrederic Barrat <fbarrat@linux.vnet.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      5e7823c9
    • I
      cxl: Fix allocating a minimum of 2 pages for the SPA · 2224b671
      Ian Munsie 提交于
      The Scheduled Process Area is allocated dynamically with enough pages to
      fit at least as many processes as the AFU descriptor indicated. Since
      the calculation is non-trivial, it does this by calculating how many
      processes could fit in an allocation of a given order, and increasing
      that order until it can fit enough processes or hits the maximum
      supported size.
      
      Currently, it will start this search using a SPA of 2 pages instead of
      1. This can waste a page of memory if the AFU's maximum number of
      supported processes was small enough to fit in one page.
      
      Fix the algorithm to start the search at 1 page.
      Signed-off-by: NIan Munsie <imunsie@au1.ibm.com>
      Reviewed-by: NFrederic Barrat <fbarrat@linux.vnet.ibm.com>
      Reviewed-by: NAndrew Donnellan <andrew.donnellan@au1.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      2224b671
    • I
      cxl: Fix allowing bogus AFU descriptors with 0 maximum processes · 49e9c99f
      Ian Munsie 提交于
      If the AFU descriptor of an AFU directed AFU indicates that it supports
      0 maximum processes, we will accept that value and attempt to use it.
      The SPA will still be allocated (with 2 pages due to another minor bug
      and room for 958 processes), and when a context is allocated we will
      pass the value of 0 to idr_alloc as the maximum. However, idr_alloc will
      treat that as meaning no maximum and will allocate a context number and
      we return a valid context.
      
      Conceivably, this could lead to a buffer overflow of the SPA if more
      than 958 contexts were allocated, however this is mitigated by the fact
      that there are no known AFUs in the wild with a bogus AFU descriptor
      like this, and that only the root user is allowed to flash an AFU image
      to a card.
      
      Add a check when validating the AFU descriptor to reject any with 0
      maximum processes.
      
      We do still allow a dedicated process only AFU to indicate that it
      supports 0 contexts even though that is forbidden in the architecture,
      as in that case we ignore the value and use 1 instead. This is just on
      the off-chance that such a dedicated process AFU may exist (not that I
      am aware of any), since their developers are less likely to have cared
      about this value at all.
      Signed-off-by: NIan Munsie <imunsie@au1.ibm.com>
      Reviewed-by: NFrederic Barrat <fbarrat@linux.vnet.ibm.com>
      Reviewed-by: NAndrew Donnellan <andrew.donnellan@au1.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      49e9c99f
  2. 29 6月, 2016 2 次提交
  3. 28 6月, 2016 2 次提交
    • M
      cxl: Add set and get private data to context struct · ad42de85
      Michael Neuling 提交于
      This provides AFU drivers a means to associate private data with a cxl
      context. This is particularly intended for make the new callbacks for
      driver specific events easier for AFU drivers to use, as they can easily
      get back to any private data structures they may use.
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      Signed-off-by: NIan Munsie <imunsie@au1.ibm.com>
      Signed-off-by: Philippe Bergheaud <felix@linux.vnet.ibm.com
      Reviewed-by: NMatthew R. Ochs <mrochs@linux.vnet.ibm.com>
      Reviewed-by: NAndrew Donnellan <andrew.donnellan@au1.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      ad42de85
    • P
      cxl: Add mechanism for delivering AFU driver specific events · b810253b
      Philippe Bergheaud 提交于
      This adds an afu_driver_ops structure with fetch_event() and
      event_delivered() callbacks. An AFU driver such as cxlflash can fill
      this out and associate it with a context to enable passing custom AFU
      specific events to userspace.
      
      This also adds a new kernel API function cxl_context_pending_events(),
      that the AFU driver can use to notify the cxl driver that new specific
      events are ready to be delivered, and wake up anyone waiting on the
      context wait queue.
      
      The current count of AFU driver specific events is stored in the field
      afu_driver_events of the context structure.
      
      The cxl driver checks the afu_driver_events count during poll, select,
      read, etc. calls to check if an AFU driver specific event is pending,
      and calls fetch_event() to obtain and deliver that event. This way, the
      cxl driver takes care of all the usual locking semantics around these
      calls and handles all the generic cxl events, so that the AFU driver
      only needs to worry about it's own events.
      
      fetch_event() return a struct cxl_event_afu_driver_reserved, allocated
      by the AFU driver, and filled in with the specific event information and
      size. Total event size (header + data) should not be greater than
      CXL_READ_MIN_SIZE (4K).
      
      Th cxl driver prepends an appropriate cxl event header, copies the event
      to userspace, and finally calls event_delivered() to return the status of
      the operation to the AFU driver. The event is identified by the context
      and cxl_event_afu_driver_reserved pointers.
      
      Since AFU drivers provide their own means for userspace to obtain the
      AFU file descriptor (i.e. cxlflash uses an ioctl on their scsi file
      descriptor to obtain the AFU file descriptor) and the generic cxl driver
      will never use this event, the ABI of the event is up to each individual
      AFU driver.
      Signed-off-by: NPhilippe Bergheaud <felix@linux.vnet.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      b810253b
  4. 21 6月, 2016 2 次提交
    • G
      PCI/hotplug: PowerPC PowerNV PCI hotplug driver · 66725152
      Gavin Shan 提交于
      This adds standalone driver to support PCI hotplug for PowerPC PowerNV
      platform that runs on top of skiboot firmware. The firmware identifies
      hotpluggable slots and marked their device tree node with proper
      "ibm,slot-pluggable" and "ibm,reset-by-firmware". The driver scans
      device tree nodes to create/register PCI hotplug slot accordingly.
      
      The PCI slots are organized in fashion of tree, which means one
      PCI slot might have parent PCI slot and parent PCI slot possibly
      contains multiple child PCI slots. At the plugging time, the parent
      PCI slot is populated before its children. The child PCI slots are
      removed before their parent PCI slot can be removed from the system.
      
      If the skiboot firmware doesn't support slot status retrieval, the PCI
      slot device node shouldn't have property "ibm,reset-by-firmware". In
      that case, none of valid PCI slots will be detected from device tree.
      The skiboot firmware doesn't export the capability to access attention
      LEDs yet and it's something for TBD.
      Signed-off-by: NGavin Shan <gwshan@linux.vnet.ibm.com>
      Acked-by: NBjorn Helgaas <bhelgaas@google.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      66725152
    • G
      PCI: Add pcibios_setup_bridge() · d366d28c
      Gavin Shan 提交于
      Currently, PowerPC PowerNV platform utilizes ppc_md.pcibios_fixup(),
      which is called for once after PCI probing and resource assignment
      are completed, to allocate platform required resources for PCI devices:
      PE#, IO and MMIO mapping, DMA address translation (TCE) table etc.
      Obviously, it's not hotplug friendly.
      
      This adds weak function pcibios_setup_bridge(), which is called by
      pci_setup_bridge(). PowerPC PowerNV platform will reuse the function
      to assign above platform required resources to newly plugged PCI devices
      during PCI hotplug in subsequent patches.
      Signed-off-by: NGavin Shan <gwshan@linux.vnet.ibm.com>
      Acked-by: NBjorn Helgaas <bhelgaas@google.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      d366d28c
  5. 16 6月, 2016 5 次提交
    • F
      cxl: Make vPHB device node match adapter's · a4307390
      Frederic Barrat 提交于
      On bare-metal, when a device is attached to the cxl card, lsvpd shows
      a location code such as (with cxlflash):
           # lsvpd -l sg22
           ...
           *YL U78CB.001.WZS0073-P1-C33-B0-T0-L0
      which makes it hard to easily identify the cxl adapter owning the
      flash device, since in this example C33 refers to a P8 processor.
      
      lsvpd looks in the parent devices until it finds a location code, so the
      device node for the vPHB ends up being used.
      
      By reusing the device node of the adapter for the vPHB, lsvpd shows:
           # lsvpd -l sg16
           ...
           *YL U78C9.001.WZS09XA-P1-C7-B1-T0-L3
      where C7 is the PCI slot of the cxl adapter.
      
      On powerVM, the vPHB was already using the adapter device node, so
      there's no change there.
      
      Tested by cxlflash on bare-metal and powerVM.
      Signed-off-by: NFrederic Barrat <fbarrat@linux.vnet.ibm.com>
      Reviewed-by: NMatthew R. Ochs <mrochs@linux.vnet.ibm.com>
      Acked-by: NIan Munsie <imunsie@au1.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      a4307390
    • I
      cxl: Add support for CAPP DMA mode · b385c9e9
      Ian Munsie 提交于
      This adds support for using CAPP DMA mode, which is required for XSL
      based cards such as the Mellanox CX4 to function.
      
      This is currently an RFC as it depends on the corresponding support to
      be merged into skiboot first, which was submitted here:
      http://patchwork.ozlabs.org/patch/625582/
      
      In the event that the skiboot on the system does not have the above
      support, it will indicate as such in the kernel log and abort the init
      process.
      Signed-off-by: NIan Munsie <imunsie@au1.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      b385c9e9
    • F
      cxl: Abstract the differences between the PSL and XSL · 6d382616
      Frederic Barrat 提交于
      The XSL (Translation Service Layer) is a stripped down version of the
      PSL (Power Service Layer) used in some cards such as the Mellanox CX4.
      
      Like the PSL, it implements the CAIA architecture, but has a number of
      differences, mostly in it's implementation dependent registers. This
      adds an ops structure to abstract these differences to bring initial
      support for XSL CAPI devices.
      
      The XSL does not implement the optional architected SERR register,
      however while it treats it as a reserved register and should work with
      no special treatment, attempting to access it will cause the XSL_FEC
      (First Error Capture) register to be filled out, preventing it from
      capturing any subsequent errors. Therefore, this patch also prevents the
      kernel from trying to set up the SERR register so that the FEC register
      may still be useful, and to save one interrupt.
      
      The XSL also uses a special DMA cxl mode, which uses a slightly
      different init sequence for the CAPP and PHB. The kernel support for
      this will be in a future patch once the corresponding support has been
      merged into skiboot.
      Co-authored-by: NIan Munsie <imunsie@au1.ibm.com>
      Signed-off-by: NIan Munsie <imunsie@au1.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      6d382616
    • I
      cxl: Update process element after allocating interrupts · 292841b0
      Ian Munsie 提交于
      In the kernel API, it is possible to attempt to allocate AFU interrupts
      after already starting a context. Since the process element structure
      used by the hardware is only filled out at the time the context is
      started, it will not be updated with the interrupt numbers that have
      just been allocated and therefore AFU interrupts will not work unless
      they were allocated prior to starting the context.
      
      This can present some difficulties as each CAPI enabled PCI device in
      the kernel API has a default context, which may need to be started very
      early to enable translations, potentially before interrupts can easily
      be set up.
      
      This patch makes the API more flexible to allow interrupts to be
      allocated after a context has already been started and takes care of
      updating the PE structure used by the hardware and notifying it to
      discard any cached copy it may have.
      
      The update is currently performed via a terminate/remove/add sequence.
      This is necessary on some hardware such as the XSL that does not
      properly support the update LLCMD.
      
      Note that this is only supported on powernv at present - attempting to
      perform this ordering on PowerVM will raise a warning.
      Signed-off-by: NIan Munsie <imunsie@au1.ibm.com>
      Reviewed-by: NFrederic Barrat <fbarrat@linux.vnet.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      292841b0
    • A
      cxl: static-ify variables to fix sparse warnings · 64417a39
      Andrew Donnellan 提交于
      Make a couple more variables static. Found by sparse.
      Signed-off-by: NAndrew Donnellan <andrew.donnellan@au1.ibm.com>
      Reviewed-by: fbarrat@linux.vnet.ibm.com
      Reviewed-by: NMatthew R. Ochs <mrochs@linux.vnet.ibm.com>
      Acked-by: NIan Munsie <imunsie@au1.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      64417a39
  6. 11 6月, 2016 2 次提交
  7. 10 6月, 2016 22 次提交