- 27 8月, 2020 2 次提交
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由 Tariq Toukan 提交于
Many device drivers use the same prefetch code structure to deal with small L1 cacheline size. Take this code into a function and call it from the drivers. Suggested-by: NJakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: NTariq Toukan <tariqt@mellanox.com> Reviewed-by: NSaeed Mahameed <saeedm@mellanox.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Rusaimi Amira Ruslan 提交于
Add dwmac-intel-plat to enable the stmmac driver in Intel Keem Bay. Also add fix_mac_speed and tx_clk in order to change link speeds. This is required as mac_speed_o is not connected in the Intel Keem Bay SoC. Signed-off-by: NRusaimi Amira Ruslan <rusaimi.amira.rusaimi@intel.com> Signed-off-by: NVineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 25 8月, 2020 22 次提交
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由 Joe Perches 提交于
Use semicolons and braces. Signed-off-by: NJoe Perches <joe@perches.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Joe Perches 提交于
Use semicolons and braces. Signed-off-by: NJoe Perches <joe@perches.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Raju Rangoju 提交于
cxgb4 does not look for HASHTBLMEMCRCERR and CMDTIDERR bits in LE_DB_INT_CAUSE register, but these are enabled in LE_DB_INT_ENABLE. So, add error handlers to LE interrupt handler to emit a warning or alert message for hash table mem crc and cmd tid errors Signed-off-by: NRaju Rangoju <rajur@chelsio.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Aleksey Makarov 提交于
This patch adds PTP clock and uses it in Octeontx2 network device. PTP clock uses mailbox calls to access the hardware counter on the RVU side. Co-developed-by: NSubbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: NSubbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: NAleksey Makarov <amakarov@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Acked-by: NRichard Cochran <richardcochran@gmail.com> Acked-by: NJakub Kicinski <kuba@kernel.org> Reviewed-by: NJesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Aleksey Makarov 提交于
Precision Timestamping block found on Octeontx2 platform is an independent coprocessor and has internal PTP hardware clock. Once configured PTP runs independently and when a packet arrives CGX hardware block gets the current timestamp from PTP block and forwards the packet to NIX by prepending timestamp to the packet. This patch adds the pci driver for PTP block. The driver gets registered by AF driver and does initial configuration and exposes a mailbox function to read and adjust PTP hardware clock. The mailbox function is called by AF consumers like netdev drivers or userspace drivers. Since PTP being a single block in platform this driver helps in accessing PTP block by any AF consumer. Co-developed-by: NSubbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: NSubbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: NAleksey Makarov <amakarov@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Acked-by: NRichard Cochran <richardcochran@gmail.com> Acked-by: NJakub Kicinski <kuba@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Zyta Szpak 提交于
Four new mbox messages ids and handler are added in order to enable or disable timestamping procedure on tx and rx side. Additionally when PTP is enabled, the packet parser must skip over 8 bytes and start analyzing packet data there. To make NPC profiles work seemlesly PTR_ADVANCE of IKPU is set so that parsing can be done as before when all data pointers are shifted by 8 bytes automatically. Co-developed-by: NSubbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: NSubbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: NZyta Szpak <zyta@marvell.com> Signed-off-by: NSunil Goutham <sgoutham@marvell.com> Acked-by: NRichard Cochran <richardcochran@gmail.com> Acked-by: NJakub Kicinski <kuba@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Igor Russkikh 提交于
In case recovery was not successful, netdev still should be present. But we should clear cdev if something bad happens on recovery. We also check cdev for null on dev close. That could be a case if recovery was not successful. Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Igor Russkikh 提交于
Gather and push out full device dump to devlink. Device dump is the same as with `ethtool -d`, but now its generated exactly at the moment bad thing happens. Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Igor Russkikh 提交于
Remove forcible recovery trigger and put it as a normal devlink callback. This allows user to enable/disable it via devlink health set pci/0000:03:00.0 reporter fw_fatal auto_recover false Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Acked-by: NJakub Kicinski <kuba@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Igor Russkikh 提交于
Use devlink_health_report to push error indications. We implement this in qede via callback function to make it possible to reuse the same for other drivers sitting on top of qed in future. Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Acked-by: NJakub Kicinski <kuba@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Igor Russkikh 提交于
Here we declare health reporter ops (empty for now) and register these in qed probe and remove callbacks. This way we get devlink attached to all kind of qed* PCI device entities: networking or storage offload entity. Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Reviewed-by: NJakub Kicinski <kuba@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Igor Russkikh 提交于
Here we return existing fw & mfw versions, we also fetch device's serial number: ~$ sudo ~/iproute2/devlink/devlink dev info pci/0000:01:00.1: driver qed board.serial_number REE1915E44552 versions: running: fw.app 8.42.2.0 stored: fw.mgmt 8.52.10.0 MFW and FW are different firmwares on device. Management is a firmware responsible for link configuration and various control plane features. Its permanent and resides in NVM. Running FW (or fastpath FW) is an embedded microprogram implementing all the packet processing, offloads, etc. This FW is being loaded on each start by the driver from FW binary blob. The base device specific structure (qed_dev_info) was not directly available to the base driver before. Thus, here we create and store a private copy of this structure in qed_dev root object to access the data. Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Reviewed-by: NJakub Kicinski <kuba@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Igor Russkikh 提交于
This patch replaces stubs in kconfig help entries with an actual description. Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Igor Russkikh 提交于
Devlink instance lifecycle was linked to qed_dev object, that caused devlink to be recreated on each recovery. Changing it by making higher level driver (qede) responsible for its life. This way devlink now survives recoveries. qede now stores devlink structure pointer as a part of its device object, devlink private data contains a linkage structure, qed_devlink. Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Igor Russkikh 提交于
We are extending devlink infrastructure, thus move the existing stuff into a new file qed_devlink.c Signed-off-by: NIgor Russkikh <irusskikh@marvell.com> Signed-off-by: NAlexander Lobakin <alobakin@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Reviewed-by: NJesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Christophe JAILLET 提交于
The wrappers in include/linux/pci-dma-compat.h should go away. The patch has been generated with the coccinelle script below and has been hand modified to replace GFP_ with a correct flag. It has been compile tested. When memory is allocated in 'free_rx_resources()' and 'alloc_tx_resources()' (sge.c) GFP_KERNEL can be used because it is already used in these functions. Moreover, they can only be called from a .ndo_open function. So it is guarded by the 'rtnl_lock()', which is a mutex. While at it, a pr_err message in 'init_one()' has been updated accordingly (s/consistent/coherent). @@ @@ - PCI_DMA_BIDIRECTIONAL + DMA_BIDIRECTIONAL @@ @@ - PCI_DMA_TODEVICE + DMA_TO_DEVICE @@ @@ - PCI_DMA_FROMDEVICE + DMA_FROM_DEVICE @@ @@ - PCI_DMA_NONE + DMA_NONE @@ expression e1, e2, e3; @@ - pci_alloc_consistent(e1, e2, e3) + dma_alloc_coherent(&e1->dev, e2, e3, GFP_) @@ expression e1, e2, e3; @@ - pci_zalloc_consistent(e1, e2, e3) + dma_alloc_coherent(&e1->dev, e2, e3, GFP_) @@ expression e1, e2, e3, e4; @@ - pci_free_consistent(e1, e2, e3, e4) + dma_free_coherent(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_map_single(e1, e2, e3, e4) + dma_map_single(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_unmap_single(e1, e2, e3, e4) + dma_unmap_single(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4, e5; @@ - pci_map_page(e1, e2, e3, e4, e5) + dma_map_page(&e1->dev, e2, e3, e4, e5) @@ expression e1, e2, e3, e4; @@ - pci_unmap_page(e1, e2, e3, e4) + dma_unmap_page(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_map_sg(e1, e2, e3, e4) + dma_map_sg(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_unmap_sg(e1, e2, e3, e4) + dma_unmap_sg(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_single_for_cpu(e1, e2, e3, e4) + dma_sync_single_for_cpu(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_single_for_device(e1, e2, e3, e4) + dma_sync_single_for_device(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_sg_for_cpu(e1, e2, e3, e4) + dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_sg_for_device(e1, e2, e3, e4) + dma_sync_sg_for_device(&e1->dev, e2, e3, e4) @@ expression e1, e2; @@ - pci_dma_mapping_error(e1, e2) + dma_mapping_error(&e1->dev, e2) @@ expression e1, e2; @@ - pci_set_dma_mask(e1, e2) + dma_set_mask(&e1->dev, e2) @@ expression e1, e2; @@ - pci_set_consistent_dma_mask(e1, e2) + dma_set_coherent_mask(&e1->dev, e2) Signed-off-by: NChristophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Danielle Ratson 提交于
The PTYS register is used to report and configure the port type and speed. Currently, internal bits in the register are used the same way other bits are used. Using the internal bits can cause bad parameter firmware errors. For example, trying to write to internal bit 25 returns: EMAD reg access failed (tid=53e2bffa00004310,reg_id=5004(ptys),type=write,status=7(bad parameter)) Remove the internal bits from the PTYS register, so that it is no longer possible to pass them to firmware. Signed-off-by: NDanielle Ratson <danieller@mellanox.com> Reviewed-by: NJiri Pirko <jiri@mellanox.com> Signed-off-by: NIdo Schimmel <idosch@mellanox.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Ido Schimmel 提交于
On the Spectrum-{2,3} ASICs the minimum burst size of the packet trap policers needs to be 40% of the configured rate. Otherwise, intermittent drops are observed even when the incoming packet rate is slightly lower than the configured policer rate. Adjust the burst size of the registered packet trap policers so that they do not violate above mentioned limitation. Signed-off-by: NIdo Schimmel <idosch@mellanox.com> Reviewed-by: NJiri Pirko <jiri@mellanox.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Christophe JAILLET 提交于
The wrappers in include/linux/pci-dma-compat.h should go away. The patch has been generated with the coccinelle script below and has been hand modified to replace GFP_ with a correct flag. It has been compile tested. When memory is allocated in 'atl1e_setup_ring_resources()' (atl1e_main.c), 'atl1_setup_ring_resources()' (atl1.c) and 'atl2_setup_ring_resources()' (atl2.c) GFP_KERNEL can be used because it can be called from a .ndo_open. 'atl1_setup_ring_resources()' (atl1.c) can also be called from a '.set_ringparam' (see struct ethtool_ops) where sleep is also allowed. Both cases are protected by 'rtnl_lock()' which is a mutex. So these function can sleep. @@ @@ - PCI_DMA_BIDIRECTIONAL + DMA_BIDIRECTIONAL @@ @@ - PCI_DMA_TODEVICE + DMA_TO_DEVICE @@ @@ - PCI_DMA_FROMDEVICE + DMA_FROM_DEVICE @@ @@ - PCI_DMA_NONE + DMA_NONE @@ expression e1, e2, e3; @@ - pci_alloc_consistent(e1, e2, e3) + dma_alloc_coherent(&e1->dev, e2, e3, GFP_) @@ expression e1, e2, e3; @@ - pci_zalloc_consistent(e1, e2, e3) + dma_alloc_coherent(&e1->dev, e2, e3, GFP_) @@ expression e1, e2, e3, e4; @@ - pci_free_consistent(e1, e2, e3, e4) + dma_free_coherent(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_map_single(e1, e2, e3, e4) + dma_map_single(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_unmap_single(e1, e2, e3, e4) + dma_unmap_single(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4, e5; @@ - pci_map_page(e1, e2, e3, e4, e5) + dma_map_page(&e1->dev, e2, e3, e4, e5) @@ expression e1, e2, e3, e4; @@ - pci_unmap_page(e1, e2, e3, e4) + dma_unmap_page(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_map_sg(e1, e2, e3, e4) + dma_map_sg(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_unmap_sg(e1, e2, e3, e4) + dma_unmap_sg(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_single_for_cpu(e1, e2, e3, e4) + dma_sync_single_for_cpu(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_single_for_device(e1, e2, e3, e4) + dma_sync_single_for_device(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_sg_for_cpu(e1, e2, e3, e4) + dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_sg_for_device(e1, e2, e3, e4) + dma_sync_sg_for_device(&e1->dev, e2, e3, e4) @@ expression e1, e2; @@ - pci_dma_mapping_error(e1, e2) + dma_mapping_error(&e1->dev, e2) @@ expression e1, e2; @@ - pci_set_dma_mask(e1, e2) + dma_set_mask(&e1->dev, e2) @@ expression e1, e2; @@ - pci_set_consistent_dma_mask(e1, e2) + dma_set_coherent_mask(&e1->dev, e2) Signed-off-by: NChristophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Christophe JAILLET 提交于
The wrappers in include/linux/pci-dma-compat.h should go away. The patch has been generated with the coccinelle script below and has been hand modified to replace GFP_ with a correct flag. It has been compile tested. When memory is allocated in 'netdev_open()', GFP_ATOMIC must be used because it can be called from a .ndo_tx_timeout function. So this function can be called with the 'netif_tx_lock' acquired. The call chain is: --> tx_timeout (.ndo_tx_timeout function) --> netdev_open @@ @@ - PCI_DMA_BIDIRECTIONAL + DMA_BIDIRECTIONAL @@ @@ - PCI_DMA_TODEVICE + DMA_TO_DEVICE @@ @@ - PCI_DMA_FROMDEVICE + DMA_FROM_DEVICE @@ @@ - PCI_DMA_NONE + DMA_NONE @@ expression e1, e2, e3; @@ - pci_alloc_consistent(e1, e2, e3) + dma_alloc_coherent(&e1->dev, e2, e3, GFP_) @@ expression e1, e2, e3; @@ - pci_zalloc_consistent(e1, e2, e3) + dma_alloc_coherent(&e1->dev, e2, e3, GFP_) @@ expression e1, e2, e3, e4; @@ - pci_free_consistent(e1, e2, e3, e4) + dma_free_coherent(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_map_single(e1, e2, e3, e4) + dma_map_single(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_unmap_single(e1, e2, e3, e4) + dma_unmap_single(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4, e5; @@ - pci_map_page(e1, e2, e3, e4, e5) + dma_map_page(&e1->dev, e2, e3, e4, e5) @@ expression e1, e2, e3, e4; @@ - pci_unmap_page(e1, e2, e3, e4) + dma_unmap_page(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_map_sg(e1, e2, e3, e4) + dma_map_sg(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_unmap_sg(e1, e2, e3, e4) + dma_unmap_sg(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_single_for_cpu(e1, e2, e3, e4) + dma_sync_single_for_cpu(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_single_for_device(e1, e2, e3, e4) + dma_sync_single_for_device(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_sg_for_cpu(e1, e2, e3, e4) + dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_sg_for_device(e1, e2, e3, e4) + dma_sync_sg_for_device(&e1->dev, e2, e3, e4) @@ expression e1, e2; @@ - pci_dma_mapping_error(e1, e2) + dma_mapping_error(&e1->dev, e2) @@ expression e1, e2; @@ - pci_set_dma_mask(e1, e2) + dma_set_mask(&e1->dev, e2) @@ expression e1, e2; @@ - pci_set_consistent_dma_mask(e1, e2) + dma_set_coherent_mask(&e1->dev, e2) Signed-off-by: NChristophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Christophe JAILLET 提交于
The wrappers in include/linux/pci-dma-compat.h should go away. The patch has been generated with the coccinelle script below and has been hand modified to replace GFP_ with a correct flag. It has been compile tested. When memory is allocated in 'typhoon_init_one()' GFP_KERNEL can be used because it is a probe function and no lock is acquired. When memory is allocated in 'typhoon_download_firmware()', GFP_ATOMIC must be used because it can be called from a .ndo_tx_timeout function. So this function can be called with the 'netif_tx_lock' acquired. The call chain is: --> typhoon_tx_timeout (.ndo_tx_timeout function) --> typhoon_start_runtime --> typhoon_download_firmware While at is, update some comments accordingly. @@ @@ - PCI_DMA_BIDIRECTIONAL + DMA_BIDIRECTIONAL @@ @@ - PCI_DMA_TODEVICE + DMA_TO_DEVICE @@ @@ - PCI_DMA_FROMDEVICE + DMA_FROM_DEVICE @@ @@ - PCI_DMA_NONE + DMA_NONE @@ expression e1, e2, e3; @@ - pci_alloc_consistent(e1, e2, e3) + dma_alloc_coherent(&e1->dev, e2, e3, GFP_) @@ expression e1, e2, e3; @@ - pci_zalloc_consistent(e1, e2, e3) + dma_alloc_coherent(&e1->dev, e2, e3, GFP_) @@ expression e1, e2, e3, e4; @@ - pci_free_consistent(e1, e2, e3, e4) + dma_free_coherent(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_map_single(e1, e2, e3, e4) + dma_map_single(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_unmap_single(e1, e2, e3, e4) + dma_unmap_single(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4, e5; @@ - pci_map_page(e1, e2, e3, e4, e5) + dma_map_page(&e1->dev, e2, e3, e4, e5) @@ expression e1, e2, e3, e4; @@ - pci_unmap_page(e1, e2, e3, e4) + dma_unmap_page(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_map_sg(e1, e2, e3, e4) + dma_map_sg(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_unmap_sg(e1, e2, e3, e4) + dma_unmap_sg(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_single_for_cpu(e1, e2, e3, e4) + dma_sync_single_for_cpu(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_single_for_device(e1, e2, e3, e4) + dma_sync_single_for_device(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_sg_for_cpu(e1, e2, e3, e4) + dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_sg_for_device(e1, e2, e3, e4) + dma_sync_sg_for_device(&e1->dev, e2, e3, e4) @@ expression e1, e2; @@ - pci_dma_mapping_error(e1, e2) + dma_mapping_error(&e1->dev, e2) @@ expression e1, e2; @@ - pci_set_dma_mask(e1, e2) + dma_set_mask(&e1->dev, e2) @@ expression e1, e2; @@ - pci_set_consistent_dma_mask(e1, e2) + dma_set_coherent_mask(&e1->dev, e2) Signed-off-by: NChristophe JAILLET <christophe.jaillet@wanadoo.fr> Reviewed-by: NDavid Dillow <dave@thedillows.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Thomas Falcon 提交于
The login response buffer is freed after it is received and parsed, but other functions in the driver still attempt to read it, such as when the device is opened, causing the Oops below. Store relevant information in the driver's private data structures and use those instead. BUG: Kernel NULL pointer dereference on read at 0x00000010 Faulting instruction address: 0xc00800000050a900 Oops: Kernel access of bad area, sig: 11 [#1] LE PAGE_SIZE=64K MMU=Hash SMP NR_CPUS=2048 NUMA pSeries Modules linked in: pseries_rng rng_core vmx_crypto gf128mul binfmt_misc ip_tables x_tables ibmvnic ibmveth crc32c_vpmsum autofs4 CPU: 7 PID: 759 Comm: NetworkManager Not tainted 5.9.0-rc1-00124-gd0a84e1f #14 NIP: c00800000050a900 LR: c00800000050a8f0 CTR: 00000000005b1904 REGS: c0000001ed746d20 TRAP: 0300 Not tainted (5.9.0-rc1-00124-gd0a84e1f) MSR: 800000000280b033 <SF,VEC,VSX,EE,FP,ME,IR,DR,RI,LE> CR: 24428484 XER: 00000001 CFAR: c0000000000101b0 DAR: 0000000000000010 DSISR: 40000000 IRQMASK: 0 GPR00: c00800000050a8f0 c0000001ed746fb0 c008000000518e00 0000000000000000 GPR04: 00000000000000c0 0000000000000080 0003c366c60c4501 0000000000000352 GPR08: 000000000001f400 0000000000000010 0000000000000000 0000000000000000 GPR12: 0001cf0000000019 c00000001ec97680 00000001003dfd40 0000010008dbb22c GPR16: 0000000000000000 0000000000000000 0000000000000000 c000000000edb6c8 GPR20: c000000004e73e00 c000000004fd2448 c000000004e6d700 c000000004fd2448 GPR24: c000000004fd2400 c000000004a0cd20 c0000001ed961860 c0080000005029d8 GPR28: 0000000000000000 0000000000000003 c000000004a0c000 0000000000000000 NIP [c00800000050a900] init_resources+0x338/0xa00 [ibmvnic] LR [c00800000050a8f0] init_resources+0x328/0xa00 [ibmvnic] Call Trace: [c0000001ed746fb0] [c00800000050a8f0] init_resources+0x328/0xa00 [ibmvnic] (unreliable) [c0000001ed747090] [c00800000050b024] ibmvnic_open+0x5c/0x100 [ibmvnic] [c0000001ed747110] [c000000000bdcc0c] __dev_open+0x17c/0x250 [c0000001ed7471b0] [c000000000bdd1ec] __dev_change_flags+0x1dc/0x270 [c0000001ed747260] [c000000000bdd2bc] dev_change_flags+0x3c/0x90 [c0000001ed7472a0] [c000000000bf24b8] do_setlink+0x3b8/0x1280 [c0000001ed747450] [c000000000bf8cc8] __rtnl_newlink+0x5a8/0x980 [c0000001ed7478b0] [c000000000bf9110] rtnl_newlink+0x70/0xb0 [c0000001ed7478f0] [c000000000bf07c4] rtnetlink_rcv_msg+0x364/0x460 [c0000001ed747990] [c000000000c68b94] netlink_rcv_skb+0x84/0x1a0 [c0000001ed747a00] [c000000000bef758] rtnetlink_rcv+0x28/0x40 [c0000001ed747a20] [c000000000c68188] netlink_unicast+0x218/0x310 [c0000001ed747a80] [c000000000c6848c] netlink_sendmsg+0x20c/0x4e0 [c0000001ed747b20] [c000000000b9dc88] ____sys_sendmsg+0x158/0x360 [c0000001ed747bb0] [c000000000ba1c88] ___sys_sendmsg+0x98/0xf0 [c0000001ed747d10] [c000000000ba1db8] __sys_sendmsg+0x78/0x100 [c0000001ed747dc0] [c000000000033820] system_call_exception+0x160/0x280 [c0000001ed747e20] [c00000000000d740] system_call_common+0xf0/0x27c Instruction dump: 3be00000 38810068 b1410076 3941006a 93e10072 fbea0000 b1210068 4bff9915 eb9e0ca0 eabe0900 393c0010 3ab50048 <7fa04c2c> 7fba07b4 7b431764 7b4917a0 ---[ end trace fbc5949a28e103bd ]--- Fixes: f3ae59c0 ("ibmvnic: store RX and TX subCRQ handle array in ibmvnic_adapter struct") Signed-off-by: NThomas Falcon <tlfalcon@linux.ibm.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 22 8月, 2020 2 次提交
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由 Vinay Kumar Yadav 提交于
This patch seperates inline ipsec functionality from coprocessor driver chcr. Now inline ipsec is separate ULD, moved from "drivers/crypto/chelsio/" to "drivers/net/ethernet/chelsio/inline_crypto/ch_ipsec/" Signed-off-by: NAyush Sawal <ayush.sawal@chelsio.com> Signed-off-by: NVinay Kumar Yadav <vinay.yadav@chelsio.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Vinay Kumar Yadav 提交于
chelsio inline tls driver(chtls) is mostly overlaps with NIC drivers but currenty it is part of crypto driver, so move it out to appropriate directory for better maintenance. Signed-off-by: NVinay Kumar Yadav <vinay.yadav@chelsio.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 21 8月, 2020 5 次提交
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由 Alex Dewar 提交于
In qed_rdma_destroy_cq() the result of dma_alloc_coherent() is cast from void* unnecessarily. Remove cast. Issue identified with Coccinelle. Signed-off-by: NAlex Dewar <alex.dewar90@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Louis Peens 提交于
When both the driver and the firmware supports QinQ the flow key structure that is send to the firmware is updated as the old method of matching on VLAN did not allow for space to add another VLAN tag. VLAN flows can now also match on the tpid field, not constrained to just 0x8100 as before. Signed-off-by: NLouis Peens <louis.peens@netronome.com> Signed-off-by: NSimon Horman <simon.horman@netronome.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Louis Peens 提交于
Add a check to make sure the total length of the flow key sent to the firmware stays within the supported limit. Signed-off-by: NLouis Peens <louis.peens@netronome.com> Signed-off-by: NSimon Horman <simon.horman@netronome.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Rahul Kundu 提交于
IPv6 filters can occupy up to 4 slots and will exhaust HPFILTER region much sooner. So, continue searching for free slots in the HASH or NORMAL filter regions, as long as the rule's priority does not conflict with existing rules in those regions. Signed-off-by: NRahul Kundu <rahul.kundu@chelsio.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Edward Cree 提交于
Truncation of DMA_BIT_MASK to 32-bit dma_addr_t is semantically safe, but the compiler was warning because it was happening implicitly. Insert explicit casts to suppress the warnings. Reported-by: NRandy Dunlap <rdunlap@infradead.org> Signed-off-by: NEdward Cree <ecree@solarflare.com> Acked-by: Randy Dunlap <rdunlap@infradead.org> # build-tested Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 20 8月, 2020 9 次提交
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由 Wang Hai 提交于
Replace alloc_etherdev_mq with devm_alloc_etherdev_mqs. In this way, when probe fails, netdev can be freed automatically. Fixes: 4d5ae32f ("net: ethernet: Add a driver for Gemini gigabit ethernet") Reported-by: NHulk Robot <hulkci@huawei.com> Signed-off-by: NWang Hai <wanghai38@huawei.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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Commit 8dcf2ad3 ("net: atlantic: add hwmon getter for MAC temperature") implemented a read callback with an udelay(10000U). This fails to compile on ARM because the delay is >1ms. I doubt that it is needed to spin for 10ms even if possible on x86. >From looking at the code, the context appears to be preemptible so using usleep() should work and avoid busy spinning. Use readx_poll_timeout() in the poll loop. Fixes: 8dcf2ad3 ("net: atlantic: add hwmon getter for MAC temperature") Cc: Mark Starovoytov <mstarovoitov@marvell.com> Cc: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: NSebastian Andrzej Siewior <sebastian@breakpoint.cc> Acked-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Kurt Kanzenbach 提交于
In order to reduce code duplication between ptp drivers, generic helper functions were introduced. Use them. Suggested-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NKurt Kanzenbach <kurt@linutronix.de> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Kurt Kanzenbach 提交于
In order to reduce code duplication between ptp drivers, generic helper functions were introduced. Use them. Signed-off-by: NKurt Kanzenbach <kurt@linutronix.de> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Kurt Kanzenbach 提交于
In order to reduce code duplication between ptp drivers, generic helper functions were introduced. Use them. Signed-off-by: NKurt Kanzenbach <kurt@linutronix.de> Reviewed-and-tested-by: NPetr Machata <petrm@mellanox.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Cristobal Forno 提交于
Currently the driver reads RX and TX subCRQ handle array directly from a DMA-mapped buffer address when it needs to make a H_SEND_SUBCRQ hcall. This patch stores that information in the ibmvnic_sub_crq_queue structure instead of reading from the buffer received at login. The overall goal of this patch is to parse relevant information from the login response buffer and store it in the driver's private data structures so that we don't need to read directly from the buffer and can then free up that memory. Signed-off-by: NCristobal Forno <cforno12@linux.ibm.com> Reviewed-by: NJesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Shay Agroskin 提交于
Most statistics in ena driver are incremented, meaning that a stat's value is a sum of all increases done to it since driver/queue initialization. This patch makes all statistics this way, effectively making missed_tx statistic incremental. Also added a comment regarding rx_drops and tx_drops to make it clearer how these counters are calculated. Fixes: 11095fdb ("net: ena: add statistics for missed tx packets") Signed-off-by: NShay Agroskin <shayagr@amazon.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Shay Agroskin 提交于
The ena_del_napi_in_range() function unregisters the napi handler for rings in a given range. This function had the following WARN_ON macro: WARN_ON(ENA_IS_XDP_INDEX(adapter, i) && adapter->ena_napi[i].xdp_ring); This macro prints the call stack if the expression inside of it is true [1], but the expression inside of it is the wanted situation. The expression checks whether the ring has an XDP queue and its index corresponds to a XDP one. This patch changes the expression to !ENA_IS_XDP_INDEX(adapter, i) && adapter->ena_napi[i].xdp_ring which indicates an unwanted situation. Also, change the structure of the function. The napi handler is unregistered for all rings, and so there's no need to check whether the index is an XDP index or not. By removing this check the code becomes much more readable. Fixes: 548c4940 ("net: ena: Implement XDP_TX action") Signed-off-by: NShay Agroskin <shayagr@amazon.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Shay Agroskin 提交于
The reset work is scheduled by the timer routine whenever it detects that a device reset is required (e.g. when a keep_alive signal is missing). When releasing device resources in ena_destroy_device() the driver cancels the scheduling of the timer routine without destroying the reset work explicitly. This creates the following bug: The driver is suspended and the ena_suspend() function is called -> This function calls ena_destroy_device() to free the net device resources -> The driver waits for the timer routine to finish its execution and then cancels it, thus preventing from it to be called again. If, in its final execution, the timer routine schedules a reset, the reset routine might be called afterwards,and a redundant call to ena_restore_device() would be made. By changing the reset routine we allow it to read the device's state accurately. This is achieved by checking whether ENA_FLAG_TRIGGER_RESET flag is set before resetting the device and making both the destruction function and the flag check are under rtnl lock. The ENA_FLAG_TRIGGER_RESET is cleared at the end of the destruction routine. Also surround the flag check with 'likely' because we expect that the reset routine would be called only when ENA_FLAG_TRIGGER_RESET flag is set. The destruction of the timer and reset services in __ena_shutoff() have to stay, even though the timer routine is destroyed in ena_destroy_device(). This is to avoid a case in which the reset routine is scheduled after free_netdev() in __ena_shutoff(), which would create an access to freed memory in adapter->flags. Fixes: 8c5c7abd ("net: ena: add power management ops to the ENA driver") Signed-off-by: NShay Agroskin <shayagr@amazon.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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