Signed-off-by: NAlex Landau <landau.alex@gmail.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

However there are similar things in the EBIU_DDRQUE Register
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

we converted to using a system call for userspace spinlocks
rather than a dedicated exception long ago
Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-bu: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Turns on trace earlier, so crashes at kernel start should print out a
trace, making things easier to debug.
Signed-off-by: NRobin Getz <robin.getz@analog.com>
Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

 - Move cache initialization to C from assembly.
 - Move anomaly workaround for writing [ID]MEM_CONTROL to assembly, so
   that we don't have to mess around with .align directives in C source.
 - Fix a bug where bfin_write_DMEM_CONTROL would write to IMEM_CONTROL
 - Break out CPLB related code from kernel/setup.c into their own file.
 - Don't define variables in header files, only declare them.
Signed-off-by: NBernd Schmidt <bernd.schmidt@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

SIC_IWR crosses several registers
 - add missing implementations
 - make sure SIC_IWR is SET after boot
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Blackfin arch: defines and provides entry points for certain user space functions at fixed addresses

This patch defines (and provides) entry points for certain user space functions
at fixed addresses.  The Blackfin has no usable atomic instructions, but we can
ensure that these code sequences appear atomic from a user space point of view
by detecting when we're in the process of executing them during the interrupt
handler return path.  This allows much more efficient pthread lock
implementations than the bfin_spinlock syscall we're currently using.

Also provided is a small sys_rt_sigreturn stub which can be used by the signal
handler setup code.  The signal.c part will be committed separately.
Signed-off-by: NBernd Schmidt <bernd.schmidt@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

The ADSP-BF54x was specifically designed to meet the needs of convergent multimedia
applications where system performance and cost are essential ingredients. The
integration of multimedia, human interface, and connectivity peripherals combined
with increased system bandwidth and on-chip memory provides customers a platform to
design the most demanding applications.

Since now, ADSP-BF54x will be supported in the Linux kernel and bunch of related drivers
such as USB OTG, ATAPI, NAND flash controller, LCD framebuffer, sound, touch screen will
be submitted later.

Please enjoy the show.
Signed-off-by: NRoy Huang <roy.huang@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Here's a slightly cleaner way of creating the /proc structure for the
pnx8850.  mostly, it creates a directory with default mode 555, since the
one you're creating is mode 444, which is somewhat unusual for a directory
under /proc.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Using another systems defines is a safe way to get your code broken by
accident when that system is removed.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

  MODPOST vmlinux
WARNING: arch/mips/pmc-sierra/yosemite/built-in.o(.text+0x974): Section mismatch: reference to .init.data: (between 'prom_boot_secondary' and 'prom_cpus_done')
WARNING: arch/mips/pmc-sierra/yosemite/built-in.o(.text+0x980): Section mismatch: reference to .init.data: (between 'prom_boot_secondary' and 'prom_cpus_done')
WARNING: arch/mips/pmc-sierra/yosemite/built-in.o(.text+0x978): Section mismatch: reference to .init.data: (between 'prom_boot_secondary' and 'prom_cpus_done')
WARNING: arch/mips/pmc-sierra/yosemite/built-in.o(.text+0x984): Section mismatch: reference to .init.data: (between 'prom_boot_secondary' and 'prom_cpus_done')
WARNING: arch/mips/pmc-sierra/yosemite/built-in.o(.text+0x98c): Section mismatch: reference to .init.data: (between 'prom_boot_secondary' and 'prom_cpus_done')
WARNING: arch/mips/pmc-sierra/yosemite/built-in.o(.text+0x990): Section mismatch: reference to .init.data: (between 'prom_boot_secondary' and 'prom_cpus_done')
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

  MODPOST vmlinux
WARNING: arch/mips/mm/built-in.o(.text+0x1978): Section mismatch: reference to .init.text:except_vec2_sb1 (between 'sb1_cache_init' and 'sb1_flush_cache_sigtramp')
WARNING: arch/mips/mm/built-in.o(.text+0x1988): Section mismatch: reference to .init.text:except_vec2_sb1 (between 'sb1_cache_init' and 'sb1_flush_cache_sigtramp')
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

  MODPOST vmlinux
WARNING: arch/mips/philips/pnx8550/common/built-in.o(.text+0xd40): Section mismatch: reference to .init.data: (after 'pnx8550_platform_init')
WARNING: arch/mips/philips/pnx8550/common/built-in.o(.text+0xd44): Section mismatch: reference to .init.data: (after 'pnx8550_platform_init')
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

  MODPOST vmlinux
WARNING: arch/mips/au1000/common/built-in.o(.text+0x1750): Section mismatch: reference to .init.data: (between 'au1xxx_platform_init' and '__fixup_bigphys_addr')
WARNING: arch/mips/au1000/common/built-in.o(.text+0x1754): Section mismatch: reference to .init.data: (between 'au1xxx_platform_init' and '__fixup_bigphys_addr')
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NYoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Export contents of struct mips_fpu_emulator_stats via debugfs.

There is no way to read these statistics for now but they (at least
the "emulated" count) might be sometimes useful for performance tuning
on FPU-less CPUs.
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Currently a number of unaligned instructions is counted but not used.
Add /debug/mips/unaligned_instructions file to show the value.

And add /debug/mips/unaligned_action to control behavior upon an
unaligned access.  Possible actions are:

0: silently fixup the unaligned access.
1: send SIGBUS.
2: dump registers, process name, etc. and fixup.
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

* Fix pci ops for secondary PCIC
* Do not reserve 1MB for PCI MEM region (leave PCIBIOS_MIN_MEM zero)
* Use platform_device to provide ethernet addresses for internal NICs.
  (background: TX49XX SoCs include PCI NIC (TC35815 compatible)
  connected via its internal PCI bus, but the NIC's PROM interface is
  not connected to SEEPROM.  So we must provide its ethernet address
  by another way.)
* Check return value of early_read_config_word()
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Gets rid of some of the CONFIG_MIPS_MT_FPAFF #ifdefery.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

TX39XX and TX49XX have "reserved" segment in CKSEG3 area.
0xff000000-0xff3fffff on TX49XX and 0xff000000-0xfffeffff on TX39XX
are reserved (unmapped, uncached).  Controllers on these SoCs are
placed in this segment.

This patch add plat_ioremap() and plat_iounmap() to override default
behavior and implement these hooks for TX39/TX49.
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Use rtc-rs5c348 and at25 spi protocol driver and spi_txx9 spi
controller driver instead of platform dependent codes.

This patch also removes dependencies to old RTC interfaces such as
rtc_mips_get_time, etc.
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

GPIO 0..15 are for TX4938 PIO pins, GPIO 16..18 are for FPGA-driven
chipselect signals for SPI devices.
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

- use RTC_CLASS instead of GEN_RTC
- get rid of ds1216 in favour of a RTC_CLASS driver
- use correct console device for older RM400
- use physical addresses for 82596 device
- use 128 byte L1 cache line size (this is needed because most of the
  SNI caches are using 128 L2 cache lines)
Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Patch to add default configuration for the PMC-Sierra
MSP71xx devices.
Signed-off-by: NMarc St-Jean <Marc_St-Jean@pmc-sierra.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Patch to add PCI support for the PMC-Sierra MSP71xx devices.
Signed-off-by: NMarc St-Jean <Marc_St-Jean@pmc-sierra.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Patch to add mips common support for the PMC-Sierra MSP71xx devices.
Signed-off-by: NMarc St-Jean <Marc_St-Jean@pmc-sierra.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Patch to add core platform support for the PMC-Sierra MSP71xx devices.
Signed-off-by: NMarc St-Jean <Marc_St-Jean@pmc-sierra.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NFuxin Zhang <zhangfx@lemote.com>
Signed-off-by: NSongmao Tian <tiansm@lemote.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NFuxin Zhang <zhangfx@lemote.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Which will cut down the cost of RDHWR $29 which is used to obtain the
TLS pointer and so far being emulated in software down to a single cycle
operation.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>