- 25 12月, 2012 1 次提交
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由 Stephen Warren 提交于
Now that the only field in struct sys_timer is .init, delete the struct, and replace the machine descriptor .timer field with the initialization function itself. This will enable moving timer drivers into drivers/clocksource without having to place a public prototype of each struct sys_timer object into include/linux; the intent is to create a single of_clocksource_init() function that determines which timer driver to initialize by scanning the device dtree, much like the proposed irqchip_init() at: http://www.spinics.net/lists/arm-kernel/msg203686.html Includes mach-omap2 fixes from Igor Grinberg. Tested-by: NRobert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 07 11月, 2012 1 次提交
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由 Arnd Bergmann 提交于
The socfpga_boot_secondary is correctly marked as __cpuinit but references secondary_trampoline, which was introduced into the init section, causing this build warning: WARNING: vmlinux.o(.cpuinit.text+0xf90): Section mismatch in reference from the function socfpga_boot_secondary() to the variable .init.text:secondary_trampoline The function __cpuinit socfpga_boot_secondary() references a variable __init secondary_trampoline. If secondary_trampoline is only used by socfpga_boot_secondary then annotate secondary_trampoline with a matching annotation. The solution is to mark secondary_trampoline as cpuinit as well. Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 06 11月, 2012 1 次提交
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由 Pavel Machek 提交于
Early printk code needs UART to be mapped early during boot. early_printk() is left there during the start-up; it is useful as our emulators are fairly slow. Signed-off-by: NPavel Machek <pavel@denx.de> Acked-by: NDinh Nguyen <dinguyen@altera.com> [olof: removed redundant newlines] Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 27 10月, 2012 1 次提交
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由 Pavel Machek 提交于
Building a multiplatform kernel with combined armv7 and armv6 kernel does not work with the socfpga smp code, which contains v7-only instructions. Since this code never runs on armv6, we can annotate the assmebly with .arch armv7-a, as suggested by Russell King. [arnd: reword commit message] Signed-off-by: NPavel Machek <pavel@denx.de> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 26 10月, 2012 1 次提交
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由 Dinh Nguyen 提交于
Enable SMP for the SOCFPGA platform. Signed-off-by: NPavel Machek <pavel@denx.de> Signed-off-by: NDinh Nguyen <dinguyen@altera.com> Reviewed-by: NRob Herring <rob.herring@calxeda.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 14 9月, 2012 2 次提交
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由 Rob Herring 提交于
This lets us build a multiplatform kernel for experimental purposes. However, it will not be useful for any real work, because it relies on a number of useful things to be disabled for now: * SMP support must be turned off because of conflicting symbols. Marc Zyngier has proposed a solution by adding a new SOC operations structure to hold indirect function pointers for these, but that work is currently stalled * We turn on SPARSE_IRQ unconditionally, which is not supported on most platforms. Each of them is currently in a different state, but most are being worked on. * A common clock framework is in place since v3.4 but not yet being used. Work on this is on its way. * DEBUG_LL for early debugging is currently disabled. * THUMB2_KERNEL does not work with allyesconfig because the kernel gets too big [Rob Herring]: Rebased to not be dependent on the mass mach header rename. As a result, omap2plus, imx, mxs and ux500 are not converted. Highbank, picoxcell, mvebu, and socfpga are converted. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Acked-by: NJamie Iles <jamie@jamieiles.com> Cc: Dinh Nguyen <dinguyen@altera.com>
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由 Rob Herring 提交于
Move socfpga debug-macro.S over to common debug macro directory. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NDinh Nguyen <dinguyen@altera.com>
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- 19 7月, 2012 1 次提交
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由 Dinh Nguyen 提交于
Adding core definitions for Altera's SOCFPGA ARM platform. Mininum support for Altera's SOCFPGA Cyclone 5 hardware. Signed-off-by: NDinh Nguyen <dinguyen@altera.com> Reviewed-by: NPavel Machek <pavel@denx.de> Reviewed-by: NRob Herring <rob.herring@calxeda.com> Reviewed-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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