- 01 7月, 2020 6 次提交
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由 Likun Gao 提交于
Update sienna_cichlid driver if header file to match pptable changes. Signed-off-by: NLikun Gao <Likun.Gao@amd.com> Reviewed-by: NKenneth Feng <kenneth.feng@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Likun Gao 提交于
move smu_v11_0_get_max_power_limit and smu_v11_0_set_thermal_range function from smu_v11_0.c to asic specific _ppt.c to avoid powerplay table conflict with different ASIC with smu11. Signed-off-by: NLikun Gao <Likun.Gao@amd.com> Reviewed-by: NKenneth Feng <kenneth.feng@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
To avoid possible memory leak. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
Eliminate the buffer allocation and drop the unnecessary overdrive table uploading. Signed-off-by: NEvan Quan <evan.quan@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
Combine and simplify the logics for setup pptable. Signed-off-by: NEvan Quan <evan.quan@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
Combine and simplify the logics for retrieving bootup clocks. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 04 6月, 2020 1 次提交
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由 Likun Gao 提交于
SMU11 based similar to navi1x. v2: squash in SMU IF updates Signed-off-by: NLikun Gao <Likun.Gao@amd.com> Reviewed-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NKevin Wang <kevin1.wang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 30 5月, 2020 2 次提交
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由 Evan Quan 提交于
Thermal control is performed by PMFW. What handled in driver is just whether or not to enable the alert(to driver). Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
To fit the latest 54.24.0 PMFW. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NKenneth Feng <kenneth.feng@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 29 5月, 2020 2 次提交
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由 Wenhui Sheng 提交于
1. add smu_11_0_msg_mapping definition 2. add valid info for each SMC message in SRIOV Signed-off-by: NWenhui Sheng <Wenhui.Sheng@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: NKevin Wang <kevin1.wang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Kevin Wang 提交于
by default, vega20 will use legacy powerplay driver. in order to maintain the code conveniently in the future, remove the support of vega20 from swsmu. Signed-off-by: NKevin Wang <kevin1.wang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 23 4月, 2020 2 次提交
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由 Evan Quan 提交于
To fit the latest PMFW. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NKenneth Feng <kenneth.feng@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
To fit the latest SMC firmware 42.53 and eliminate the warning on driver loading. Signed-off-by: NEvan Quan <evan.quan@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NKenneth Feng <kenneth.feng@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 14 4月, 2020 1 次提交
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由 Likun Gao 提交于
Get SMC fw size before backdoor loading instead of giving an certain value, as it may different for different ASIC. Signed-off-by: NLikun Gao <Likun.Gao@amd.com> Reviewed-by: NKenneth Feng <kenneth.feng@amd.com> Reviewed-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NKevin Wang <kevin1.wang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 26 3月, 2020 1 次提交
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由 Alex Deucher 提交于
Add a common smu11 helper to set the AC/DC power source. Bug: https://gitlab.freedesktop.org/drm/amd/issues/1043Reviewed-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 10 3月, 2020 1 次提交
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由 Xiaojie Yuan 提交于
Fix version for navi12. Signed-off-by: NXiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 29 2月, 2020 2 次提交
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由 Matt Coffin 提交于
The new interface reads the argument in the call to send the message, so this is no longer needed, and shouldn't be used for concurrency safety reasons. Signed-off-by: NMatt Coffin <mcoffin13@gmail.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Matt Coffin 提交于
Move the responsibility for reading argument registers into the smu_send_smc_msg* implementations, so that adding a message-sending lock to protect the SMU registers will result in the lock still being held when the argument is read. v2: transition smu_v12_0, it's asics, and vega20 Signed-off-by: NMatt Coffin <mcoffin13@gmail.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 12 2月, 2020 1 次提交
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由 Evan Quan 提交于
To pair the latest SMU firmwares. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NXiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 08 1月, 2020 3 次提交
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由 Evan Quan 提交于
By this, we can avoid to pass in the VRAM address on every table transferring. That puts extra unnecessary traffics on SMU on some cases(e.g. polling the amdgpu_pm_info sysfs interface). V2: document what the driver table is for and how it works Signed-off-by: NEvan Quan <evan.quan@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
This is to fit the latest SMC firmware and it's backward compatible. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NKenneth Feng <kenneth.feng@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Have every asic provide a callback for this rather than a mix of generic and asic specific code. Reviewed-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 04 12月, 2019 2 次提交
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由 Likun Gao 提交于
Drop smu_send_smc_msg function from ASIC specify structure. Reuse smu_send_smc_msg_with_param function for smu_send_smc_msg. Set paramer to 0 for smu_send_msg function, otherwise it will send with previous paramer value (Not a certain value). Materialize msg type for smu send message function definition. Signed-off-by: NLikun Gao <Likun.Gao@amd.com> Reviewed-by: NKevin Wang <kevin1.wang@amd.com> Reviewed-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Likun Gao 提交于
Drop smu_send_smc_msg function from ASIC specify structure. Reuse smu_send_smc_msg_with_param function for smu_send_smc_msg. Set paramer to 0 for smu_send_msg function, otherwise it will send with previous paramer value (Not a certain value). Materialize msg type for smu send message function definition. Signed-off-by: NLikun Gao <Likun.Gao@amd.com> Reviewed-by: NKevin Wang <kevin1.wang@amd.com> Reviewed-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 20 11月, 2019 1 次提交
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由 Alex Deucher 提交于
BACO - Bus Active, Chip Off So we can use it for power savings rather than just reset. Reviewed-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 14 11月, 2019 1 次提交
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由 Kenneth Feng 提交于
sysfs interface to read pcie speed&width info on navi1x. v2: fix warning (trivial) Signed-off-by: NKenneth Feng <kenneth.feng@amd.com> Reviewed-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 12 11月, 2019 2 次提交
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由 Matt Coffin 提交于
[Why] On Navi10, and presumably arcterus, updating pp_table via sysfs would not re-scale the maximum possible power limit one can set. On navi10, the SMU code ignored the power percentage overdrive setting entirely, and would not allow you to exceed the default power limit at all. [How] Adding a function to the SMU interface to get the pptable version of the default power limit allows ASIC-specific code to provide the correct maximum-settable power limit for the current pptable. v3: fix spelling (Alex) Reviewed-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NMatt Coffin <mcoffin13@gmail.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Matt Coffin 提交于
[Why] Before this patch, there was no way to use pp_od_clk_voltage on navi [How] Similar to the vega20 implementation, but using the common smc_v11_0 headers, implemented the pp_od_clk_voltage API for navi10's pptable implementation Reviewed-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NMatt Coffin <mcoffin13@gmail.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 07 11月, 2019 1 次提交
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由 Evan Quan 提交于
To fit the latest SMU firmware. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NLe Ma <Le.Ma@amd.com> Reviewed-by: NKenneth Feng <kenneth.feng@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 26 10月, 2019 2 次提交
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由 Evan Quan 提交于
With this cleanup, the APIs from amdgpu_smu.c will map to ASIC specific ones directly. Those can be shared around all SMU V11/V12 ASICs will be put in smu_v11_0.c and smu_v12_0.c respectively. Signed-off-by: NEvan Quan <evan.quan@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
To fit the latest SMU firmware. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NKenneth Feng <kenneth.feng@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 03 10月, 2019 1 次提交
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由 Evan Quan 提交于
To pair the latest SMU firmware. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NLe Ma <Le.Ma@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 16 9月, 2019 1 次提交
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由 Evan Quan 提交于
Also bump the SMU11_DRIVER_IF_VERSION_ARCT. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NKevin Wang <kevin1.wang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 22 8月, 2019 2 次提交
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由 Evan Quan 提交于
Problems with current settings: 1. The min value was overrided to 0 on Vega20 & Navi10. While the expected should be -273.15 C. 2. The thermal min/max threshold was output in wrong unit on Navi10 & Arcturus. As TEMP_RANGE_MIN/MAX is already in millicelsius. And "*1000" in smu_v11_0_start_thermal_control makes the output wrongly. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NKenneth Feng <kenneth.feng@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
Update smc fw and driver interface header. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NKevin Wang <kevin1.wang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 13 8月, 2019 3 次提交
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由 Le Ma 提交于
Follow patch below: drm/amd/powerplay: re-define smu interface version for smu v11 Signed-off-by: NLe Ma <le.ma@amd.com> Reviewed-by: NKevin Wang <kevin1.wang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 tiancyin 提交于
update the smu11_driver_if_navi10.h since navi14 smu fw update to 53.12 Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: Ntiancyin <tianci.yin@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 tiancyin 提交于
[why] navi14 share same defination of smu interface version with navi10, anyone of them update the version may break the other one's version checking. [how] create different version defination, so that they can update their version separately. Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Ntiancyin <tianci.yin@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 19 7月, 2019 1 次提交
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由 Evan Quan 提交于
Current implementation is not actually able to detect invalid message/table/workload mapping. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NFeifei Xu <Feifei.Xu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 06 7月, 2019 1 次提交
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由 Kevin Wang 提交于
add baco reset support for smu11. it can help gpu do asic reset when gpu recovery. Signed-off-by: NKevin Wang <kevin1.wang@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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