- 09 12月, 2016 1 次提交
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>From : Woojung Huh <woojung.huh@microchip.com> Add functions to unregister phy fixup for modules. int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask) Unregister phy fixup from phy_fixup_list per bus_id, phy_uid & phy_uid_mask int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask) Unregister phy fixup from phy_fixup_list. Use it for fixup registered by phy_register_fixup_for_uid() int phy_unregister_fixup_for_id(const char *bus_id) Unregister phy fixup from phy_fixup_list. Use it for fixup registered by phy_register_fixup_for_id() Signed-off-by: NWoojung Huh <woojung.huh@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 06 12月, 2016 1 次提交
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由 Jesper Nilsson 提交于
According to the documentation, the PHYs supported by this driver can also support pause frames. Announce this to be so. Tested with a TI83822I. Acked-by: NAndrew F. Davis <afd@ti.com> Signed-off-by: NJesper Nilsson <jesper.nilsson@axis.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 02 12月, 2016 4 次提交
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由 Stephen Agate 提交于
Add support for the Vitesse VSC8572 which is functionally equivalent to the already supported VSC8574. As such, all the same handling functions are used since the VSC8572 merely has half the number of phy blocks internally. Signed-off-by: NStephen Agate <stephen.agate@uk.thalesgroup.com> Signed-off-by: NNeill Whillans <neill.whillans@codethink.co.uk> Reviewed-by: NDaniel Silverstone <daniel.silverstone@codethink.co.uk> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Raju Lakkaraju 提交于
PHY drivers to have an eth_tp_mdix_ctrl to indicate what is the configured MDI setting, and read eth_tp_mdi to indicate what is the current status, Add new parameter mdix_ctrl in phy_device structure and fix driver. Signed-off-by: NRaju Lakkaraju <Raju.Lakkaraju@microsemi.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Raju Lakkaraju 提交于
To connect two ports of the same configuration (MDI to MDI or MDI-X to MDI-X) with a 10/100/1000 Mbit/s connection, an Ethernet crossover cable is needed to cross over the transmit and receive signals in the cable, so that they are matched at the connector level. When connecting an MDI port to an MDI-X port a straight through cable is used while to connect two MDI ports or two MDI-X ports a crossover cable must be used. Conventionally MDI is used on end devices while MDI-X is used on hubs and switches Auto MDI-X automatically detects the required cable connection type and configures the connection appropriately, removing the need for crossover cables to interconnect switches or connecting PCs peer-to-peer. Signed-off-by: NRaju Lakkaraju <Raju.Lakkaraju@microsemi.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Raju Lakkaraju 提交于
Update the mdix and mdix_ctrl with corresponding ethtool configuration parameters. Signed-off-by: NRaju Lakkaraju <Raju.Lakkaraju@microsemi.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 30 11月, 2016 4 次提交
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由 Florian Fainelli 提交于
Broadcom BCM7xxx internal PHYs can leverage the Broadcom PHY library module PHY error counters helper functions, just implement the appropriate PHY driver function calls to do so. We need to allocate some storage space for our PHY statistics, and provide it to the Broadcom PHY library, so do this in a specific probe function, and slightly wrap the get_stats function call. Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Florian Fainelli 提交于
Broadcom PHYs expose a number of PHY error counters: receive errors, false carrier sense, SerDes BER count, local and remote receive errors. Add support code to allow retrieving these error counters. Since the Broadcom PHY library code is used by several drivers, make it possible for them to specify the storage for the software copy of the statistics. Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Geert Uytterhoeven 提交于
If device_release_driver(&phydev->mdio.dev) is called, it releases all resources belonging to the PHY device. Hence the subsequent call to phy_led_triggers_unregister() will access already freed memory when unregistering the LEDs. Move the call to phy_led_triggers_unregister() before the possible call to device_release_driver() to fix this. Fixes: 2e0bc452 ("net: phy: leds: add support for led triggers on phy link state change") Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Tested-by: NZach Brown <zach.brown@ni.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 jbrunet 提交于
This patch adds an option to disable EEE advertisement in the generic PHY by providing a mask of prohibited modes corresponding to the value found in the MDIO_AN_EEE_ADV register. On some platforms, PHY Low power idle seems to be causing issues, even breaking the link some cases. The patch provides a convenient way for these platforms to disable EEE advertisement and work around the issue. Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Tested-by: NYegor Yefremov <yegorslists@googlemail.com> Tested-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 29 11月, 2016 1 次提交
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由 Martin Blumenstingl 提交于
The old logic always enabled the TX-delay when the phy-mode was set to PHY_INTERFACE_MODE_RGMII. There are dedicated phy-modes which tell the PHY driver to enable the RX and/or TX delays: - PHY_INTERFACE_MODE_RGMII should disable the RX and TX delay in the PHY (if required, the MAC should add the delays in this case) - PHY_INTERFACE_MODE_RGMII_ID should enable RX and TX delay in the PHY - PHY_INTERFACE_MODE_RGMII_TXID should enable the TX delay in the PHY - PHY_INTERFACE_MODE_RGMII_RXID should enable the RX delay in the PHY (currently not supported by RTL8211F) With this patch we enable the TX delay for PHY_INTERFACE_MODE_RGMII_ID and PHY_INTERFACE_MODE_RGMII_TXID. Additionally we now explicity disable the TX-delay, which seems to be enabled automatically after a hard-reset of the PHY (by triggering it's reset pin) to get a consistent state (as defined by the phy-mode). This fixes a compatibility problem with some SoCs where the TX-delay was also added by the MAC. With the TX-delay being applied twice the TX clock was off and TX traffic was broken or very slow (<10Mbit/s) on 1000Mbit/s links. Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 26 11月, 2016 1 次提交
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由 Woojung Huh 提交于
When phy_init_hw() fails at phy_attach_direct(); - phy_detach() calls phy_led_triggers_unregister() without previous call of phy_led_triggers_register(). - still call phy_led_triggers_register() and cause memory leak. Fixes: 2e0bc452 ("net: phy: leds: add support for led triggers on phy link state change") Signed-off-by: NWoojung Huh <woojung.huh@microchip.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 25 11月, 2016 6 次提交
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由 Florian Fainelli 提交于
PHY drivers should be able to rely on the caller of {get,set}_tunable to have acquired the PHY device mutex, in order to both serialize against concurrent calls of these functions, but also against PHY state machine changes. All ethtool PHY-level functions do this, except {get,set}_tunable, so we make them consistent here as well. We need to update the Microsemi PHY driver in the same commit to avoid introducing either deadlocks, or lack of proper locking. Fixes: 968ad9da ("ethtool: Implements ETHTOOL_PHY_GTUNABLE/ETHTOOL_PHY_STUNABLE") Fixes: 310d9ad5 ("net: phy: Add downshift get/set support in Microsemi PHYs driver") Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Reviewed-by: NAllan W. Nielsen <allan.nielsen@microsemi.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Florian Fainelli 提交于
Add support for configuring the downshift/Wirespeed enable/disable toggles and specify a link retry value ranging from 1 to 9. Since the integrated BCM7xxx have issues when wirespeed is enabled and EEE is also enabled, we do disable EEE if wirespeed is enabled. Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Florian Fainelli 提交于
In preparation for adding support for Wirespeed/downshift, we need to change bcm_phy_eee_enable() to allow enabling or disabling EEE, so make the function take an extra enable/disable boolean parameter and rename it to illustrate it sets EEE, not necessarily just enables it. Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Florian Fainelli 提交于
Broadcom's Wirespeed feature allows us to configure how auto-negotiation should behave with fewer working pairs of wires on a cable. Add support code for retrieving and setting such downshift counters using the recently added ethtool downshift tunables. Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Florian Fainelli 提交于
We are going to need these functions to implement support for Broadcom Wirespeed, aka downshift. Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Uwe Kleine-König 提交于
Make it possible to generate trace events for mdio read and write accesses. Signed-off-by: NUwe Kleine-König <uwe@kleine-koenig.org> Acked-by: NSteven Rostedt <rostedt@goodmis.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 24 11月, 2016 1 次提交
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由 Kirill Esipov 提交于
Fix setting of SUPPORTED_FIBRE bit as it was not present in features of KSZ8041. Signed-off-by: NKirill Esipov <yesipov@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 19 11月, 2016 2 次提交
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由 Woojung Huh 提交于
Relocate mdix code to phy driver to be called at config_init(). Signed-off-by: NWoojung Huh <woojung.huh@microchip.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Raju Lakkaraju 提交于
Implements the phy tunable function pointers and implement downshift functionality for MSCC PHYs. Signed-off-by: NRaju Lakkaraju <Raju.Lakkaraju@microsemi.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NAllan W. Nielsen <allan.nielsen@microsemi.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 18 11月, 2016 1 次提交
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由 Johan Hovold 提交于
Make sure to drop the of_node reference taken in fixed_phy_register() when deregistering a PHY. Fixes: a7595121 ("net: phy: extend fixed driver with fixed_phy_register()") Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 17 11月, 2016 1 次提交
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由 Alex 提交于
With RGMII, we need a 1.5 to 2ns skew between clock and data lines. The VSC8601 can handle this internally. While the VSC8601 can set more fine-grained delays, the standard skew settings work out of the box. The same heuristic is used to determine when this skew should be enabled as in vsc824x_config_init(). Tested on custom board with AM3352 SOC and VSC801 PHY. Signed-off-by: NAlexandru Gagniuc <alex.g@adaptrum.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 16 11月, 2016 1 次提交
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由 Florian Fainelli 提交于
This function just calls into genphy_restart_aneg() to perform an autonegotation restart. Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 15 11月, 2016 1 次提交
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由 Florian Fainelli 提交于
While it is useful to know which MDIO driver is being registered, demote the pr_info() to a pr_debug(). Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 14 11月, 2016 1 次提交
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由 Uwe Kleine-König 提交于
Instead of remembering if the page was changed, just compare the current page to the saved one. This is easier and has the advantage to save a register write if the page was already restored. Signed-off-by: NUwe Kleine-König <uwe@kleine-koenig.org> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 13 11月, 2016 1 次提交
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由 Lendacky, Thomas 提交于
Make phy_aneg_done() available to drivers so that the result of the auto-negotiation initiated by phy_start_aneg() can be determined. Remove the local implementation of phy_aneg_done() from the Aeroflex driver and use the phy library version. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 10 11月, 2016 3 次提交
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由 Richard Cochran 提交于
The dp83640 has a frequency resolution of about 0.029 ppb. This patch lets users of the device benefit from the increased frequency resolution when tuning the clock. Signed-off-by: NRichard Cochran <richardcochran@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Neil Armstrong 提交于
Add driver for the Internal RMII PHY found in the Amlogic Meson GXL SoCs. This PHY seems to only implement some standard registers and need some workarounds to provide autoneg values from vendor registers. Some magic values are currently used to configure the PHY, and this a temporary setup until clarification about these registers names and registers fields are provided by Amlogic. Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Neil Armstrong 提交于
In order to support PHY switching on Amlogic GXL SoCs, add support for 16bit and 32bit registers sizes. Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 08 11月, 2016 3 次提交
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由 Johan Hovold 提交于
Make sure to drop the reference taken by bus_find_device_by_name() before returning from phy_connect() and phy_attach(). Note that both function still take a reference to the phy device through phy_attach_direct(). Fixes: e1393456 ("[PATCH] PHY Layer fixup") Cc: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: NJohan Hovold <johan@kernel.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jon Mason 提交于
The BCM54810 PHY requires some semi-unique configuration, which results in some additional configuration in addition to the standard config. Also, some users of the BCM54810 require the PHY lanes to be swapped. Since there is no way to detect this, add a device tree query to see if it is applicable. Inspired-by: NVikas Soni <vsoni@broadcom.com> Signed-off-by: NJon Mason <jon.mason@broadcom.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jon Mason 提交于
Add a helper function to read the AUXCTL register for the BCM54xx. This mirrors the bcm54xx_auxctl_write function already present in the code. Signed-off-by: NJon Mason <jon.mason@broadcom.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 30 10月, 2016 3 次提交
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由 Raju Lakkaraju 提交于
Signed-off-by: NRaju Lakkaraju <Raju.Lakkaraju@microsemi.com> Signed-off-by: NAllan W. Nielsen <allan.nielsen@microsemi.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Roger Quadros 提交于
This PHY has a compatible register set with DP83848x so add support for it. Acked-by: NAndrew F. Davis <afd@ti.com> Signed-off-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Fabio Estevam 提交于
Add a definition for PHY ID mask for improving code readability. Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 28 10月, 2016 2 次提交
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由 Zefir Kurtisi 提交于
In SGMII mode, we observed an autonegotiation issue after power-down-up cycles where the copper side reports successful link establishment but the SGMII side's link is down. This happened in a setup where the at8031 is connected over SGMII to a eTSEC (fsl gianfar), but so far could not be reproduced with other Ethernet device / driver combinations. This commit adds a wrapper function for at8031 that in case of operating in SGMII mode double checks SGMII link state when generic aneg_done() succeeds. It prints a warning on failure but intentionally does not try to recover from this state. As a result, if you ever see a warning '803x_aneg_done: SGMII link is not ok' you will end up having an Ethernet link up but won't get any data through. This should not happen, if it does, please contact the module maintainer. Signed-off-by: NZefir Kurtisi <zefir.kurtisi@neratec.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Zefir Kurtisi 提交于
This reverts commit 98267311. Suspending the SGMII alongside the copper side made the at803x inaccessable while powered down, e.g. it can't be re-probed after suspend. Signed-off-by: NZefir Kurtisi <zefir.kurtisi@neratec.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 27 10月, 2016 1 次提交
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由 Xo Wang 提交于
This PHY has internal delays enabled after reset. This clears the internal delay enables unless the interface specifically requests them. Signed-off-by: NXo Wang <xow@google.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Reviewed-by: NJoel Stanley <joel@jms.id.au> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 21 10月, 2016 1 次提交
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由 Shaohui Xie 提交于
The AQR106 and AQR107 can use the existing driver. Signed-off-by: NShaohui Xie <Shaohui.Xie@nxp.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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