1. 24 7月, 2020 1 次提交
  2. 05 5月, 2020 1 次提交
  3. 27 3月, 2020 1 次提交
  4. 10 1月, 2020 1 次提交
    • R
      iommu/io-pgtable-arm: Rationalise TTBRn handling · d1e5f26f
      Robin Murphy 提交于
      TTBR1 values have so far been redundant since no users implement any
      support for split address spaces. Crucially, though, one of the main
      reasons for wanting to do so is to be able to manage each half entirely
      independently, e.g. context-switching one set of mappings without
      disturbing the other. Thus it seems unlikely that tying two tables
      together in a single io_pgtable_cfg would ever be particularly desirable
      or useful.
      
      Streamline the configs to just a single conceptual TTBR value
      representing the allocated table. This paves the way for future users to
      support split address spaces by simply allocating a table and dealing
      with the detailed TTBRn logistics themselves.
      Tested-by: NJordan Crouse <jcrouse@codeaurora.org>
      Signed-off-by: NRobin Murphy <robin.murphy@arm.com>
      [will: Drop change to ttbr value]
      Signed-off-by: NWill Deacon <will@kernel.org>
      d1e5f26f
  5. 11 11月, 2019 7 次提交
  6. 15 10月, 2019 1 次提交
  7. 30 8月, 2019 14 次提交
  8. 30 7月, 2019 6 次提交
  9. 24 7月, 2019 1 次提交
  10. 31 5月, 2019 1 次提交
  11. 26 4月, 2019 1 次提交
    • W
      iommu/mediatek: Fix leaked of_node references · 1eb8e4e2
      Wen Yang 提交于
      The call to of_parse_phandle returns a node pointer with refcount
      incremented thus it must be explicitly decremented after the last
      usage.
      
      581 static int mtk_iommu_probe(struct platform_device *pdev)
      582 {
          ...
      626         for (i = 0; i < larb_nr; i++) {
      627                 struct device_node *larbnode;
          ...
      631                 larbnode = of_parse_phandle(...);
      632                 if (!larbnode)
      633                         return -EINVAL;
      634
      635                 if (!of_device_is_available(larbnode))
      636                         continue;             ---> leaked here
      637
          ...
      643                 if (!plarbdev)
      644                         return -EPROBE_DEFER; ---> leaked here
          ...
      647                 component_match_add_release(dev, &match, release_of,
      648                                             compare_of, larbnode);
                                         ---> release_of will call of_node_put
      649         }
          ...
      650
      
      Detected by coccinelle with the following warnings:
      ./drivers/iommu/mtk_iommu.c:644:3-9: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 631, but without a corresponding object release within this function.
      Signed-off-by: NWen Yang <wen.yang99@zte.com.cn>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Matthias Brugger <matthias.bgg@gmail.com>
      Cc: iommu@lists.linux-foundation.org
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: linux-mediatek@lists.infradead.org
      Cc: linux-kernel@vger.kernel.org
      Reviewed-by: NMatthias Brugger <mbrugger@suse.com>
      Signed-off-by: NJoerg Roedel <jroedel@suse.de>
      1eb8e4e2
  12. 17 12月, 2018 1 次提交
  13. 06 11月, 2018 1 次提交
  14. 31 10月, 2018 1 次提交
  15. 08 8月, 2018 1 次提交
  16. 21 3月, 2018 1 次提交
    • Y
      iommu/mediatek: Fix protect memory setting · 70ca608b
      Yong Wu 提交于
      In MediaTek's IOMMU design, When a iommu translation fault occurs
      (HW can NOT translate the destination address to a valid physical
      address), the IOMMU HW output the dirty data into a special memory
      to avoid corrupting the main memory, this is called "protect memory".
      the register(0x114) for protect memory is a little different between
      mt8173 and mt2712.
      
      In the mt8173, bit[30:6] in the register represents [31:7] of the
      physical address. In the 4GB mode, the register bit[31] should be 1.
      While in the mt2712, the bits don't shift. bit[31:7] in the register
      represents [31:7] in the physical address, and bit[1:0] in the
      register represents bit[33:32] of the physical address if it has.
      
      Fixes: e6dec923 ("iommu/mediatek: Add mt2712 IOMMU support")
      Reported-by: NHonghui Zhang <honghui.zhang@mediatek.com>
      Signed-off-by: NYong Wu <yong.wu@mediatek.com>
      Signed-off-by: NJoerg Roedel <jroedel@suse.de>
      70ca608b