1. 30 5月, 2014 24 次提交
    • A
      KVM: PPC: Disable NX for old magic page using guests · f3383cf8
      Alexander Graf 提交于
      Old guests try to use the magic page, but map their trampoline code inside
      of an NX region.
      
      Since we can't fix those old kernels, try to detect whether the guest is sane
      or not. If not, just disable NX functionality in KVM so that old guests at
      least work at all. For newer guests, add a bit that we can set to keep NX
      functionality available.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      f3383cf8
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      KVM: PPC: BOOK3S: HV: Add mixed page-size support for guest · 1f365bb0
      Aneesh Kumar K.V 提交于
      On recent IBM Power CPUs, while the hashed page table is looked up using
      the page size from the segmentation hardware (i.e. the SLB), it is
      possible to have the HPT entry indicate a larger page size.  Thus for
      example it is possible to put a 16MB page in a 64kB segment, but since
      the hash lookup is done using a 64kB page size, it may be necessary to
      put multiple entries in the HPT for a single 16MB page.  This
      capability is called mixed page-size segment (MPSS).  With MPSS,
      there are two relevant page sizes: the base page size, which is the
      size used in searching the HPT, and the actual page size, which is the
      size indicated in the HPT entry. [ Note that the actual page size is
      always >= base page size ].
      
      We use "ibm,segment-page-sizes" device tree node to advertise
      the MPSS support to PAPR guest. The penc encoding indicates whether
      we support a specific combination of base page size and actual
      page size in the same segment. We also use the penc value in the
      LP encoding of HPTE entry.
      
      This patch exposes MPSS support to KVM guest by advertising the
      feature via "ibm,segment-page-sizes". It also adds the necessary changes
      to decode the base page size and the actual page size correctly from the
      HPTE entry.
      Signed-off-by: NAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      1f365bb0
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      KVM: PPC: BOOK3S: HV: Prefer CMA region for hash page table allocation · 792fc497
      Aneesh Kumar K.V 提交于
      Today when KVM tries to reserve memory for the hash page table it
      allocates from the normal page allocator first. If that fails it
      falls back to CMA's reserved region. One of the side effects of
      this is that we could end up exhausting the page allocator and
      get linux into OOM conditions while we still have plenty of space
      available in CMA.
      
      This patch addresses this issue by first trying hash page table
      allocation from CMA's reserved region before falling back to the normal
      page allocator. So if we run out of memory, we really are out of memory.
      Signed-off-by: NAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      792fc497
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      KVM: PPC: Book3S PR: Expose TM registers · 9916d57e
      Alexander Graf 提交于
      POWER8 introduces transactional memory which brings along a number of new
      registers and MSR bits.
      
      Implementing all of those is a pretty big headache, so for now let's at least
      emulate enough to make Linux's context switching code happy.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      9916d57e
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      KVM: PPC: Book3S PR: Expose EBB registers · 2e23f544
      Alexander Graf 提交于
      POWER8 introduces a new facility called the "Event Based Branch" facility.
      It contains of a few registers that indicate where a guest should branch to
      when a defined event occurs and it's in PR mode.
      
      We don't want to really enable EBB as it will create a big mess with !PR guest
      mode while hardware is in PR and we don't really emulate the PMU anyway.
      
      So instead, let's just leave it at emulation of all its registers.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      2e23f544
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      KVM: PPC: Book3S PR: Expose TAR facility to guest · e14e7a1e
      Alexander Graf 提交于
      POWER8 implements a new register called TAR. This register has to be
      enabled in FSCR and then from KVM's point of view is mere storage.
      
      This patch enables the guest to use TAR.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      e14e7a1e
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      KVM: PPC: Book3S PR: Handle Facility interrupt and FSCR · 616dff86
      Alexander Graf 提交于
      POWER8 introduced a new interrupt type called "Facility unavailable interrupt"
      which contains its status message in a new register called FSCR.
      
      Handle these exits and try to emulate instructions for unhandled facilities.
      Follow-on patches enable KVM to expose specific facilities into the guest.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      616dff86
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      KVM: PPC: Book3S PR: Emulate TIR register · a5948fa0
      Alexander Graf 提交于
      In parallel to the Processor ID Register (PIR) threaded POWER8 also adds a
      Thread ID Register (TIR). Since PR KVM doesn't emulate more than one thread
      per core, we can just always expose 0 here.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      a5948fa0
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      KVM: PPC: Book3S PR: Ignore PMU SPRs · f8f6eb0d
      Alexander Graf 提交于
      When we expose a POWER8 CPU into the guest, it will start accessing PMU SPRs
      that we don't emulate. Just ignore accesses to them.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      f8f6eb0d
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      KVM: PPC: Book3S: Move little endian conflict to HV KVM · f24bc1ed
      Alexander Graf 提交于
      With the previous patches applied, we can now successfully use PR KVM on
      little endian hosts which means we can now allow users to select it.
      
      However, HV KVM still needs some work, so let's keep the kconfig conflict
      on that one.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      f24bc1ed
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      KVM: PPC: Book3S PR: Do dcbz32 patching with big endian instructions · cd087eef
      Alexander Graf 提交于
      When the host CPU we're running on doesn't support dcbz32 itself, but the
      guest wants to have dcbz only clear 32 bytes of data, we loop through every
      executable mapped page to search for dcbz instructions and patch them with
      a special privileged instruction that we emulate as dcbz32.
      
      The only guests that want to see dcbz act as 32byte are book3s_32 guests, so
      we don't have to worry about little endian instruction ordering. So let's
      just always search for big endian dcbz instructions, also when we're on a
      little endian host.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      cd087eef
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      KVM: PPC: Make shared struct aka magic page guest endian · 5deb8e7a
      Alexander Graf 提交于
      The shared (magic) page is a data structure that contains often used
      supervisor privileged SPRs accessible via memory to the user to reduce
      the number of exits we have to take to read/write them.
      
      When we actually share this structure with the guest we have to maintain
      it in guest endianness, because some of the patch tricks only work with
      native endian load/store operations.
      
      Since we only share the structure with either host or guest in little
      endian on book3s_64 pr mode, we don't have to worry about booke or book3s hv.
      
      For booke, the shared struct stays big endian. For book3s_64 hv we maintain
      the struct in host native endian, since it never gets shared with the guest.
      
      For book3s_64 pr we introduce a variable that tells us which endianness the
      shared struct is in and route every access to it through helper inline
      functions that evaluate this variable.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      5deb8e7a
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      KVM: PPC: PR: Fill pvinfo hcall instructions in big endian · 2743103f
      Alexander Graf 提交于
      We expose a blob of hypercall instructions to user space that it gives to
      the guest via device tree again. That blob should contain a stream of
      instructions necessary to do a hypercall in big endian, as it just gets
      passed into the guest and old guests use them straight away.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      2743103f
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      KVM: PPC: Book3S PR: PAPR: Access RTAS in big endian · b59d9d26
      Alexander Graf 提交于
      When the guest does an RTAS hypercall it keeps all RTAS variables inside a
      big endian data structure.
      
      To make sure we don't have to bother about endianness inside the actual RTAS
      handlers, let's just convert the whole structure to host endian before we
      call our RTAS handlers and back to big endian when we return to the guest.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      b59d9d26
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      KVM: PPC: Book3S PR: PAPR: Access HTAB in big endian · 1692aa3f
      Alexander Graf 提交于
      The HTAB on PPC is always in big endian. When we access it via hypercalls
      on behalf of the guest and we're running on a little endian host, we need
      to make sure we swap the bits accordingly.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      1692aa3f
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      KVM: PPC: Book3S PR: Default to big endian guest · 94810ba4
      Alexander Graf 提交于
      The default MSR when user space does not define anything should be identical
      on little and big endian hosts, so remove MSR_LE from it.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      94810ba4
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      KVM: PPC: Book3S_64 PR: Access shadow slb in big endian · 14a7d41d
      Alexander Graf 提交于
      The "shadow SLB" in the PACA is shared with the hypervisor, so it has to
      be big endian. We access the shadow SLB during world switch, so let's make
      sure we access it in big endian even when we're on a little endian host.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      14a7d41d
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      KVM: PPC: Book3S_64 PR: Access HTAB in big endian · 4e509af9
      Alexander Graf 提交于
      The HTAB is always big endian. We access the guest's HTAB using
      copy_from/to_user, but don't yet take care of the fact that we might
      be running on an LE host.
      
      Wrap all accesses to the guest HTAB with big endian accessors.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      4e509af9
    • A
      KVM: PPC: Book3S_32: PR: Access HTAB in big endian · 860540bc
      Alexander Graf 提交于
      The HTAB is always big endian. We access the guest's HTAB using
      copy_from/to_user, but don't yet take care of the fact that we might
      be running on an LE host.
      
      Wrap all accesses to the guest HTAB with big endian accessors.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      860540bc
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      KVM: PPC: Book3S: PR: Fix C/R bit setting · 740f834e
      Alexander Graf 提交于
      Commit 9308ab8e made C/R HTAB updates go byte-wise into the target HTAB.
      However, it didn't update the guest's copy of the HTAB, but instead the
      host local copy of it.
      
      Write to the guest's HTAB instead.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      CC: Paul Mackerras <paulus@samba.org>
      Acked-by: NPaul Mackerras <paulus@samba.org>
      740f834e
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      KVM: PPC: BOOK3S: PR: Fix WARN_ON with debug options on · 7562c4fd
      Aneesh Kumar K.V 提交于
      With debug option "sleep inside atomic section checking" enabled we get
      the below WARN_ON during a PR KVM boot. This is because upstream now
      have PREEMPT_COUNT enabled even if we have preempt disabled. Fix the
      warning by adding preempt_disable/enable around floating point and altivec
      enable.
      
      WARNING: at arch/powerpc/kernel/process.c:156
      Modules linked in: kvm_pr kvm
      CPU: 1 PID: 3990 Comm: qemu-system-ppc Tainted: G        W     3.15.0-rc1+ #4
      task: c0000000eb85b3a0 ti: c0000000ec59c000 task.ti: c0000000ec59c000
      NIP: c000000000015c84 LR: d000000003334644 CTR: c000000000015c00
      REGS: c0000000ec59f140 TRAP: 0700   Tainted: G        W      (3.15.0-rc1+)
      MSR: 8000000000029032 <SF,EE,ME,IR,DR,RI>  CR: 42000024  XER: 20000000
      CFAR: c000000000015c24 SOFTE: 1
      GPR00: d000000003334644 c0000000ec59f3c0 c000000000e2fa40 c0000000e2f80000
      GPR04: 0000000000000800 0000000000002000 0000000000000001 8000000000000000
      GPR08: 0000000000000001 0000000000000001 0000000000002000 c000000000015c00
      GPR12: d00000000333da18 c00000000fb80900 0000000000000000 0000000000000000
      GPR16: 0000000000000000 0000000000000000 0000000000000000 00003fffce4e0fa1
      GPR20: 0000000000000010 0000000000000001 0000000000000002 00000000100b9a38
      GPR24: 0000000000000002 0000000000000000 0000000000000000 0000000000000013
      GPR28: 0000000000000000 c0000000eb85b3a0 0000000000002000 c0000000e2f80000
      NIP [c000000000015c84] .enable_kernel_fp+0x84/0x90
      LR [d000000003334644] .kvmppc_handle_ext+0x134/0x190 [kvm_pr]
      Call Trace:
      [c0000000ec59f3c0] [0000000000000010] 0x10 (unreliable)
      [c0000000ec59f430] [d000000003334644] .kvmppc_handle_ext+0x134/0x190 [kvm_pr]
      [c0000000ec59f4c0] [d00000000324b380] .kvmppc_set_msr+0x30/0x50 [kvm]
      [c0000000ec59f530] [d000000003337cac] .kvmppc_core_emulate_op_pr+0x16c/0x5e0 [kvm_pr]
      [c0000000ec59f5f0] [d00000000324a944] .kvmppc_emulate_instruction+0x284/0xa80 [kvm]
      [c0000000ec59f6c0] [d000000003336888] .kvmppc_handle_exit_pr+0x488/0xb70 [kvm_pr]
      [c0000000ec59f790] [d000000003338d34] kvm_start_lightweight+0xcc/0xdc [kvm_pr]
      [c0000000ec59f960] [d000000003336288] .kvmppc_vcpu_run_pr+0xc8/0x190 [kvm_pr]
      [c0000000ec59f9f0] [d00000000324c880] .kvmppc_vcpu_run+0x30/0x50 [kvm]
      [c0000000ec59fa60] [d000000003249e74] .kvm_arch_vcpu_ioctl_run+0x54/0x1b0 [kvm]
      [c0000000ec59faf0] [d000000003244948] .kvm_vcpu_ioctl+0x478/0x760 [kvm]
      [c0000000ec59fcb0] [c000000000224e34] .do_vfs_ioctl+0x4d4/0x790
      [c0000000ec59fd90] [c000000000225148] .SyS_ioctl+0x58/0xb0
      [c0000000ec59fe30] [c00000000000a1e4] syscall_exit+0x0/0x98
      Signed-off-by: NAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      7562c4fd
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      KVM: PPC: BOOK3S: PR: Enable Little Endian PR guest · e5ee5422
      Aneesh Kumar K.V 提交于
      This patch make sure we inherit the LE bit correctly in different case
      so that we can run Little Endian distro in PR mode
      Signed-off-by: NAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      e5ee5422
    • A
      KVM: PPC: E500: Add dcbtls emulation · 8f20a3ab
      Alexander Graf 提交于
      The dcbtls instruction is able to lock data inside the L1 cache.
      
      We don't want to give the guest actual access to hardware cache locks,
      as that could influence other VMs on the same system. But we can tell
      the guest that its locking attempt failed.
      
      By implementing the instruction we at least don't give the guest a
      program exception which it definitely does not expect.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      8f20a3ab
    • A
      KVM: PPC: E500: Ignore L1CSR1_ICFI,ICLFR · 07fec1c2
      Alexander Graf 提交于
      The L1 instruction cache control register contains bits that indicate
      that we're still handling a request. Mask those out when we set the SPR
      so that a read doesn't assume we're still doing something.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      07fec1c2
  2. 13 4月, 2014 1 次提交
  3. 09 4月, 2014 14 次提交
    • S
      powerpc/powernv Adapt opal-elog and opal-dump to new sysfs_remove_file_self · cc4f265a
      Stewart Smith 提交于
      We are currently using sysfs_schedule_callback() which is deprecated
      and about to be removed. Switch to the new interface instead.
      Signed-off-by: NStewart Smith <stewart@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      cc4f265a
    • M
      power, sched: stop updating inside arch_update_cpu_topology() when nothing to be update · 9a013361
      Michael Wang 提交于
      Since v1:
      	Edited the comment according to Srivatsa's suggestion.
      
      During the testing, we encounter below WARN followed by Oops:
      
      	WARNING: at kernel/sched/core.c:6218
      	...
      	NIP [c000000000101660] .build_sched_domains+0x11d0/0x1200
      	LR [c000000000101358] .build_sched_domains+0xec8/0x1200
      	PACATMSCRATCH [800000000000f032]
      	Call Trace:
      	[c00000001b103850] [c000000000101358] .build_sched_domains+0xec8/0x1200
      	[c00000001b1039a0] [c00000000010aad4] .partition_sched_domains+0x484/0x510
      	[c00000001b103aa0] [c00000000016d0a8] .rebuild_sched_domains+0x68/0xa0
      	[c00000001b103b30] [c00000000005cbf0] .topology_work_fn+0x10/0x30
      	...
      	Oops: Kernel access of bad area, sig: 11 [#1]
      	...
      	NIP [c00000000045c000] .__bitmap_weight+0x60/0xf0
      	LR [c00000000010132c] .build_sched_domains+0xe9c/0x1200
      	PACATMSCRATCH [8000000000029032]
      	Call Trace:
      	[c00000001b1037a0] [c000000000288ff4] .kmem_cache_alloc_node_trace+0x184/0x3a0
      	[c00000001b103850] [c00000000010132c] .build_sched_domains+0xe9c/0x1200
      	[c00000001b1039a0] [c00000000010aad4] .partition_sched_domains+0x484/0x510
      	[c00000001b103aa0] [c00000000016d0a8] .rebuild_sched_domains+0x68/0xa0
      	[c00000001b103b30] [c00000000005cbf0] .topology_work_fn+0x10/0x30
      	...
      
      This was caused by that 'sd->groups == NULL' after building groups, which
      was caused by the empty 'sd->span'.
      
      The cpu's domain contained nothing because the cpu was assigned to a wrong
      node, due to the following unfortunate sequence of events:
      
      1. The hypervisor sent a topology update to the guest OS, to notify changes
         to the cpu-node mapping. However, the update was actually redundant - i.e.,
         the "new" mapping was exactly the same as the old one.
      
      2. Due to this, the 'updated_cpus' mask turned out to be empty after exiting
         the 'for-loop' in arch_update_cpu_topology().
      
      3. So we ended up calling stop-machine() with an empty cpumask list, which made
         stop-machine internally elect cpumask_first(cpu_online_mask), i.e., CPU0 as
         the cpu to run the payload (the update_cpu_topology() function).
      
      4. This causes update_cpu_topology() to be run by CPU0. And since 'updates'
         is kzalloc()'ed inside arch_update_cpu_topology(), update_cpu_topology()
         finds update->cpu as well as update->new_nid to be 0. In other words, we
         end up assigning CPU0 (and eventually its siblings) to node 0, incorrectly.
      
      Along with the following wrong updating, it causes the sched-domain rebuild
      code to break and crash the system.
      
      Fix this by skipping the topology update in cases where we find that
      the topology has not actually changed in reality (ie., spurious updates).
      
      CC: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      CC: Paul Mackerras <paulus@samba.org>
      CC: Nathan Fontenot <nfont@linux.vnet.ibm.com>
      CC: Stephen Rothwell <sfr@canb.auug.org.au>
      CC: Andrew Morton <akpm@linux-foundation.org>
      CC: Robert Jennings <rcj@linux.vnet.ibm.com>
      CC: Jesse Larrew <jlarrew@linux.vnet.ibm.com>
      CC: "Srivatsa S. Bhat" <srivatsa.bhat@linux.vnet.ibm.com>
      CC: Alistair Popple <alistair@popple.id.au>
      Suggested-by: N"Srivatsa S. Bhat" <srivatsa.bhat@linux.vnet.ibm.com>
      Signed-off-by: NMichael Wang <wangyun@linux.vnet.ibm.com>
      Reviewed-by: NSrivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      9a013361
    • T
      powerpc/le: Avoid creatng R_PPC64_TOCSAVE relocations for modules. · d3d35d95
      Tony Breeds 提交于
      When building modules with a native le toolchain the linker will
      generate R_PPC64_TOCSAVE relocations when it's safe to omit saving r2 on
      a plt call.  This isn't helpful in the conext of a kernel module and the
      kernel will fail to load those modules with an error like:
      	nf_conntrack: Unknown ADD relocation: 109
      
      This patch tells the linker to avoid createing R_PPC64_TOCSAVE
      relocations allowing modules to load.
      Signed-off-by: NTony Breeds <tony@bakeyournoodle.com>
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      d3d35d95
    • M
      arch/powerpc: Use RCU_INIT_POINTER(x, NULL) in platforms/cell/spu_syscalls.c · 282efb70
      Monam Agarwal 提交于
      Here rcu_assign_pointer() is ensuring that the
      initialization of a structure is carried out before storing a pointer
      to that structure.
      So, rcu_assign_pointer(p, NULL) can always safely be converted to
      RCU_INIT_POINTER(p, NULL).
      Signed-off-by: NMonam Agarwal <monamagarwal123@gmail.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      282efb70
    • M
      powerpc/opal: Add missing include · bfd25d72
      Michael Neuling 提交于
      next-20140324 currently fails compiling celleb_defconfig with:
      
      arch/powerpc/include/asm/opal.h:894:42: error: 'struct notifier_block' declared inside parameter list [-Werror]
      arch/powerpc/include/asm/opal.h:894:42: error: its scope is only this definition or declaration, which is probably not what you want [-Werror]
      arch/powerpc/include/asm/opal.h:896:14: error: 'struct notifier_block' declared inside parameter list [-Werror]
      
      This is due to a missing include which is added here.
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      bfd25d72
    • J
      powerpc: Convert last uses of __FUNCTION__ to __func__ · aba6f4f2
      Joe Perches 提交于
      Just about all of these have been converted to __func__,
      so convert the last uses.
      Signed-off-by: NJoe Perches <joe@perches.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      aba6f4f2
    • A
      powerpc: Add lq/stq emulation · f83319d7
      Anton Blanchard 提交于
      Recent CPUs support quad word load and store instructions. Add
      support to the alignment handler for them.
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      f83319d7
    • J
      powerpc/powernv: Add invalid OPAL call · e28b05e7
      Joel Stanley 提交于
      This call will not be understood by OPAL, and cause it to add an error
      to it's log. Among other things, this is useful for testing the
      behaviour of the log as it fills up.
      Signed-off-by: NJoel Stanley <joel@jms.id.au>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      e28b05e7
    • J
      powerpc/powernv: Add OPAL message log interface · bfc36894
      Joel Stanley 提交于
      OPAL provides an in-memory circular buffer containing a message log
      populated with various runtime messages produced by the firmware.
      
      Provide a sysfs interface /sys/firmware/opal/msglog for userspace to
      view the messages.
      Signed-off-by: NJoel Stanley <joel@jms.id.au>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      bfc36894
    • M
      powerpc/book3s: Fix mc_recoverable_range buffer overrun issue. · 6e556b47
      Mahesh Salgaonkar 提交于
      Currently we wrongly allocate mc_recoverable_range buffer (to hold
      recoverable ranges) based on size of the property "mcheck-recoverable-ranges".
      This results in allocating less memory to hold available recoverable range
      entries from /proc/device-tree/ibm,opal/mcheck-recoverable-ranges.
      
      This patch fixes this issue by allocating mc_recoverable_range buffer based
      on number of entries of recoverable ranges instead of device property size.
      Without this change we end up allocating less memory and run into memory
      corruption issue.
      Signed-off-by: NMahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      6e556b47
    • M
      powerpc: Remove dead code in sycall entry · fa5c11b7
      Michael Neuling 提交于
      In:
        commit 742415d6
        Author: Michael Neuling <mikey@neuling.org>
        powerpc: Turn syscall handler into macros
      
      We converted the syscall entry code onto macros, but in doing this we
      introduced some cruft that's never run and should never have been added.
      
      This removes that code.
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      fa5c11b7
    • L
      powerpc: Use of_node_init() for the fakenode in msi_bitmap.c · e47ff70a
      Li Zhong 提交于
      This patch uses of_node_init() to initialize the kobject in the fake
      node used in test_of_node(), to avoid following kobject warning.
      
      [    0.897654] kobject: '(null)' (c0000007ca183a08): is not initialized, yet kobject_put() is being called.
      [    0.897682] ------------[ cut here ]------------
      [    0.897688] WARNING: at lib/kobject.c:670
      [    0.897692] Modules linked in:
      [    0.897701] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 3.14.0+ #1
      [    0.897708] task: c0000007ca100000 ti: c0000007ca180000 task.ti: c0000007ca180000
      [    0.897715] NIP: c00000000046a1f0 LR: c00000000046a1ec CTR: 0000000001704660
      [    0.897721] REGS: c0000007ca1835c0 TRAP: 0700   Not tainted  (3.14.0+)
      [    0.897727] MSR: 8000000000029032 <SF,EE,ME,IR,DR,RI>  CR: 28000024  XER: 0000000d
      [    0.897749] CFAR: c0000000008ef4ec SOFTE: 1
      GPR00: c00000000046a1ec c0000007ca183840 c0000000014c59b8 000000000000005c
      GPR04: 0000000000000001 c000000000129770 0000000000000000 0000000000000001
      GPR08: 0000000000000000 0000000000000000 0000000000000000 0000000000003fef
      GPR12: 0000000000000000 c00000000f221200 c00000000000c350 0000000000000000
      GPR16: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
      GPR20: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
      GPR24: 0000000000000000 c00000000144e808 c000000000c56f20 00000000000000d8
      GPR28: c000000000cd5058 0000000000000000 c000000001454ca8 c0000007ca183a08
      [    0.897856] NIP [c00000000046a1f0] .kobject_put+0xa0/0xb0
      [    0.897863] LR [c00000000046a1ec] .kobject_put+0x9c/0xb0
      [    0.897868] Call Trace:
      [    0.897874] [c0000007ca183840] [c00000000046a1ec] .kobject_put+0x9c/0xb0 (unreliable)
      [    0.897885] [c0000007ca1838c0] [c000000000743f9c] .of_node_put+0x2c/0x50
      [    0.897894] [c0000007ca183940] [c000000000c83954] .test_of_node+0x1dc/0x208
      [    0.897902] [c0000007ca183b80] [c000000000c839a4] .msi_bitmap_selftest+0x24/0x38
      [    0.897913] [c0000007ca183bf0] [c00000000000bb34] .do_one_initcall+0x144/0x200
      [    0.897922] [c0000007ca183ce0] [c000000000c748e4] .kernel_init_freeable+0x2b4/0x394
      [    0.897931] [c0000007ca183db0] [c00000000000c374] .kernel_init+0x24/0x130
      [    0.897940] [c0000007ca183e30] [c00000000000a2f4] .ret_from_kernel_thread+0x5c/0x68
      [    0.897947] Instruction dump:
      [    0.897952] 7fe3fb78 38210080 e8010010 ebe1fff8 7c0803a6 4800014c e89f0000 3c62ff6e
      [    0.897971] 7fe5fb78 3863a950 48485279 60000000 <0fe00000> 39000000 393f0038 4bffff80
      [    0.897992] ---[ end trace 1eeffdb9f825a556 ]---
      Signed-off-by: NLi Zhong <zhong@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      e47ff70a
    • A
      powerpc/mm: NUMA pte should be handled via slow path in get_user_pages_fast() · 1dc954bd
      Aneesh Kumar K.V 提交于
      We need to handle numa pte via the slow path
      Signed-off-by: NAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      1dc954bd
    • A
      powerpc/powernv: Fix endian issues with sensor code · 9000c17d
      Anton Blanchard 提交于
      One OPAL call and one device tree property needed byte swapping.
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      9000c17d
  4. 08 4月, 2014 1 次提交