- 19 10月, 2019 4 次提交
-
-
由 Andy Shevchenko 提交于
Convert to use device_get_match_data() instead of open coded variant. While here, switch of_property_read_bool() to device_property_read_bool(). Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20191018105429.82782-4-andriy.shevchenko@linux.intel.comSigned-off-by: NMark Brown <broonie@kernel.org>
-
由 Andy Shevchenko 提交于
This is preparatory patch before converting to use device_get_match_data() API. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20191018105429.82782-3-andriy.shevchenko@linux.intel.comSigned-off-by: NMark Brown <broonie@kernel.org>
-
由 Andy Shevchenko 提交于
Sort the headers in alphabetic order in order to ease the maintenance for this part. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20191018105429.82782-2-andriy.shevchenko@linux.intel.comSigned-off-by: NMark Brown <broonie@kernel.org>
-
由 Andy Shevchenko 提交于
There is no need to keep a pointer to the platform device. Currently there are no users of it directly, and if there will be in the future we may restore it from pointer to the struct device. Convert all users at the same time. Cc: Russell King <linux@armlinux.org.uk> Cc: Jaroslav Kysela <perex@perex.cz> Cc: Takashi Iwai <tiwai@suse.com> Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20191018105429.82782-1-andriy.shevchenko@linux.intel.comSigned-off-by: NMark Brown <broonie@kernel.org>
-
- 02 8月, 2019 1 次提交
-
-
由 Jarkko Nikula 提交于
Intel Tiger Lake -LP LPSS SPI controller is otherwise similar than Cannon Lake but has more controllers and up to two chip selects per controller. Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Link: https://lore.kernel.org/r/20190801134901.12635-1-jarkko.nikula@linux.intel.comSigned-off-by: NMark Brown <broonie@kernel.org>
-
- 22 7月, 2019 1 次提交
-
-
由 Lubomir Rintel 提交于
Don't undo the PM initialization if we error out before we managed to initialize it. The call to pm_runtime_disable() without being preceded by pm_runtime_enable() would disturb the balance of the Force. In practice, this happens if we fail to allocate any of the GPIOS ("cs", "ready") due to -EPROBE_DEFER because we're getting probled before the GPIO driver. Signed-off-by: NLubomir Rintel <lkundrak@v3.sk> Link: https://lore.kernel.org/r/20190719122713.3444318-1-lkundrak@v3.skSigned-off-by: NMark Brown <broonie@kernel.org>
-
- 03 7月, 2019 1 次提交
-
-
由 Jarkko Nikula 提交于
Intel Elkhart Lake has the same LPSS than Intel Broxton. Add support for it. Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Link: https://lore.kernel.org/r/20190703114603.22301-1-jarkko.nikula@linux.intel.comSigned-off-by: NMark Brown <broonie@kernel.org>
-
- 02 7月, 2019 1 次提交
-
-
由 Jarkko Nikula 提交于
It is possible to request a transfer with a speed lower than supported by the HW. This causes silent divider calculation underflow in ssp_get_clk_div() which leads to a frequency higher than requested. Up to maximum speed of the controller. Set the minimum supported transfer speed and let the SPI core to validate no transfers have speed lower than supported. Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 31 5月, 2019 1 次提交
-
-
由 Thomas Gleixner 提交于
Based on 3 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version [author] [kishon] [vijay] [abraham] [i] [kishon]@[ti] [com] this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version [author] [graeme] [gregory] [gg]@[slimlogic] [co] [uk] [author] [kishon] [vijay] [abraham] [i] [kishon]@[ti] [com] [based] [on] [twl6030]_[usb] [c] [author] [hema] [hk] [hemahk]@[ti] [com] this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 1105 file(s). Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Reviewed-by: NAllison Randal <allison@lohutok.net> Reviewed-by: NRichard Fontana <rfontana@redhat.com> Reviewed-by: NKate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.202006027@linutronix.deSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
-
- 02 5月, 2019 3 次提交
-
-
由 Flavio Suligoi 提交于
Calculate the divisor for the SCR (Serial Clock Rate), avoiding that the SSP transmission rate can be greater than the device rate. When the division between the SSP clock and the device rate generates a reminder, we have to increment by one the divisor. In this way the resulting SSP clock will never be greater than the device SPI max frequency. For example, with: - ssp_clk = 50 MHz - dev freq = 15 MHz without this patch the SSP clock will be greater than 15 MHz: - 25 MHz for PXA25x_SSP and CE4100_SSP - 16,56 MHz for the others Instead, with this patch, we have in both case an SSP clock of 12.5MHz, so the max rate of the SPI device clock is respected. Signed-off-by: NFlavio Suligoi <f.suligoi@asem.it> Reviewed-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
由 Evan Green 提交于
Add PCI IDs for SPI on Comet Lake. Signed-off-by: NEvan Green <evgreen@chromium.org> Acked-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
由 Flavio Suligoi 提交于
With dw_dmac, sometimes the request of a DMA channel fails because the DMA driver is not ready, so an explicit dependency request is necessary. Signed-off-by: NFlavio Suligoi <f.suligoi@asem.it> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 08 4月, 2019 1 次提交
-
-
由 Flavio Suligoi 提交于
Change the type of the diagnostic message: "no DMA channels available, using PIO" from debug to warning. The lack of an available DMA channel is very important regard the spi-pxa2xx performance. The transfer speed can be reduced more than 50%. So it is very important to warn the user about this, without enabling the full SPI debug with CONFIG_SPI_DEBUG. Moreover, enabling the full SPI debug only to enable this specific debug message, the dmesg buffer fills quickly with a lot of repetitive information during the SPI data transfer. This cause the loss of all the first important messages written during the initialization. Signed-off-by: NFlavio Suligoi <f.suligoi@asem.it> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 02 4月, 2019 2 次提交
-
-
由 Jarkko Nikula 提交于
Use SPI device pointer in the remaining two error and warning prints in pxa2xx_spi_transfer_one() instead of platform device of the controller It make prints in the function uniform and more useful especially the error print here as it can reveal the driver that has mapped the DMA itself and attempts to transfer more than the maximum supported DMA transfer length. Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
由 Jarkko Nikula 提交于
Pointer to a SPI device is passed to pxa2xx_spi_transfer_one() so there is no need to access it through the current SPI message pointer. Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 21 3月, 2019 3 次提交
-
-
由 Andy Shevchenko 提交于
Intel IOMMU, when enabled, tries to find the domain of the device, assuming it's a PCI one, during DMA operations, such as mapping or unmapping. Since we are splitting the actual PCI device to couple of children via MFD framework (see drivers/mfd/intel-lpss.c for details), the DMA device appears to be a platform one, and thus not an actual one that performs DMA. In a such situation IOMMU can't find or allocate a proper domain for its operations. As a result, all DMA operations are failed. In order to fix this, supply parent of the platform device to the DMA engine framework and fix filter functions accordingly. We may rely on the fact that parent is a real PCI device, because no other configuration is present in the wild. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NMark Brown <broonie@kernel.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> [for tty parts] Signed-off-by: NVinod Koul <vkoul@kernel.org>
-
由 Andy Shevchenko 提交于
It's useful during debug to see what DMA burst size is. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
由 Andy Shevchenko 提交于
Some masters may have different DMA burst size than hard coded default. In such case respect the value given by DMA burst size provided via platform data. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 21 2月, 2019 1 次提交
-
-
由 Andy Shevchenko 提交于
When the commit b6ced294 ("spi: pxa2xx: Switch to SPI core DMA mapping functionality") switches to SPI core provided DMA helpers, it missed to setup maximum supported DMA transfer length for the controller and thus users mistakenly try to send more data than supported with the following warning: ili9341 spi-PRP0001:01: DMA disabled for transfer length 153600 greater than 65536 Setup maximum supported DMA transfer length in order to make users know the limit. Fixes: b6ced294 ("spi: pxa2xx: Switch to SPI core DMA mapping functionality") Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NMark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
-
- 23 1月, 2019 1 次提交
-
-
由 Lubomir Rintel 提交于
It's also a slave controller driver now, calling it "master" is slightly misleading. Signed-off-by: NLubomir Rintel <lkundrak@v3.sk> Acked-by: NRobert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 17 11月, 2018 1 次提交
-
-
由 Lubomir Rintel 提交于
A careless oversight. Sorry. Fixes: 0a897143b7c9 ("spi: pxa2xx: Add slave mode support") Signed-off-by: NLubomir Rintel <lkundrak@v3.sk> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 14 11月, 2018 3 次提交
-
-
由 Lubomir Rintel 提交于
There doesn't seem to be a way to empty TXFIFO on MMP2. The datasheet is super-secret and the method described in Armada 16x manual won't work: "The TXFIFO and RXFIFO are cleared to 0b0 when the SSPx port is reset or disabled (by writing a 0b0 to the <Synchronous Serial Port Enable> field in the SSP Control Register 0)." # devmem 0xd4037008 # read SSSR 0x0000F204 # devmem 0xd4037000 32 0x07 # SSE off in SSCR0 # devmem 0xd4037000 32 0x87 # SSE on # devmem 0xd4037008 0x0000F204 ^ TXFIFO level is still 2. Sigh. The OLPC 1.75 boot firmware leaves two bytes in the TXFIFO. Those are basically throwaway bytes used in response to the messages from the EC. The OLPC kernel copes with this by power-cycling the hardware. Perhaps the firmware should do this instead. Other than that, there's not much we can do other than complain loudly until the garbage gets drained and discard the actual data... For the OLPC EC this will work just fine and pushing more data to TXFIFO would break further transactions. Signed-off-by: NLubomir Rintel <lkundrak@v3.sk> Acked-by: NPavel Machek <pavel@ucw.cz> Signed-off-by: NMark Brown <broonie@kernel.org>
-
由 Lubomir Rintel 提交于
Strobe a GPIO line when the slave TX FIFO is filled. This is how the Embedded Controller on an OLPC XO-1.75 machine, that happens to be a SPI master, learns that it can initiate a transaction. Signed-off-by: NLubomir Rintel <lkundrak@v3.sk> Tested-by: NPavel Machek <pavel@ucw.cz> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NMark Brown <broonie@kernel.org>
-
由 Lubomir Rintel 提交于
Tested on an OLPC XO-1.75 machine, where the Embedded Controller happens to be a SPI master. Signed-off-by: NLubomir Rintel <lkundrak@v3.sk> Acked-by: NPavel Machek <pavel@ucw.cz> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 05 11月, 2018 1 次提交
-
-
由 Jarkko Nikula 提交于
Intel LPSS private register restoring in spi-pxa2xx.c: pxa2xx_spi_resume() was added before there was no any other code restoring them. This was changed after following commits for previous and current LPSS platforms: c78b0830 ("ACPI / LPSS: custom power domain for LPSS") 41a3da2b ("mfd: intel-lpss: Save register context on suspend") However there is one caveat: There is no LPSS private register context save/restore for the Intel Lynxpoint in the Linux kernel code. I did some debugging on one Lynxpoint based device I have and on it the LPSS register context is not lost over suspend/resume cycle (s2idle). Which happens for instance on Intel Braswell. I'm speculating but I guess either firmware does it or the LPSS is kept always on Lynxpoint. Given that we haven't needed to implement Lynxpoint LPSS I2C or UART private register context save/restore over four years time I think we are safe to remove this LPSS private register restoring during resume here. Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 11 10月, 2018 2 次提交
-
-
由 Lubomir Rintel 提交于
The MMP2 platform, that uses device tree, has this controller. Let's add devicetree alongside platform & PCI. Signed-off-by: NLubomir Rintel <lkundrak@v3.sk> Signed-off-by: NMark Brown <broonie@kernel.org>
-
由 Lubomir Rintel 提交于
That seems to be the correct type. Signed-off-by: NLubomir Rintel <lkundrak@v3.sk> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 04 10月, 2018 1 次提交
-
-
由 Gustavo A. R. Silva 提交于
Rewrite switch code block to directly do the expected number of shifts in each case and have break statements. Addresses-Coverity-ID: 1056539 ("Missing break in switch") Suggested-by: NMark Brown <broonie@kernel.org> Signed-off-by: NGustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 18 9月, 2018 1 次提交
-
-
由 Lubomir Rintel 提交于
It makes no sense to remove the device on shutdown. And it break things when the hardware crucial for shutdown (such as the embedded controller) is attached to the SPI bus. Signed-off-by: NLubomir Rintel <lkundrak@v3.sk> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 05 9月, 2018 1 次提交
-
-
由 Geert Uytterhoeven 提交于
spi_controller_{suspend,resume}() already prints an error message on failure, so there is no need to repeat this in individual drivers. Note: spi_master_{suspend,resume}() is an alias for spi_controller_{suspend,resume}(). Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NAlexandre Belloni <alexandre.belloni@bootlin.com> Reviewed-by: NDaniel Mack <daniel@zonque.org> Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 28 6月, 2018 1 次提交
-
-
由 Mika Westerberg 提交于
Intel Ice Lake SPI host controller follows the Intel Cannon Lake but the PCI IDs are different. Add the new PCI IDs to the driver supported devices list. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: NMark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
-
- 04 5月, 2018 1 次提交
-
-
由 Tobias Jordan 提交于
clk_prepare_enable() can fail, so its return value should be checked and acted upon. Found by Linux Driver Verification project (linuxtesting.org). Fixes: 3343b7a6 ("spi/pxa2xx: convert to the common clk framework") Signed-off-by: NTobias Jordan <Tobias.Jordan@elektrobit.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 18 4月, 2018 4 次提交
-
-
由 kbuild test robot 提交于
Fixes: d5898e19 ("spi: pxa2xx: Use core message processing loop") Signed-off-by: NFengguang Wu <fengguang.wu@intel.com> Reviewed-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
由 Jarkko Nikula 提交于
Convert the pump_transfers() transfer tasklet to transfer_one() hook the SPI core calls to process single transfer instead of handling message processing and chip select handling in the driver. This not only simplifies the driver but also brings transfer statistics from the core. Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
由 Jarkko Nikula 提交于
We are going to rename and modify pump_transfers(). Prepare for it by removing the string "pump_transfers:" from error and warning prints. While at it make these user-visible strings single line in sources as it helps source grepping from error reports. Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
由 Jarkko Nikula 提交于
Current DMA engine implementation of pxa2xx_spi_dma_prepare() don't use the dma_burst argument. Remove it since it became unused after commit 6356437e ("spi: spi-pxa2xx: remove legacy PXA DMA bits"). Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 07 3月, 2018 1 次提交
-
-
由 Jarkko Nikula 提交于
Don't leave runtime PM enabled in case devm_spi_register_controller() returns with an error. Otherwise runtime PM will complain when driver is reloaded: [ 693.855811] pxa2xx-spi pxa2xx-spi.13: Unbalanced pm_runtime_enable! Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 12 2月, 2018 2 次提交
-
-
由 Jarkko Nikula 提交于
Convert to generalized SPI controller API introduced by the commit 8caab75f ("spi: Generalize SPI "master" to "controller""). Inside driver variable name "master" is still used to indicate the driver is master only. While at it, change "unsigned cs" to "unsigned int cs" in pxa2xx_spi_fw_translate_cs() to suppress checkpatch warning. Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
由 Jarkko Nikula 提交于
Move SSP idle waiting before CS deassert from error and end of message handling function giveback() to cs_deassert(). This ensures idle waiting is done also if there is CS change between transfers. Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 23 12月, 2017 1 次提交
-
-
由 Mark Brown 提交于
gpiod_free() is an internal function for gpiolib, gpiod_put() is the correct external function. Reported-by: NStephen Rothwell <sfr@canb.auug.org.au> Suggested-by: NRasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: NMark Brown <broonie@kernel.org>
-