1. 11 1月, 2013 1 次提交
  2. 20 12月, 2012 1 次提交
  3. 12 11月, 2012 2 次提交
  4. 08 11月, 2012 1 次提交
  5. 13 7月, 2012 1 次提交
  6. 11 2月, 2012 2 次提交
  7. 27 1月, 2012 1 次提交
    • M
      ARM: S3C6410: Use device names for both I2C clocks · 5d3a2199
      Mark Brown 提交于
      When the S3C64xx CPUs were converted to clkdev mappings were added for the
      I2C controllers on them. On S3C6410 a device name is specified for I2C
      controller 1 but not for controller 0 which makes the code less robust as
      we'll falsely return the clock for controller 0 if there's an error in the
      request for controller 1.
      
      Improve things by registering a device name for controller 0 as well. Due
      to the fact that we change the numbering for controller 0 depending on if
      we've registered controller 1 this requires an ifdef to choose the name.
      Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
      Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
      5d3a2199
  8. 24 12月, 2011 1 次提交
  9. 23 12月, 2011 3 次提交
  10. 04 10月, 2011 1 次提交
    • K
      ARM: SAMSUNG: Consolidate plat/pll.h · 52e329eb
      Kukjin Kim 提交于
      Removed
      - arch/arm/plat-s3c24xx/include/plat/pll.h
      - arch/arm/mach-s3c64xx/include/mach/pll.h
      - arch/arm/plat-s5p/include/plat/pll.h
      - arch/arm/plat-samsung/include/plat/pll6553x.h
      
      And created
      - arch/arm/plat-samsung/include/plat/pll.h
      
      Cc: Ben Dooks <ben-linux@fluff.org>
      [kgene.kim@samsung.com: changed title]
      [kgene.kim@samsung.com: fixed conflicts in plat-s5p/include/pll.h]
      Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
      52e329eb
  11. 19 9月, 2011 1 次提交
  12. 20 7月, 2011 1 次提交
  13. 04 3月, 2011 1 次提交
  14. 04 1月, 2011 1 次提交
  15. 19 11月, 2010 1 次提交
  16. 06 8月, 2010 1 次提交
  17. 05 8月, 2010 2 次提交
  18. 28 5月, 2010 1 次提交
  19. 18 5月, 2010 1 次提交
  20. 14 5月, 2010 3 次提交
  21. 24 2月, 2010 1 次提交
  22. 21 2月, 2010 4 次提交
  23. 18 1月, 2010 1 次提交
  24. 15 1月, 2010 1 次提交
  25. 22 6月, 2009 1 次提交
  26. 07 5月, 2009 2 次提交
  27. 27 2月, 2009 1 次提交
  28. 19 12月, 2008 1 次提交
  29. 16 12月, 2008 1 次提交
    • B
      [ARM] S3C: Update time initialisation to fix S3C64XX time problems · 9d325f23
      Ben Dooks 提交于
      The S3C64XX timer is running at the wrong rate due to the
      assumptions made in the timer initialisation about the way
      the pwm dividers work. This means that time on the S3C64XX
      runs twice as fast as it should.
      
      Fix the problem by moving to using the clk framework to setup
      the pwm timer clock muxes, as the pwm-clock code has all the
      necessary knowledge of how the timer clock inputs are routed.
      Signed-off-by: NBen Dooks <ben-linux@fluff.org>
      9d325f23