- 30 4月, 2013 1 次提交
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由 Javier Martinez Canillas 提交于
The GPMC DT probe function use for_each_node_by_name() to search child device nodes of the GPMC controller. But this function does not use the GPMC device node as the root of the search and instead search across the complete Device Tree. This means that any device node on the DT that is using any of the GPMC child nodes names searched for will be returned even if they are not connected to the GPMC, making the gpmc_probe_xxx_child() function to fail. Fix this by using the GPMC device node as the search root so the search will be restricted to its children. Reported-by: NLars Poeschel <poeschel@lemonage.de> Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NJon Hunter <jon-hunter@ti.com>
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- 04 4月, 2013 8 次提交
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由 Javier Martinez Canillas 提交于
Besides being used to interface with external memory devices, the General-Purpose Memory Controller can be used to connect Pseudo-SRAM devices such as ethernet controllers to OMAP2+ processors using the TI GPMC as a data bus. This patch allows an ethernet chip to be defined as an GPMC child device node. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NJon Hunter <jon-hunter@ti.com>
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由 Javier Martinez Canillas 提交于
The gpmc_probe_nor_child() function is used in the GPMC driver to configure the GPMC for a NOR child device node. But this function is quite generic and all the NOR specific configuration is made by the driver of the actual NOR flash memory used. Other Pseudo-SRAM devices such as ethernet controllers need a similar setup so by making this function generic it can be used for those too. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NJon Hunter <jon-hunter@ti.com>
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由 Javier Martinez Canillas 提交于
gpmc_probe_nor_child() calls of_platform_device_create() to create a platform device for the NOR child. If this function fails the value of ret is returned to the caller but this value is zero since it was assigned the return of a previous call to gpmc_cs_program_settings() that had to succeed or otherwise gpmc_probe_nor_child() would have returned before. This means that if of_platform_device_create() fails, 0 will be returned to the caller instead of an appropriate error code. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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由 Jon Hunter 提交于
When the GPMC driver is probed, we call gpmc_mem_init() to see which chip-selects have already been configured and enabled by the boot-loader and allocate space for them. If we fail to allocate space for one chip-select, then we return failure from the probe and the GPMC driver will not be available. Rather than render the GPMC useless for all GPMC devices, if we fail to allocate space for one chip-select print a warning and disable the chip-select. This way other GPMC clients can still be used. There is no downside to this approach, because all GPMC clients need to request a chip-select before they can use the GPMC and on requesting a chip-select, if memory has not already been reserved for the chip-select then it will be. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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由 Jon Hunter 提交于
With commit 21cc2bda (ARM: OMAP2+: Remove apollon board support) the variable "boot_rom_space" is now not needed and the code surrounding this variable can be cleaned up and simplified. Remove unnecessary definitions and clean-up the comment as well. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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由 Jon Hunter 提交于
Each GPMC chip-select can be configured to map 16MB, 32MB, 64MB or 128MB of address space. The physical base address where a chip-select starts is also configurable and must be aligned on a boundary that is equal to or greater than the size of the address space mapped bt the chip-select. When enabling a GPMC chip-select, ensure that the base address is aligned to the appropriate boundary. Reported-by: NMark Jackson <mpfj-list@mimc.co.uk> Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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由 Jon Hunter 提交于
NOR flash is not currently supported when booting with device-tree on OMAP2+ devices. Add support to detect and configure NOR devices when booting with device-tree. Add documentation for the TI GPMC NOR binding. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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由 Jon Hunter 提交于
Some of the GPMC timings parameters are currently missing from the GPMC device-tree binding. Add these parameters to the binding documentation as well as code to read them. Also add either "-ps" or "-ns" suffix to the GPMC timing properties to indicate whether the timing is in picoseconds or nanoseconds. The existing code in gpmc_read_timings_dt() is checking the value of of_property_read_u32() and only is successful storing the value read in the gpmc_timings structure. Checking the return value in this case is not necessary and we can simply read the value, if present, and store directly in the gpmc_timings structure. Therefore, simplify the code by removing these checks. The comment in the gpmc_read_timings_dt() function, "only for OMAP3430" is also incorrect as it is applicable to all OMAP3+ devices. So correct this too. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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- 02 4月, 2013 10 次提交
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由 Jon Hunter 提交于
Adds a function to read the various GPMC chip-select settings from device-tree and store them in the gpmc_settings structure. Update the GPMC device-tree binding documentation to describe these options. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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由 Jon Hunter 提交于
With the addition of the gpmc_cs_program_settings(), we no longer need or use gpmc_cs_configure() to configure some of the GPMC chip-select options. So rename the function to gpmc_configure() and remove code that modifies options in the CONFIG1 register. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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由 Jon Hunter 提交于
The GPMC has various different configuration options such as bus-width, synchronous or asychronous mode selection, burst mode options etc. Currently, there is no common function for configuring these options and various devices set these options by either programming the GPMC CONFIG1 register directly or by calling gpmc_cs_configure() to set some of the options. Add a new function for configuring all of the GPMC options. Having a common function for configuring this options will simplify code and ease the migration to device-tree. Also add a new capability flag to detect devices that support the address-address-data multiplexing mode. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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由 Jon Hunter 提交于
The GPMC has various different configuration options such as bus-width, synchronous or asychronous mode selection, burst mode options etc. Currently, there is no central structure for storing all these options when configuring the GPMC for a given device. Some of the options are stored in the GPMC timing structure and some are directly programmed into the GPMC configuration register. Add a new structure to store these options and convert code to use this structure. Adding this structure will allow us to create a common function for configuring these options. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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由 Jon Hunter 提交于
The GPMC has wait-pin signals that can be assigned to a chip-select to monitor the ready signal of an external device. Add a variable to indicate the total number of wait-pins for a given device. This will allow us to detect if the wait-pin being selected is valid or not. When booting with device-tree read the number of wait-pins from the device-tree blob. When device-tree is not used set the number of wait-pins to 4 which is valid for OMAP2-5 devices. Newer devices that have less wait-pins (such as AM335x) only support booting with device-tree and so hard-coding the wait-pin number when not using device-tree is fine. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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由 Ezequiel Garcia 提交于
This check is done before the call to gpmc_cs_reserved() and gpmc_cs_set_reserved() and it's redundant to do it again in each function. This simplifies the code a bit. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Reviewed-by: NJon Hunter <jon-hunter@ti.com> Signed-off-by: NJon Hunter <jon-hunter@ti.com>
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由 Ezequiel Garcia 提交于
Currently gpmc_cs_reserved() return value is somewhat inconsistent, returning a negative value on an error condition, a positive value if the chip select is reserved and zero if it's available. Fix this by returning a boolean value as the function name suggests: * true if the chip select is reserved, * false if it's available Suggested-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Reviewed-by: NJon Hunter <jon-hunter@ti.com> Signed-off-by: NJon Hunter <jon-hunter@ti.com>
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由 Ezequiel Garcia 提交于
This function is not used anywhere, so it's safe to remove it. This means less code to maintain. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Reviewed-by: NJon Hunter <jon-hunter@ti.com> Signed-off-by: NJon Hunter <jon-hunter@ti.com>
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由 Ezequiel Garcia 提交于
This patch marks a bunch of functions that are local to gpmc.c file only as static. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Reviewed-by: NJon Hunter <jon-hunter@ti.com> Signed-off-by: NJon Hunter <jon-hunter@ti.com>
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由 Mark Jackson 提交于
When setting the GPMC device type, make sure any previous bits are cleared down, before applying the new setting. For OMAP4+ devices MUXADDDATA is a 2-bit field (bits 9:8) where as for OMAP2/3 devices it was only a one bit field (bit 9). For OMAP2/3 devices bit 8 is reserved and the OMAP documentation says to write a 0 to this bit. So clearing bit 8 on OMAP2/3 devices should not be a problem. Hence update the code to handle both bits 8 and 9 for all devices. Signed-off-by: NMark Jackson <mpfj@newflow.co.uk> [jon-hunter@ti.com: updated changelog] Signed-off-by: NJon Hunter <jon-hunter@ti.com>
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- 14 3月, 2013 1 次提交
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由 Russell King 提交于
Consistently check errors using the usual method used in the kernel for much of its history. For instance: int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t) { int div; div = gpmc_calc_divider(t->sync_clk); if (div < 0) return div; static int gpmc_set_async_mode(int cs, struct gpmc_timings *t) { ... return gpmc_cs_set_timings(cs, t); ..... ret = gpmc_set_async_mode(gpmc_onenand_data->cs, &t); if (IS_ERR_VALUE(ret)) return ret; So, gpmc_cs_set_timings() thinks any negative return value is an error, but where we check that in higher levels, only a limited range are errors... There is only _one_ use of IS_ERR_VALUE() in arch/arm which is really appropriate, and that is in arch/arm/include/asm/syscall.h: static inline long syscall_get_error(struct task_struct *task, struct pt_regs *regs) { unsigned long error = regs->ARM_r0; return IS_ERR_VALUE(error) ? error : 0; } because this function really does have to differentiate between error return values and addresses which look like negative numbers (eg, from mmap()). So, here's a patch to remove them from OMAP, except for the above. Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 05 3月, 2013 1 次提交
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由 Jon Hunter 提交于
Commit 6797b4fe (ARM: OMAP2+: Prevent potential crash if GPMC probe fails) added code to ensure that GPMC chip-selects could not be requested until the device probe was successful. The chip-selects should have been unreserved at the end of the probe function, but the code to unreserve them appears to have ended up in the gpmc_calc_timings() function and hence, this is causing problems requesting chip-selects. Fix this merge error by unreserving the chip-selects at the end of the probe, but before we call the gpmc child probe functions (for device-tree) which request a chip-select. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NPhilip Avinash <avinashphilip@ti.com> Tested-by: NGrazvydas Ignotas <notasas@gmail.com> [tony@atomide.com: updated description to add breaking commit id] Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 02 2月, 2013 4 次提交
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由 Ezequiel Garcia 提交于
This patch adds device tree bindings for OMAP OneNAND devices. Tested on an OMAP3 3430 IGEPv2 board. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Jon Hunter 提交于
If the GPMC probe fails, devices that use the GPMC (such as ethernet chips, flash memories, etc) can still allocate a GPMC chip-select and register the device. On the OMAP2420 H4 board, this was causing the kernel to crash after the gpmc probe failed and the board attempted to start networking. Prevent this by marking all the chip-selects as reserved by default and only make them available for devices to request if the GPMC probe succeeds. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Ezequiel Garcia 提交于
for_each_node_by_name() automatically calls of_node_put() on each node passed; so don't do it explicitly unless there's an error. Reported-by: NMark Rutland <mark.rutland@arm.com> Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: NJon Hunter <jon-hunter@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Kyungmin Park 提交于
As apollon board doesn't used anymore, remove it. Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> [tony@atomide.com: dropped uncompress.h changes, it's gone] Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 26 1月, 2013 2 次提交
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由 Paul Walmsley 提交于
Remove now-obsolete code from arch/arm/mach-omap2/omap_device.c. This mostly consists of removing the first attempt at device PM latency handling. This was never really used, has been replaced by the common dev_pm_qos code, and needs to go away as part of the DT conversion. Also, the early platform_device creation code has been removed, as it appears to be unused. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
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由 Thierry Reding 提交于
Convert all uses of devm_request_and_ioremap() to the newly introduced devm_ioremap_resource() which provides more consistent error handling. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 16 1月, 2013 1 次提交
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由 Daniel Mack 提交于
This patch adds basic DT bindings for OMAP GPMC. The actual peripherals are instantiated from child nodes within the GPMC node, and the only type of device that is currently supported is NAND. Code was added to parse the generic GPMC timing parameters and some documentation with examples on how to use them. Successfully tested on an AM33xx board. Signed-off-by: NDaniel Mack <zonque@gmail.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> [tony@atomide.com: updated to apply] Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 15 1月, 2013 1 次提交
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由 Daniel Mack 提交于
On DT driven boards, the gpmc node will match the driver. Hence, there's no need to do that unconditionally from the initcall. Signed-off-by: NDaniel Mack <zonque@gmail.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 12 1月, 2013 1 次提交
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由 Tony Lindgren 提交于
This way the initcalls don't run on other SoCs on multiplatform kernels. Otherwise we'll get something like this when booting on vexpress: omap_hwmod: _ensure_mpu_hwmod_is_setup: MPU initiator hwmod mpu not yet registered ... WARNING: at arch/arm/mach-omap2/pm.c:82 _init_omap_device+0x74/0x94() _init_omap_device: could not find omap_hwmod for mpu ... omap-dma-engine omap-dma-engine: OMAP DMA engine driver ... Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 04 1月, 2013 1 次提交
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由 Greg Kroah-Hartman 提交于
CONFIG_HOTPLUG is going away as an option. As a result, the __dev* markings need to be removed. This change removes the use of __devinit, __devexit_p, __devinitdata, and __devexit from these drivers. Based on patches originally written by Bill Pemberton, but redone by me in order to handle some of the coding style issues better, by hand. Cc: Bill Pemberton <wfp5p@virginia.edu> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 09 11月, 2012 2 次提交
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由 Afzal Mohammed 提交于
Presently there are three peripherals that gets it timing by runtime calculation. Those peripherals can work with frequency scaling that affects gpmc clock. But timing calculation for them are in different ways. Here a generic runtime calculation method is proposed. Input to this function were selected so that they represent timing variables that are present in peripheral datasheets. Motive behind this was to achieve DT bindings for the inputs as is. Even though a few of the tusb6010 timings could not be made directly related to timings normally found on peripherals, expressions used were translated to those that could be justified. There are possibilities of improving the calculations, like calculating timing for read & write operations in a more similar way. Expressions derived here were tested for async onenand on omap3evm (as vanilla Kernel does not have omap3evm onenand support, local patch was used). Other peripherals, tusb6010, smc91x calculations were validated by simulating on omap3evm. Regarding "we_on" for onenand async, it was found that even for muxed address/data, it need not be greater than "adv_wr_off", but rather could be derived from write setup time for peripheral from start of access time, hence would more be in line with peripheral timings. With this method it was working fine. If it is required in some cases to have "we_on" same as "wr_data_mux_bus" (i.e. greater than "adv_wr_off"), another variable could be added to indicate it. But such a requirement is not expected though. It has been observed that "adv_rd_off" & "adv_wr_off" are currently calculated by adding an offset over "oe_on" and "we_on" respectively in the case of smc91x. But peripheral datasheet does not specify so and so "adv_rd(wr)_off" has been derived (to be specific, made ignorant of "oe_on" and "we_on") observing datasheet rather than adding an offset. Hence this generic routine is expected to work for smc91x (91C96 RX51 board). This was verified on smsc911x (9220 on OMAP3EVM) - a similar ethernet controller. Timings are calculated in ps to prevent rounding errors and converted to ns at final stage so that these values can be directly fed to gpmc_cs_set_timings(). gpmc_cs_set_timings() would be modified to take ps once all custom timing routines are replaced by the generic routine, at the same time generic timing routine would be modified to provide timings in ps. struct gpmc_timings field types are upgraded from u16 => u32 so that it can hold ps values. Whole of this exercise is being done to achieve driver and DT conversion. If timings could not be calculated in a peripheral agnostic way, either gpmc driver would have to be peripheral gnostic or a wrapper arrangement over gpmc driver would be required. Signed-off-by: NAfzal Mohammed <afzal@ti.com>
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由 Afzal Mohammed 提交于
Configure busturnaround, cycle2cycledelay, waitmonitoringtime, clkactivationtime in gpmc_cs_set_timings(). This is done so that boards can configure these parameters of gpmc in Kernel instead of relying on bootloader. Also configure bool type timings like extradelay. This needed change to the existing users that were configuring clk activation time and extra delay by directly writing to registers. Thanks to Tony for making me aware of users of clk activation and being kind enough to test the modified one. Signed-off-by: NAfzal Mohammed <afzal@ti.com>
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- 19 10月, 2012 1 次提交
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由 Tony Lindgren 提交于
We want to remove plat/cpu.h. To do this, let's first split it to private soc.h to mach-omap1 and mach-omap2. We have to keep plat/cpu.h around until the remaining drivers are fixed, so let's include the local soc.h in plat/cpu.h and for drivers still including plat/cpu.h. Once the drivers are fixed not to include plat/cpu.h, we can remove the file. This is needed for the ARM common zImage support. [tony@atomide.com: updated to not print a warning] Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 18 10月, 2012 3 次提交
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由 Tony Lindgren 提交于
Let's make omap_device local to mach-omap2 for ARM common zImage support. Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Paul Walmsley 提交于
Remove arch/arm/plat-omap/include/plat/sdrc.h by folding its contents into arch/arm/mach-omap2/sdrc.h. The objective is to assist Tony in cleaning out arch/arm/plat-omap/, as his upstreams request. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Tony Lindgren <tony@atomide.com> [tony@atomide.com: updated to remove rotate macros] Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Jon Hunter 提交于
Currently, if the GPMC driver fails to reserve memory when probed we will call BUG() and the kernel will not boot. Instead of calling BUG(), return an error from probe and allow kernel to boot. Boot tested on AM335x beagle bone board and OMAP4430 Panda board. V2 changes: - Ensure that clock and memory resources are released on error. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 15 10月, 2012 3 次提交
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由 Afzal Mohammed 提交于
Requirement of gpmc header outside of mach-omap2 has been cutoff, move gpmc header file in plat-omap folder to local mach-omap2 folder Objective - common zImage participation of omap Signed-off-by: NAfzal Mohammed <afzal@ti.com>
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由 Afzal Mohammed 提交于
nand driver handles gpmc-nand block fully, hence no more users for these exported nand functions, remove it. Signed-off-by: NAfzal Mohammed <afzal@ti.com>
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由 Afzal Mohammed 提交于
Update helper function that provides gpmc-nand register details for nand driver with bch register information. Using this nand driver can be made self sufficient to handle remaining gpmc-nand operations by itself instead of relying on gpmc exported nand functions. Signed-off-by: NAfzal Mohammed <afzal@ti.com>
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