- 07 7月, 2011 1 次提交
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由 Fabio Estevam 提交于
MX53_PAD_PATA_DATA6 can have the following alternate modes: PATA_DATA_6: mode 0 GPIO2_6: mode 1 EMI_NANDF_D_6: mode 3 ESDHC4_DAT6 mode 4 GPU3d_GPU_DEBUG_OUT_6 mode 5 IPU_DIAG_BUS_6 mode 6 Fix the modes accordingly. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NDinh Nguyen <dinh.nguyen@freescale.com> Acked-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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- 06 6月, 2011 1 次提交
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由 Fabio Estevam 提交于
Check the MX51 chip revision in run-time so that the correct SDMA firmware can be loaded. While at it also remove the silicon revision from the sdma_script_start_addrs structure name for MX51. All the MX51 revisions share the same SDMA start addresses. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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- 24 5月, 2011 2 次提交
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由 Russell King 提交于
Convert SP804, MXC, Nomadik and Orion 32-bit down-counting clocksources to generic mmio clocksource infrastructure. Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Alessandro Rubini <rubini@unipv.it> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Cc: Lennert Buytenhek <kernel@wantstofly.org> Acked-by: NNicolas Pitre <nico@fluxnic.net> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Convert ixp4xx, lpc32xx, mxc, netx, pxa, sa1100, tcc8k, tegra and u300 to use the generic mmio clocksource recently introduced. Cc: Imre Kaloz <kaloz@openwrt.org> Cc: Krzysztof Halasa <khc@pm.waw.pl> Acked-by: NEric Miao <eric.y.miao@gmail.com> Acked-by: N"Hans J. Koch" <hjk@hansjkoch.de> Acked-by: NColin Cross <ccross@android.com> Cc: Erik Gilling <konkers@android.com> Cc: Olof Johansson <olof@lixom.net> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 19 5月, 2011 13 次提交
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由 Uwe Kleine-König 提交于
Fixing a few "please, no space before tabs" and "empty line at end of file" warnings on the way. LAKML-Reference: 1299271882-2130-6-git-send-email-u.kleine-koenig@pengutronix.de Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Uwe Kleine-König 提交于
LAKML-Reference: 1302464943-20721-6-git-send-email-u.kleine-koenig@pengutronix.de Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Uwe Kleine-König 提交于
To be able to compile e.g. i.MX31 and i.MX51 in a single kernel image the ioremap quirk needs a runtime check. While touching this code make the comment more understandable by adding a sentence from the commit log that introduced it (eadefeff ([ARM] MX3: Use ioremap wrapper to map SoC devices nonshared)). As mach/io.h now uses cpu_is_ some header reshuffling in mach/hardware.h was necessary. (mach/mx27.h and mach/mx31.h #include <linux/io.h> which #includes <mach/io.h>. So mach/mxc.h which provides the cpu_is_ macros needs to be included before mach/mx27.h and mach/mx31.h.) LAKML-Reference: 1302464943-20721-5-git-send-email-u.kleine-koenig@pengutronix.de Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Uwe Kleine-König 提交于
The two SoCs have different PHYS_OFFSETs so it's not (yet) possible to compile a single (working) kernel for these. LAKML-Reference: 1302464943-20721-4-git-send-email-u.kleine-koenig@pengutronix.de Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Uwe Kleine-König 提交于
The symbols in this choice should only be used to select between the available machines that can be built into a single kernel. As these sets (will) differ e.g. depending on ARM_PATCH_PHYS_VIRT and AUTO_ZRELADDR letting them select other symbols makes the logic more complex and needs to duplicate some things. So let the machines select the corresponding symbols (indirectly via SOC_XYZ). LAKML-Reference: 1302464943-20721-2-git-send-email-u.kleine-koenig@pengutronix.de Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Uwe Kleine-König 提交于
Since support for mxc91231 was introduced 2009 it only saw patches that were part of (mxc or arm) global cleanups. The only supported machine only had 4 devices (2x UART, sdhc, watchdog). Cc: Dmitriy Taychenachev <dimichxp@gmail.com> LAKML-Reference: 1302211482-17926-1-git-send-email-u.kleine-koenig@pengutronix.de Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Sascha Hauer 提交于
remove usage of CONFIG_ARCH_MX1. It's mostly unused anyway, replace it with cpu_is_mx1() where necessary. Also, depend on IMX_HAVE_PLATFORM_IMX_FB instead of the architectures directly. LAKML-Reference: 20110303141244.GQ29521@pengutronix.de Acked-by: NPaul Mundt <lethal@linux-sh.org> Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Uwe Kleine-König 提交于
The platform id is used to determine the spi bus number, so it should better be different to the ids used for imx51-ecspi. Otherwise it's not possible to use both devices "imx51-cspi.0" and "imx51-ecspi.0". Alternative approaches are to use dynamic bus numbering as offered by the spi framework or let the machine code set the bus number. The downside of both possibilities is that the bus number isn't fixed for the same busses on different machines using i.MX51. LAKML-Reference: 1302100716-21034-1-git-send-email-u.kleine-koenig@pengutronix.de Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Uwe Kleine-König 提交于
... together with the related devices "mx3_camera" and "mx3_sdc_fb". "mx3_camera" doesn't fit the scheme of the other devices that just are allocated and registered in a single function because it needs additional care to get some dmaable memory. So currently imx31_alloc_mx3_camera duplicates most of imx_add_platform_device_dmamask, but I'm not sure it's worth to split the latter to be able to reuse more code. This gets rid of mach-mx3/devices.[ch] and so several files need to be adapted not to #include devices.h anymore. LAKML-Reference: 1299271882-2130-5-git-send-email-u.kleine-koenig@pengutronix.de Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Uwe Kleine-König 提交于
LAKML-Reference: 1299271882-2130-2-git-send-email-u.kleine-koenig@pengutronix.de Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Baruch Siach 提交于
Signed-off-by: NBaruch Siach <baruch@tkos.co.il> LAKML-Reference: cae1d71db47204ee2654eca7391cb656ed53566b.1300095569.git.baruch@tkos.co.il Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Wolfram Sang 提交于
Reported-by: NIgor Trevisan <igt1972@gmail.com> Signed-off-by: NWolfram Sang <w.sang@pengutronix.de> LAKML-Reference: 1299786904-5494-1-git-send-email-w.sang@pengutronix.de Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Fabio Estevam 提交于
Having the silicon revision to appear on the boot log is a useful information. MX31, MX35 and MX51 already show the silicon revision on boot. Add support for displaying such information for MX53 as well. Tested on a mx53loco board, where it shows: CPU identified as i.MX53, silicon rev 2.0 Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> LAKML-Reference: 1301068367-18937-1-git-send-email-fabio.estevam@freescale.com Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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- 07 5月, 2011 1 次提交
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由 Nicolas Pitre 提交于
To be able to relocate the .bss section at run time independently from the rest of the code, we must make sure that no GOTOFF relocations are used with .bss symbols. This usually means that no global variables can be marked static unless they're also const. Let's remove the static qualifier from current offenders, or turn them into const variables when possible. Next commit will ensure the build fails if one of those is reintroduced due to otherwise enforced coding standards for the kernel. Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org> Tested-by: NTony Lindgren <tony@atomide.com>
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- 26 4月, 2011 1 次提交
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由 Joe Perches 提交于
Using C line continuation inside format strings is error prone. Clean up the unintended whitespace introduced by misuse of \. Neaten correctly used line continations as well for consistency. drivers/scsi/arcmsr/arcmsr_hba.c has these errors as well, but arcmsr needs a lot more work and the driver should likely be moved to staging instead. Signed-off-by: NJoe Perches <joe@perches.com> Acked-by: NRandy Dunlap <randy.dunlap@oracle.com> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 12 4月, 2011 2 次提交
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由 Thomas Gleixner 提交于
The irq_set_wake() function of the gpio irq_chip calls enable/disable_irq_wake() on the demultiplex interrupt. That leads to a lockdep warning "INFO: possible recursive locking detected" because irq_set_type() is called under irq_desc->lock and the *_irq_wake() calls take irq_desc->lock of the demux interrupt. Tell lockdep that the gpio irqs are in a different lock class. Documentation/SubmitChecklist: 15: All codepaths have been exercised with all lockdep features enabled. That's a non-optional requirement, AFAICT. Reported-and-tested-by: NArnaud Patard <arnaud.patard@rtp-net.org> Signed-off-by: NThomas Gleixner <tglx@linutronix.de> LAKML-Reference: alpine.LFD.2.00.1104041416290.19945@localhost6.localdomain6 Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Dave Martin 提交于
Directives such as .long and .word do not magically cause the assembler location counter to become aligned in gas. As a result, using these directives in code sections can result in misaligned data words when building a Thumb-2 kernel (CONFIG_THUMB2_KERNEL). This is a Bad Thing, since the ABI permits the compiler to assume that fundamental types of word size or above are word- aligned when accessing them from C. If the data is not really word-aligned, this can cause impaired performance and stray alignment faults in some circumstances. In general, the following rules should be applied when using data word declaration directives inside code sections: * .quad and .double: .align 3 * .long, .word, .single, .float: .align (or .align 2) * .short: No explicit alignment required, since Thumb-2 instructions are always 2 or 4 bytes in size. immediately after an instruction. Signed-off-by: NDave Martin <dave.martin@linaro.org> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> LAKML-Reference: 1289913217-8672-1-git-send-email-dave.martin@linaro.org Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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- 31 3月, 2011 1 次提交
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由 Lucas De Marchi 提交于
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: NLucas De Marchi <lucas.demarchi@profusion.mobi>
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- 29 3月, 2011 3 次提交
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由 Thomas Gleixner 提交于
Use irq_set_chip_and_handler() instead. Converted with coccinelle. Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Thomas Gleixner 提交于
Convert to the new function names. Automated with coccinelle. Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Thomas Gleixner 提交于
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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- 25 3月, 2011 1 次提交
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由 Julien Boibessot 提交于
Signed-off-by: NJulien Boibessot <julien.boibessot@armadeus.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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- 23 3月, 2011 7 次提交
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由 Dinh Nguyen 提交于
Implement code for MX51 that allows the SoC to enter WFI when arch_idle is called. This patch is also necessary for correctly suspending the system. Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Dinh Nguyen 提交于
For MX50, the HW_ADADIG_DIGPROG register in the ANATOP module will have the correct silicon revision: Major Minor Description 0x50 0x0 TO1.0 0x50 0x1 TO1.1 Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Shawn Guo 提交于
Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NWolfram Sang <w.sang@pengutronix.de> Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Julien Boibessot 提交于
Signed-off-by: NJulien Boibessot <julien.boibessot@armadeus.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Jan Weitzel 提交于
Add sched_clock using cyc_to_sched_clock and update_sched_clock with HAVE_SCHED_CLOCK tested on iMX27 and iMX35 Signed-off-by: NJan Weitzel <j.weitzel@phytec.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Jan Weitzel 提交于
this is needed to use get_cycles with sched_clock. Accessing timer without enabled clk will result in crash Signed-off-by: NJan Weitzel <j.weitzel@phytec.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Fabio Estevam 提交于
Having the silicon revision to appear on the boot log is a useful information. MX31 and MX35 already show the silicon revision on boot. Add support for displaying such information for MX51 as well. Tested on a MX51EVK, where it shows: CPU identified as i.MX51, silicon rev 3.0 Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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- 18 3月, 2011 2 次提交
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由 Wolfram Sang 提交于
Signed-off-by: NWolfram Sang <w.sang@pengutronix.de> Tested-by: NMarc Reilly <marc@cpdesign.com.au> Tested-by: NEric Benard <eric@eukrea.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Wolfram Sang 提交于
Signed-off-by: NWolfram Sang <w.sang@pengutronix.de> Tested-by: NMarc Reilly <marc@cpdesign.com.au> Tested-by: NEric Benard <eric@eukrea.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 10 3月, 2011 1 次提交
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由 Richard Zhu 提交于
Some cards have the CRC errors in read on mx51 BBG board. Configure the eSDHC pad configurations to level up the compatibility to fix this issue. Signed-off-by: NRichard Zhu <Hong-Xing.Zhu@freescale.com> Tested-by: NShawn Guo <shawn.guo@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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- 08 3月, 2011 4 次提交
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由 Uwe Kleine-König 提交于
This fixes: arch/arm/kernel/built-in.o: In function `__irq_svc': io.c:(.text+0x2e0): undefined reference to `avic_base' arch/arm/kernel/built-in.o: In function `__irq_usr': io.c:(.text+0x4c8): undefined reference to `avic_base' arch/arm/mach-mxc91231/built-in.o: In function `mxc91231_init_irq': magx-zn5.c:(.init.text+0x18): undefined reference to `mxc_init_irq' and was broken by c7259df3 (ARM i.MX irq: Compile avic irq code only on SoCs that need it) Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Richard Zhao 提交于
Move to SOC_SOC_IMX3X. Leave ARCH_MX31/35 definitions there, in case some place prevent multi-soc single image. Signed-off-by: NRichard Zhao <richard.zhao@freescale.com> Acked-by: NMarc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Richard Zhao 提交于
Move to SOC_SOC_IMX5X. Leave only places which prevent multi-soc using ARCH_MX5X. Signed-off-by: NRichard Zhao <richard.zhao@freescale.com> Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Sascha Hauer 提交于
The boards are currently using otg_ulpi_create and mxc_ulpi_access_ops, both are only present if CONFIG_USB_ULPI is set. To remove the need of ifdefs in the board code introduce a imx_otg_ulpi_create functions which expands to a static inline function if compiled without ulpi. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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