- 03 6月, 2021 5 次提交
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由 Yu Chen 提交于
stable inclusion from stable-5.10.36 commit fce7bbcd07d59ac30dba8ce225316b3b4c1c7b50 bugzilla: 51867 CVE: NA -------------------------------- commit f88359e1 upstream. From: John Stultz <john.stultz@linaro.org> According to the programming guide, to switch mode for DRD controller, the driver needs to do the following. To switch from device to host: 1. Reset controller with GCTL.CoreSoftReset 2. Set GCTL.PrtCapDir(host mode) 3. Reset the host with USBCMD.HCRESET 4. Then follow up with the initializing host registers sequence To switch from host to device: 1. Reset controller with GCTL.CoreSoftReset 2. Set GCTL.PrtCapDir(device mode) 3. Reset the device with DCTL.CSftRst 4. Then follow up with the initializing registers sequence Currently we're missing step 1) to do GCTL.CoreSoftReset and step 3) of switching from host to device. John Stult reported a lockup issue seen with HiKey960 platform without these steps[1]. Similar issue is observed with Ferry's testing platform[2]. So, apply the required steps along with some fixes to Yu Chen's and John Stultz's version. The main fixes to their versions are the missing wait for clocks synchronization before clearing GCTL.CoreSoftReset and only apply DCTL.CSftRst when switching from host to device. [1] https://lore.kernel.org/linux-usb/20210108015115.27920-1-john.stultz@linaro.org/ [2] https://lore.kernel.org/linux-usb/0ba7a6ba-e6a7-9cd4-0695-64fc927e01f1@gmail.com/ Fixes: 41ce1456 ("usb: dwc3: core: make dwc3_set_mode() work properly") Cc: Andy Shevchenko <andy.shevchenko@gmail.com> Cc: Ferry Toth <fntoth@gmail.com> Cc: Wesley Cheng <wcheng@codeaurora.org> Cc: <stable@vger.kernel.org> Tested-by: NJohn Stultz <john.stultz@linaro.org> Tested-by: NWesley Cheng <wcheng@codeaurora.org> Signed-off-by: NYu Chen <chenyu56@huawei.com> Signed-off-by: NJohn Stultz <john.stultz@linaro.org> Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Link: https://lore.kernel.org/r/374440f8dcd4f06c02c2caf4b1efde86774e02d9.1618521663.git.Thinh.Nguyen@synopsys.comSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NChen Jun <chenjun102@huawei.com> Acked-by: NWeilong Chen <chenweilong@huawei.com> Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
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由 Thinh Nguyen 提交于
stable inclusion from stable-5.10.36 commit b624b32584ac44f4f7e0c53878b22da7cea6f2e4 bugzilla: 51867 CVE: NA -------------------------------- commit c560e763 upstream. The START_TRANSFER command needs to be executed while in ON/U0 link state (with an exception during register initialization). Don't use dwc->link_state to check this since the driver only tracks the link state when the link state change interrupt is enabled. Check the link state from DSTS register instead. Note that often the host already brings the device out of low power before it sends/requests the next transfer. So, the user won't see any issue when the device starts transfer then. This issue is more noticeable in cases when the device delays starting transfer, which can happen during delayed control status after the host put the device in low power. Fixes: 799e9dc8 ("usb: dwc3: gadget: conditionally disable Link State change events") Cc: <stable@vger.kernel.org> Acked-by: NFelipe Balbi <balbi@kernel.org> Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Link: https://lore.kernel.org/r/bcefaa9ecbc3e1936858c0baa14de6612960e909.1618884221.git.Thinh.Nguyen@synopsys.comSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NChen Jun <chenjun102@huawei.com> Acked-by: NWeilong Chen <chenweilong@huawei.com> Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
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由 Thinh Nguyen 提交于
stable inclusion from stable-5.10.36 commit f9ddfaa9703c5c0efff8b828bb45a0612d5bf466 bugzilla: 51867 CVE: NA -------------------------------- commit 3232a3ce upstream. The programming guide incorrectly stated that the DCFG.bInterval_m1 must be set to 0 when operating in fullspeed. There's no such limitation for all IPs. See DWC_usb3x programming guide section 3.2.2.1. Fixes: a1679af8 ("usb: dwc3: gadget: Fix setting of DEPCFG.bInterval_m1") Cc: <stable@vger.kernel.org> Acked-by: NFelipe Balbi <balbi@kernel.org> Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Link: https://lore.kernel.org/r/5d4139ae89d810eb0a2d8577fb096fc88e87bfab.1618472454.git.Thinh.Nguyen@synopsys.comSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NChen Jun <chenjun102@huawei.com> Acked-by: NWeilong Chen <chenweilong@huawei.com> Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
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由 Thinh Nguyen 提交于
stable inclusion from stable-5.10.36 commit 8f7cdbbf61f9282a2d8fe6ef870c5eab4edb3ed0 bugzilla: 51867 CVE: NA -------------------------------- [ Upstream commit 475e8be5 ] If the device doesn't support LPM, make sure to disable the LPM capability and don't advertise to the host that it supports it. Acked-by: NFelipe Balbi <balbi@kernel.org> Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Link: https://lore.kernel.org/r/9e68527ff932b1646f92a7593d4092a903754666.1618366071.git.Thinh.Nguyen@synopsys.comSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NSasha Levin <sashal@kernel.org> Signed-off-by: NChen Jun <chenjun102@huawei.com> Acked-by: NWeilong Chen <chenweilong@huawei.com> Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
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由 Wesley Cheng 提交于
stable inclusion from stable-5.10.36 commit 45f879b29da717e289b2bca84d7af03e91ebcc13 bugzilla: 51867 CVE: NA -------------------------------- [ Upstream commit 71ca43f3 ] The current dwc3_gadget_reset_interrupt() will stop any active transfers, but only addresses blocking of EP queuing for while we are coming from a disconnected scenario, i.e. after receiving the disconnect event. If the host decides to issue a bus reset on the device, the connected parameter will still be set to true, allowing for EP queuing to continue while we are disabling the functions. To avoid this, set the connected flag to false until the stop active transfers is complete. Signed-off-by: NWesley Cheng <wcheng@codeaurora.org> Link: https://lore.kernel.org/r/1616146285-19149-3-git-send-email-wcheng@codeaurora.orgSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NSasha Levin <sashal@kernel.org> Signed-off-by: NChen Jun <chenjun102@huawei.com> Acked-by: NWeilong Chen <chenweilong@huawei.com> Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
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- 22 4月, 2021 3 次提交
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由 Wesley Cheng 提交于
stable inclusion from stable-5.10.28 commit 996a5782faef8f2903e64fdf23feb3893156e94b bugzilla: 51779 -------------------------------- commit 5aef6297 upstream. Ensure that dep->flags are cleared until after stop active transfers is completed. Otherwise, the ENDXFER command will not be executed during ep disable. Fixes: f09ddcfc ("usb: dwc3: gadget: Prevent EP queuing while stopping transfers") Cc: stable <stable@vger.kernel.org> Reported-and-tested-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Tested-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NWesley Cheng <wcheng@codeaurora.org> Link: https://lore.kernel.org/r/1616610664-16495-1-git-send-email-wcheng@codeaurora.orgSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NChen Jun <chenjun102@huawei.com> Acked-by: N Weilong Chen <chenweilong@huawei.com> Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
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由 Shawn Guo 提交于
stable inclusion from stable-5.10.28 commit 1808ee421ce52923b7a77bdd22b1eb34a91392b2 bugzilla: 51779 -------------------------------- commit 5e4010e3 upstream. The ACPI probe starts failing since commit bea46b98 ("usb: dwc3: qcom: Add interconnect support in dwc3 driver"), because there is no interconnect support for ACPI, and of_icc_get() call in dwc3_qcom_interconnect_init() will just return -EINVAL. Fix the problem by skipping interconnect init for ACPI probe, and then the NULL icc_path_ddr will simply just scheild all ICC calls. Fixes: bea46b98 ("usb: dwc3: qcom: Add interconnect support in dwc3 driver") Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Cc: stable <stable@vger.kernel.org> Link: https://lore.kernel.org/r/20210311060318.25418-1-shawn.guo@linaro.orgSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NChen Jun <chenjun102@huawei.com> Acked-by: N Weilong Chen <chenweilong@huawei.com> Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
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由 Andy Shevchenko 提交于
stable inclusion from stable-5.10.28 commit a267a7e1c0cabf9d17ec4808b7900c366f253322 bugzilla: 51779 -------------------------------- [ Upstream commit b522f830 ] It seems that on Intel Merrifield platform the USB PHY shouldn't be suspended. Otherwise it can't be enabled by simply change the cable in the connector. Enable corresponding quirk for the platform in question. Fixes: e5f4ca3f ("usb: dwc3: ulpi: Fix USB2.0 HS/FS/LS PHY suspend regression") Suggested-by: NSerge Semin <fancer.lancer@gmail.com> Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20210322125244.79407-1-andriy.shevchenko@linux.intel.comSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NSasha Levin <sashal@kernel.org> Signed-off-by: NChen Jun <chenjun102@huawei.com> Acked-by: N Weilong Chen <chenweilong@huawei.com> Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
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- 13 4月, 2021 2 次提交
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由 Wesley Cheng 提交于
stable inclusion from stable-5.10.26 commit c7bb96a37dd2095fcd6c65a59689004e63e4b872 bugzilla: 51363 -------------------------------- commit f09ddcfc upstream. In the situations where the DWC3 gadget stops active transfers, once calling the dwc3_gadget_giveback(), there is a chance where a function driver can queue a new USB request in between the time where the dwc3 lock has been released and re-aquired. This occurs after we've already issued an ENDXFER command. When the stop active transfers continues to remove USB requests from all dep lists, the newly added request will also be removed, while controller still has an active TRB for it. This can lead to the controller accessing an unmapped memory address. Fix this by ensuring parameters to prevent EP queuing are set before calling the stop active transfers API. Fixes: ae7e8610 ("usb: dwc3: Stop active transfers before halting the controller") Signed-off-by: NWesley Cheng <wcheng@codeaurora.org> Link: https://lore.kernel.org/r/1615507142-23097-1-git-send-email-wcheng@codeaurora.org Cc: stable <stable@vger.kernel.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NChen Jun <chenjun102@huawei.com> Acked-by: N Weilong Chen <chenweilong@huawei.com> Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
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由 Wesley Cheng 提交于
stable inclusion from stable-5.10.26 commit 395d273f29980f658ac0087019661325aa777344 bugzilla: 51363 -------------------------------- commit 77adb8bd upstream. The DWC3 runtime suspend routine checks for the USB connected parameter to determine if the controller can enter into a low power state. The connected state is only set to false after receiving a disconnect event. However, in the case of a device initiated disconnect (i.e. UDC unbind), the controller is halted and a disconnect event is never generated. Set the connected flag to false if issuing a device initiated disconnect to allow the controller to be suspended. Signed-off-by: NWesley Cheng <wcheng@codeaurora.org> Link: https://lore.kernel.org/r/1609283136-22140-2-git-send-email-wcheng@codeaurora.orgSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NChen Jun <chenjun102@huawei.com> Acked-by: N Weilong Chen <chenweilong@huawei.com> Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
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- 09 4月, 2021 6 次提交
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由 Matthias Kaehlcke 提交于
stable inclusion from stable-5.10.24 commit adb9639d1e500146e9cb7ed47e299ced023cf96c bugzilla: 51348 -------------------------------- commit 2664deb0 upstream. The dwc3-qcom currently enables wakeup interrupts unconditionally when suspending, however this should not be done when wakeup is disabled (e.g. through the sysfs attribute power/wakeup). Only enable wakeup interrupts when device_may_wakeup() returns true. Fixes: a4333c3a ("usb: dwc3: Add Qualcomm DWC3 glue driver") Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NMatthias Kaehlcke <mka@chromium.org> Cc: stable <stable@vger.kernel.org> Link: https://lore.kernel.org/r/20210302103659.v2.1.I44954d9e1169f2cf5c44e6454d357c75ddfa99a2@changeidSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NChen Jun <chenjun102@huawei.com> Acked-by: N Weilong Chen <chenweilong@huawei.com> Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
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由 Shawn Guo 提交于
stable inclusion from stable-5.10.24 commit 13c9e76cdda620218da2193d2d01693d3c5d5466 bugzilla: 51348 -------------------------------- commit 1edbff9c upstream. It enables USB Host support for sc8180x ACPI boot, both the standalone one and the one behind URS (USB Role Switch). And they share the the same dwc3_acpi_pdata with sdm845. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Link: https://lore.kernel.org/r/20210301075745.20544-1-shawn.guo@linaro.org Cc: stable <stable@vger.kernel.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NChen Jun <chenjun102@huawei.com> Acked-by: N Weilong Chen <chenweilong@huawei.com> Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
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由 Shawn Guo 提交于
stable inclusion from stable-5.10.24 commit 39bcc4b7f3985ddb742cf33b2ed972f4cd73ea24 bugzilla: 51348 -------------------------------- commit c25c210f upstream. For sdm845 ACPI boot, the URS (USB Role Switch) node in ACPI DSDT table holds the memory resource, while interrupt resources reside in the child nodes USB0 and UFN0. It adds USB0 host support by probing URS node, creating platform device for USB0 node, and then retrieve interrupt resources from USB0 platform device. Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Link: https://lore.kernel.org/r/20210115035057.10994-1-shawn.guo@linaro.orgSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NChen Jun <chenjun102@huawei.com> Acked-by: N Weilong Chen <chenweilong@huawei.com> Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
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由 Serge Semin 提交于
stable inclusion from stable-5.10.24 commit 10551fbc5517b67758fc2600faa9d5c4eb4d30a7 bugzilla: 51348 -------------------------------- commit 1cffb1c6 upstream. of_get_child_by_name() increments the reference counter of the OF node it managed to find. So after the code is done using the device node, the refcount must be decremented. Add missing of_node_put() invocation then to the dwc3_qcom_of_register_core() method, since DWC3 OF node is being used only there. Fixes: a4333c3a ("usb: dwc3: Add Qualcomm DWC3 glue driver") Signed-off-by: NSerge Semin <Sergey.Semin@baikalelectronics.ru> Link: https://lore.kernel.org/r/20210212205521.14280-1-Sergey.Semin@baikalelectronics.ru Cc: stable <stable@vger.kernel.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NChen Jun <chenjun102@huawei.com> Acked-by: N Weilong Chen <chenweilong@huawei.com> Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
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由 Thinh Nguyen 提交于
stable inclusion from stable-5.10.20 commit 5b4cd967876269bfce36b0ec22a846882224b7e9 bugzilla: 50608 -------------------------------- commit 4b049f55 upstream. The dep->interval captures the number of frames/microframes per interval from bInterval. Fullspeed interrupt endpoint bInterval is the number of frames per interval and not 2^(bInterval - 1). So fix it here. This change is only for debugging purpose and should not affect the interrupt endpoint operation. Fixes: 72246da4 ("usb: Introduce DesignWare USB3 DRD Driver") Cc: <stable@vger.kernel.org> Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Link: https://lore.kernel.org/r/1263b563dedc4ab8b0fb854fba06ce4bc56bd495.1612820995.git.Thinh.Nguyen@synopsys.comSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NChen Jun <chenjun102@huawei.com> Acked-by: NXie XiuQi <xiexiuqi@huawei.com> Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
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由 Thinh Nguyen 提交于
stable inclusion from stable-5.10.20 commit 6b78b380db60e4434931572d7d7943b5976a0fd6 bugzilla: 50608 -------------------------------- commit a1679af8 upstream. Valid range for DEPCFG.bInterval_m1 is from 0 to 13, and it must be set to 0 when the controller operates in full-speed. See the programming guide for DEPCFG command section 3.2.2.1 (v3.30a). Fixes: 72246da4 ("usb: Introduce DesignWare USB3 DRD Driver") Cc: <stable@vger.kernel.org> Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Link: https://lore.kernel.org/r/3f57026f993c0ce71498dbb06e49b3a47c4d0265.1612820995.git.Thinh.Nguyen@synopsys.comSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NChen Jun <chenjun102@huawei.com> Acked-by: NXie XiuQi <xiexiuqi@huawei.com> Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
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- 09 3月, 2021 1 次提交
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由 Gary Bisson 提交于
stable inclusion from stable-5.10.15 commit b6609c0a537b3fe15a098534675fd7bdfadf553b bugzilla: 48167 -------------------------------- commit 0e5a3c82 upstream. Commit fe8abf33 ("usb: dwc3: support clocks and resets for DWC3 core") introduced clock support and a new function named dwc3_core_init_for_resume() which enables the clock before calling dwc3_core_init() during resume as clocks get disabled during suspend. Unfortunately in this commit the DWC3_GCTL_PRTCAP_OTG case was forgotten and therefore during resume, a platform could call dwc3_core_init() without re-enabling the clocks first, preventing to resume properly. So update the resume path to call dwc3_core_init_for_resume() as it should. Fixes: fe8abf33 ("usb: dwc3: support clocks and resets for DWC3 core") Cc: stable@vger.kernel.org Signed-off-by: NGary Bisson <gary.bisson@boundarydevices.com> Link: https://lore.kernel.org/r/20210125161934.527820-1-gary.bisson@boundarydevices.comSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com> Acked-by: NXie XiuQi <xiexiuqi@huawei.com>
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- 27 1月, 2021 6 次提交
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由 Serge Semin 提交于
stable inclusion from stable-5.10.7 commit 150a9c163c3d5563897b968d1e59cc224af048ed bugzilla: 47429 -------------------------------- commit e5f4ca3f upstream. First of all the commit e0082698 ("usb: dwc3: ulpi: conditionally resume ULPI PHY") introduced the Suspend USB2.0 HS/FS/LS PHY regression, as by design of the fix any attempt to read/write from/to the PHY control registers will completely disable the PHY suspension, which consequently will increase the USB bus power consumption. Secondly the fix won't work well for the very first attempt of the ULPI PHY control registers IO, because after disabling the USB2.0 PHY suspension functionality it will still take some time for the bus to resume from the sleep state if one has been reached before it. So the very first PHY register read/write operation will take more time than the busy-loop provides and the IO timeout error might be returned anyway. Here we suggest to fix the denoted problems in the following way. First of all let's not disable the Suspend USB2.0 HS/FS/LS PHY functionality so to make the controller and the USB2.0 bus more power efficient. Secondly instead of that we'll extend the PHY IO op wait procedure with 1 - 1.2 ms sleep if the PHY suspension is enabled (1ms should be enough as by LPM specification it is at most how long it takes for the USB2.0 bus to resume from L1 (Sleep) state). Finally in case if the USB2.0 PHY suspension functionality has been disabled on the DWC USB3 controller setup procedure we'll compensate the USB bus resume process latency by extending the busy-loop attempts counter. Fixes: e0082698 ("usb: dwc3: ulpi: conditionally resume ULPI PHY") Acked-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: NSerge Semin <Sergey.Semin@baikalelectronics.ru> Link: https://lore.kernel.org/r/20201210085008.13264-4-Sergey.Semin@baikalelectronics.ru Cc: stable <stable@vger.kernel.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NChen Jun <chenjun102@huawei.com> Acked-by: NXie XiuQi <xiexiuqi@huawei.com>
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由 Serge Semin 提交于
stable inclusion from stable-5.10.7 commit 97abe6663fa35c40edb2efebdc3aea8bad71086c bugzilla: 47429 -------------------------------- commit fca3f138 upstream. Originally the procedure of the ULPI transaction finish detection has been developed as a simple busy-loop with just decrementing counter and no delays. It's wrong since on different systems the loop will take a different time to complete. So if the system bus and CPU are fast enough to overtake the ULPI bus and the companion PHY reaction, then we'll get to take a false timeout error. Fix this by converting the busy-loop procedure to take the standard bus speed, address value and the registers access mode into account for the busy-loop delay calculation. Here is the way the fix works. It's known that the ULPI bus is clocked with 60MHz signal. In accordance with [1] the ULPI bus protocol is created so to spend 5 and 6 clock periods for immediate register write and read operations respectively, and 6 and 7 clock periods - for the extended register writes and reads. Based on that we can easily pre-calculate the time which will be needed for the controller to perform a requested IO operation. Note we'll still preserve the attempts counter in case if the DWC USB3 controller has got some internals delays. [1] UTMI+ Low Pin Interface (ULPI) Specification, Revision 1.1, October 20, 2004, pp. 30 - 36. Fixes: 88bc9d19 ("usb: dwc3: add ULPI interface support") Acked-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: NSerge Semin <Sergey.Semin@baikalelectronics.ru> Link: https://lore.kernel.org/r/20201210085008.13264-3-Sergey.Semin@baikalelectronics.ru Cc: stable <stable@vger.kernel.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NChen Jun <chenjun102@huawei.com> Acked-by: NXie XiuQi <xiexiuqi@huawei.com>
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由 Serge Semin 提交于
stable inclusion from stable-5.10.7 commit b51963e9f5622ca0eeaf9752d92345dfa1a14ec5 bugzilla: 47429 -------------------------------- commit ce722da6 upstream. In accordance with [1] the DWC_usb3 core sets the GUSB2PHYACCn.VStsDone bit when the PHY vendor control access is done and clears it when the application initiates a new transaction. The doc doesn't say anything about the GUSB2PHYACCn.VStsBsy flag serving for the same purpose. Moreover we've discovered that the VStsBsy flag can be cleared before the VStsDone bit. So using the former as a signal of the PHY control registers completion might be dangerous. Let's have the VStsDone flag utilized instead then. [1] Synopsys DesignWare Cores SuperSpeed USB 3.0 xHCI Host Controller Databook, 2.70a, December 2013, p.388 Fixes: 88bc9d19 ("usb: dwc3: add ULPI interface support") Acked-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: NSerge Semin <Sergey.Semin@baikalelectronics.ru> Link: https://lore.kernel.org/r/20201210085008.13264-2-Sergey.Semin@baikalelectronics.ru Cc: stable <stable@vger.kernel.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NChen Jun <chenjun102@huawei.com> Acked-by: NXie XiuQi <xiexiuqi@huawei.com>
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由 Thinh Nguyen 提交于
stable inclusion from stable-5.10.7 commit 8907a10c8ffaaa830358b08f97da55e856e9b093 bugzilla: 47429 -------------------------------- commit a5c7682a upstream. If an active transfer is dequeued, then the endpoint is freed to start a new transfer. Make sure to clear the endpoint's transfer wait flag for this case. Fixes: e0d19563 ("usb: dwc3: gadget: Wait for transfer completion") Cc: stable@vger.kernel.org Acked-by: NFelipe Balbi <balbi@kernel.org> Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Link: https://lore.kernel.org/r/b81cd5b5281cfbfdadb002c4bcf5c9be7c017cfd.1609828485.git.Thinh.Nguyen@synopsys.comSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NChen Jun <chenjun102@huawei.com> Acked-by: NXie XiuQi <xiexiuqi@huawei.com>
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由 Wesley Cheng 提交于
stable inclusion from stable-5.10.7 commit dd8363fbca508616811f8a94006b09c66c094107 bugzilla: 47429 -------------------------------- commit a1383b35 upstream. usb_gadget_deactivate/usb_gadget_activate does not execute the UDC start operation, which may leave EP0 disabled and event IRQs disabled when re-activating the function. Move the enabling/disabling of USB EP0 and device event IRQs to be performed in the pullup routine. Fixes: ae7e8610 ("usb: dwc3: Stop active transfers before halting the controller") Tested-by: NMichael Tretter <m.tretter@pengutronix.de> Cc: stable <stable@vger.kernel.org> Reported-by: NMichael Tretter <m.tretter@pengutronix.de> Signed-off-by: NWesley Cheng <wcheng@codeaurora.org> Link: https://lore.kernel.org/r/1609282837-21666-1-git-send-email-wcheng@codeaurora.orgSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NChen Jun <chenjun102@huawei.com> Acked-by: NXie XiuQi <xiexiuqi@huawei.com>
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由 Zheng Zengkai 提交于
stable inclusion from stable-5.10.7 commit 906b0510dde58d0eacad76b1bcb1264bb634f95a bugzilla: 47429 -------------------------------- commit a5ada3df upstream. dwc3_meson_g12a_probe() does not invoke clk_bulk_disable_unprepare() on one error handling path. This patch fixes that. Fixes: 347052e3 ("usb: dwc3: meson-g12a: fix USB2 PHY initialization on G12A and A1 SoCs") Reported-by: NHulk Robot <hulkci@huawei.com> Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com> Cc: stable <stable@vger.kernel.org> Reviewed-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://lore.kernel.org/r/20201215025459.91794-1-zhengzengkai@huawei.comSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NChen Jun <chenjun102@huawei.com> Acked-by: NXie XiuQi <xiexiuqi@huawei.com>
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- 28 10月, 2020 1 次提交
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由 Mauro Carvalho Chehab 提交于
There is a common comment marked, instead, with kernel-doc notation. Also, some identifiers have different names between their prototypes and the kernel-doc markup. Signed-off-by: NMauro Carvalho Chehab <mchehab+huawei@kernel.org> Acked-by: NFelipe Balbi <balbi@kernel.org> Link: https://lore.kernel.org/r/0b964be3884def04fcd20ea5c12cb90d0014871c.1603469755.git.mchehab+huawei@kernel.orgSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 27 10月, 2020 2 次提交
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由 Thinh Nguyen 提交于
If we want to send a control status on our own time (through delayed_status), make sure to handle a case where we may queue the delayed status before the host requesting for it (when XferNotReady is generated). Otherwise, the driver won't send anything because it's not EP0_STATUS_PHASE yet. To resolve this, regardless whether dwc->ep0state is EP0_STATUS_PHASE, make sure to clear the dwc->delayed_status flag if dwc3_ep0_send_delayed_status() is called. The control status can be sent when the host requests it later. Cc: <stable@vger.kernel.org> Fixes: d97c78a1 ("usb: dwc3: gadget: END_TRANSFER before CLEAR_STALL command") Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Signed-off-by: NFelipe Balbi <balbi@kernel.org>
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由 Heikki Krogerus 提交于
This patch adds the necessary PCI ID for Intel Alder Lake-S devices. Signed-off-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: NFelipe Balbi <balbi@kernel.org>
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- 02 10月, 2020 14 次提交
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由 Wan Ahmad Zainie 提交于
Add compatible string to use this generic glue layer to support Intel Keem Bay platform's dwc3 controller. Signed-off-by: NWan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com> Signed-off-by: NFelipe Balbi <balbi@kernel.org>
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由 Thinh Nguyen 提交于
DWC3 IPs can use the maximum stream id (up to 2^16) specified by the USB 3.x specs. Don't limit to stream id 2^15 only. Note that this does not reflect the number of concurrent streams the controller handles internally. Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Signed-off-by: NFelipe Balbi <balbi@kernel.org>
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由 Thinh Nguyen 提交于
If the transfer had already started and there's no TRB to update, then there's no need to go through __dwc3_gadget_kick_transfer(). There is no problem reissuing UPDATE_TRANSFER command. This change just saves the driver from doing a few operations. This happens when we run out of TRB and function driver still queues for more requests. Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Signed-off-by: NFelipe Balbi <balbi@kernel.org>
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由 Thinh Nguyen 提交于
If we couldn't finish preparing all the TRBs of a request, don't prepare the next request. Otherwise, the TRBs order will be mixed up and the controller will process the wrong TRB. This is a corner case where there's not enough TRBs for a request that needs the extra TRB but there's still 1 available TRB in the pool. Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Signed-off-by: NFelipe Balbi <balbi@kernel.org>
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由 Thinh Nguyen 提交于
To keep the setting of interrupt-on-completion (IOC) when out of TRBs consistent and easier to read, the caller of dwc3_prepare_one_trb() will determine if the TRB must have IOC bit set. This also reduces the number of times we need to call dwc3_calc_trbs_left(). Note that we only care about setting IOC from insufficient number of TRBs for SG and not linear requests (because we don't need to split linear requests). Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Signed-off-by: NFelipe Balbi <balbi@kernel.org>
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由 Thinh Nguyen 提交于
Previously if we run out of TRBs for the last SG entry that requires an extra TRB, we set interrupt-on-completion (IOC) bit to an already prepared TRB (i.e. HWO=1). This logic is not clean, and it's not a typical way to prepare TRB. Also, this prevents showing IOC setup in tracepoint when __dwc3_prepare_one_trb() is executed. Instead, let's look ahead when preparing TRB to know whether to set the IOC bit before the last SG entry. This requires adding a new parameter "must_interrupt" to dwc3_prepare_one_trb(). Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Signed-off-by: NFelipe Balbi <balbi@kernel.org>
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由 Thinh Nguyen 提交于
It's possible that there's no new TRBs prepared when kicking a transfer. This happens when we need to stop and restart a transfer such as in the case of reinitiating a stream or retrying isoc transfer. For streams, sometime host may reject a stream and the device may need to reinitiate that stream by stopping and restarting a transfer. In this case, all the TRBs may have already been prepared. Allow the function __dwc3_gadget_kick_transfer() to go through even though there's no new TRB. Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Signed-off-by: NFelipe Balbi <balbi@kernel.org>
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由 Wesley Cheng 提交于
In the DWC3 databook, for a device initiated disconnect or bus reset, the driver is required to send dependxfer commands for any pending transfers. In addition, before the controller can move to the halted state, the SW needs to acknowledge any pending events. If the controller is not halted properly, there is a chance the controller will continue accessing stale or freed TRBs and buffers. Signed-off-by: NWesley Cheng <wcheng@codeaurora.org> Reviewed-by: NThinh Nguyen <thinhn@synopsys.com> Signed-off-by: NFelipe Balbi <balbi@kernel.org>
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由 Yu Chen 提交于
SPLIT_BOUNDARY_DISABLE should be set for DesignWare USB3 DRD Core of Hisilicon Kirin Soc when dwc3 core act as host. [mchehab: dropped a dev_dbg() as only traces are now allowwed on this driver] Signed-off-by: NYu Chen <chenyu56@huawei.com> Signed-off-by: NMauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: NFelipe Balbi <balbi@kernel.org>
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由 Thinh Nguyen 提交于
The functions dwc3_prepare_one_trb_sg and dwc3_prepare_one_trb_linear are not necessarily preparing "one" TRB, it can prepare multiple TRBs. Rename these functions as follow: dwc3_prepare_one_trb_sg -> dwc3_prepare_trbs_sg dwc3_prepare_one_trb_linear -> dwc3_prepare_trbs_linear Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Signed-off-by: NFelipe Balbi <balbi@kernel.org>
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由 Thinh Nguyen 提交于
There are a lot of common codes for preparing SG and linear TRBs. Refactor them for easier read. Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Signed-off-by: NFelipe Balbi <balbi@kernel.org>
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由 Thinh Nguyen 提交于
If we run out of TRBs because we need extra TRBs, make sure to set the IOC bit for the previously prepared TRB to get completion notification to free up TRBs to resume later. Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Signed-off-by: NFelipe Balbi <balbi@kernel.org>
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由 Thinh Nguyen 提交于
By returning the number of TRBs prepared, we know whether to execute __dwc3_gadget_kick_transfer(). This allows us to check if we ran out of TRBs when extra TRBs are needed for OUT transfers. It also allows us to properly handle usb_gadget_map_request_by_dev() error. Fixes: c6267a51 ("usb: dwc3: gadget: align transfers to wMaxPacketSize") Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Signed-off-by: NFelipe Balbi <balbi@kernel.org>
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由 Thinh Nguyen 提交于
In preparation for fixing the check for number of remaining TRBs, revise dwc3_prepare_one_trb_linear() and dwc3_prepare_one_trb_sg() to return the number of prepared TRBs. Signed-off-by: NThinh Nguyen <Thinh.Nguyen@synopsys.com> Signed-off-by: NFelipe Balbi <balbi@kernel.org>
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