- 10 1月, 2019 2 次提交
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由 José Roberto de Souza 提交于
The DP_DPCD_QUIRK_NO_PSR comment is missing colon causing this warning when generating kernel documentation. ./include/drm/drm_dp_helper.h:1374: warning: Incorrect use of kernel-doc format: * @DP_DPCD_QUIRK_NO_PSR Fixes: 1035f4a6 ("drm/i915: Disable PSR in Apple panels") Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Signed-off-by: NJosé Roberto de Souza <jose.souza@intel.com> Reviewed-by: NDhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181205184850.13218-1-jose.souza@intel.com (cherry picked from commit ed17b555) Signed-off-by: NJani Nikula <jani.nikula@intel.com>
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由 José Roberto de Souza 提交于
i915 yet don't support PSR in Apple panels, so lets keep it disabled while we work on that. v2: Renamed DP_DPCD_QUIRK_PSR_NOT_CURRENTLY_SUPPORTED to DP_DPCD_QUIRK_NO_PSR (Ville) v3: Adding documentation to DP_DPCD_QUIRK_NO_PSR(Dhinakaran and Jani) Fixed typo in comment of the new quirk entry(Jani) Fixes: 598c6cfe (drm/i915/psr: Enable PSR1 on gen-9+ HW) Cc: Jani Nikula <jani.nikula@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Reviewed-by: NDhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Signed-off-by: NJosé Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181204003403.23361-1-jose.souza@intel.com (cherry picked from commit 7c5c641a) Signed-off-by: NJani Nikula <jani.nikula@intel.com>
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- 28 11月, 2018 1 次提交
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由 Manasi Navare 提交于
DSC DPCD color depth register advertises its color depth capabilities by setting each of the bits that corresponding to a specific color depth. This patch defines those specific color depths and adds a helper to return an array of color depth capabilities. v2: * Simplify the logic (Ville) Signed-off-by: NManasi Navare <manasi.d.navare@intel.com> Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Acked-by: Sean Paul <seanpaul@chromium.org> (For merging through drm-intel) Reviewed-by: NVille Syrjala <ville.syrjala@linux.intel.com> Reviewed-by: NAnusha Srivatsa <anusha.srivatsa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181127214125.17658-1-manasi.d.navare@intel.com
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- 03 11月, 2018 1 次提交
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由 Anusha Srivatsa 提交于
DP 1.4 has Forward Error Correction Support(FEC). Add helper function to check if the sink device supports FEC. v2: Separate the helper and the code that uses the helper into two separate patches. (Manasi) v3: - Move the code to drm_dp_helper.c (Manasi) - change the return type, code style changes (Gaurav) - Use drm_dp_dpcd_readb instead of drm_dp_dpcd_read. (Jani) v4: - Avoid aux reads everytime, instead read cached values of dpcd register (jani) - Move helper to drm_dp_helper.h like other dsc helpers.(Anusha) v5: rebased. Change the helper parameter suitably. Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Manasi Navare <manasi.d.navare@intel.com> Acked-by: Sean Paul <seanpaul@chromium.org> (For merging through drm-intel) Signed-off-by: NAnusha Srivatsa <anusha.srivatsa@intel.com> Reviewed-by: NManasi Navare <manasi.d.navare@intel.com> Signed-off-by: NManasi Navare <manasi.d.navare@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181102041455.15818-2-anusha.srivatsa@intel.com
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- 01 11月, 2018 3 次提交
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由 Manasi Navare 提交于
DP 1.4 spec defines DP secondary data packet for DSC picture parameter set. This patch defines its payload size according to the DP 1.4 specification. Signed-off-by: NManasi Navare <manasi.d.navare@intel.com> Cc: dri-devel@lists.freedesktop.org Cc: Gaurav K Singh <gaurav.k.singh@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Acked-by: Sean Paul <seanpaul@chromium.org> (For merging through drm-intel) Reviewed-by: NHarry Wentland <harry.wentland@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181031001923.31442-7-manasi.d.navare@intel.com
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由 Manasi Navare 提交于
This patch adds inline functions and helpers for obtaining DP sink's supported DSC parameters like DSC sink support, eDP compressed BPP supported, maximum slice count supported by the sink devices, DSC line buffer bit depth supported on DP sink, DSC sink maximum color depth by parsing corresponding DPCD registers. v4: * Add helper to give line buf bit depth (Manasi) * Correct the bit masking in color depth helper (manasi) v3: * Use SLICE_CAP_2 for DP (Anusha) v2: * Add DSC sink support macro (Jani N) Cc: Gaurav K Singh <gaurav.k.singh@intel.com> Cc: dri-devel@lists.freedesktop.org Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Signed-off-by: NManasi Navare <manasi.d.navare@intel.com> Reviewed-by: NAnusha Srivatsa <anusha.srivatsa@intel.com> Reviewed-by: NGaurav K Singh <gaurav.k.singh@intel.com> Acked-by: Sean Paul <seanpaul@chromium.org> (For merging through drm-intel) Link: https://patchwork.freedesktop.org/patch/msgid/20181031001923.31442-4-manasi.d.navare@intel.com
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由 Manasi Navare 提交于
This patch defines the DP DSC receiver capability size that gives total number of DP DSC DPCD registers. This also adds a missing #defines for DP DSC support missed in the commit id (ab6a46ea "Add DPCD definitions for DP 1.4 DSC feature") v3: * MIN_SLICE_WIDTH = 2560 (Anusha) * Define DP_DSC_SLICE_WIDTH_MULTIPLIER = 320 v2: * Add SHIFT define and DECOMPRESSION_EN define missed in prev patch Cc: dri-devel@lists.freedesktop.org Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Cc: Gaurav K Singh <gaurav.k.singh@intel.com> Signed-off-by: NManasi Navare <manasi.d.navare@intel.com> Acked-by: Sean Paul <seanpaul@chromium.org> (For merging through drm-intel) Reviewed-by: NAnusha Srivatsa <anusha.srivatsa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181031001923.31442-2-manasi.d.navare@intel.com
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- 29 10月, 2018 1 次提交
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由 Ramalingam C 提交于
This patch adds HDCP register definitions for HDMI and DP HDCP adaptations. HDMI specific HDCP2.2 register definitions are added into drm_hdcp.h, where as HDCP2.2 register offsets in DPCD offsets are defined at drm_dp_helper.h. v2: bit_field definitions are replaced by macros. [Tomas and Jani] v3: No Changes. v4: Comments style and typos are fixed [Uma] v5: Fix for macros. v6: Adds _MS to the timeouts to represent units [Sean Paul] v7: Macro DP_HDCP_2_2_REG_EKH_KM_OFFSET renamed [Uma] Redundant macro is removed [Uma] Signed-off-by: NRamalingam C <ramalingam.c@intel.com> Reviewed-by: NSean Paul <seanpaul@chromium.org> Acked-by: Sean Paul <seanpaul@chromium.org> (for merging through drm-intel) Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/1540806351-7137-6-git-send-email-ramalingam.c@intel.com
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- 20 10月, 2018 1 次提交
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由 Manasi Navare 提交于
VESA eDP 1.4 specification has separate fields defined in EDP_DPCD_REV for eDP 1.4a and 1.4b eDP revisions. This patch defines those. Found this when one of my eDP panels advertises eDP 1.4a (04h) in the EDP_DPCD_REV DPCD field. Cc: Jani Nikula <jani.nikula@intel.com> Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Signed-off-by: NManasi Navare <manasi.d.navare@intel.com> Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181009002351.23085-1-manasi.d.navare@intel.com
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- 19 9月, 2018 1 次提交
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由 Lee, Shawn C 提交于
Some DP dongles in particular seem to be fussy about too large link M/N values. Set specific value for N divider can resolve this issue per dongle vendor's comment. So configure N as constant value (0x8000) to instead of reduce M/N formula when specific DP dongle connected. v2: add more comments for issue description and fix typo. v3: add lost commit messages back for version 2 v4: send patch to both intel-gfx and dri-devel Cc: Jani Nikula <jani.nikula@intel.com> Cc: Cooper Chiou <cooper.chiou@intel.com> Cc: Matt Atwood <matthew.s.atwood@intel.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Cc: Clint Taylor <clinton.a.taylor@intel.com> Tested-by: NClint Taylor <clinton.a.taylor@intel.com> Signed-off-by: NLee, Shawn C <shawn.c.lee@intel.com> Signed-off-by: NJani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1536733371-25004-3-git-send-email-shawn.c.lee@intel.com
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- 15 8月, 2018 1 次提交
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由 Matt Atwood 提交于
This bit was added to DP Training Aux RD interval with DP 1.3. Via descriptiion of the spec this field indicates the panels true capabilities are described in DPCD address space 02200h through 022FFh. v2: version comment update v3: version comment correction, commit message update v4: white space correction Signed-off-by: NMatt Atwood <matthew.s.atwood@intel.com> Reviewed-by: NManasi Navare <manasi.d.navare@intel.com> [manasi: fixup whitespace per Rodrigo's comment] Signed-off-by: NManasi Navare <manasi.d.navare@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180723212735.23893-1-matthew.s.atwood@intel.com
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- 13 7月, 2018 1 次提交
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由 Hans Verkuil 提交于
This adds support for the DisplayPort CEC-Tunneling-over-AUX feature that is part of the DisplayPort 1.3 standard. Unfortunately, not all DisplayPort/USB-C to HDMI adapters with a chip that has this capability actually hook up the CEC pin, so even though a CEC device is created, it may not actually work. Signed-off-by: NHans Verkuil <hans.verkuil@cisco.com> Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180711132909.25409-2-hverkuil@xs4all.nl
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- 09 5月, 2018 2 次提交
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由 Matt Atwood 提交于
DP_TRAINING_AUX_RD_INTERVAL with DP 1.3 spec changed bit scheeme from 8 bits to 7 in DPCD 0x000e. The 8th bit is used to identify extended receiver capabilities. For panels that use this new feature wait interval would be increased by 512 ms, when spec is max 16 ms. This behavior is described in table 2-158 of DP 1.4 spec address 0000eh. With the introduction of DP 1.4 spec main link clock recovery was standardized to 100 us regardless of TRAINING_AUX_RD_INTERVAL value. To avoid breaking panels that are not spec compiant we now warn on invalid values. V2: commit title/message, masking all 7 bits, warn on out of spec values. V3: commit message, make link train clock recovery follow DP 1.4 spec. V4: style changes V5: typo V6: print statement revisions, DP_REV to DPCD_REV, comment correction V7: typo V8: Style V9: Strip out DPCD_REV_XX into seperate patch v10: DPCD_REV_XX to DP_DPCD_REV_XX Signed-off-by: NMatt Atwood <matthew.s.atwood@intel.com> Reviewed-by: NRodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: NRodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180504221800.17830-2-matthew.s.atwood@intel.com
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由 Matt Atwood 提交于
As more differentation occurs between DP spec. Its useful to have these as macros in a drm_dp_helper. v2: DPCD_REV_XX to DP_DPCD_REV_XX Signed-off-by: NMatt Atwood <matthew.s.atwood@intel.com> Reviewed-by: NRodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: NRodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180504221800.17830-1-matthew.s.atwood@intel.com
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- 27 4月, 2018 1 次提交
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由 Manasi Navare 提交于
No functional changes in this patch. The SDP Header is a generic header for secondary data packets for both eDP and DP so call it dp_sdp_header. This header gets used for different SDP types already defined. Also header bytes 2 and 3 are secondary data packet specific header bytes. So change the comment to indicate the same. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Cc: dri-devel@lists.freedesktop.org Signed-off-by: NManasi Navare <manasi.d.navare@intel.com> Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1524770868-16869-1-git-send-email-manasi.d.navare@intel.com
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- 31 3月, 2018 2 次提交
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由 José Roberto de Souza 提交于
This is a register to help debug what is in the last SDP VSC packet revived by sink. Signed-off-by: NJosé Roberto de Souza <jose.souza@intel.com> Reviewed-by: NRodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: NRodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180328223046.16125-2-jose.souza@intel.com
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由 José Roberto de Souza 提交于
To comply with eDP1.4a this bit should be set when enabling PSR2. Signed-off-by: NJosé Roberto de Souza <jose.souza@intel.com> Reviewed-by: NRodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: NRodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180328223046.16125-1-jose.souza@intel.com
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- 19 3月, 2018 1 次提交
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由 José Roberto de Souza 提交于
eDP 1.4a specification defines PSR version 3, it PSR2 with the addition of Y-coordinate support when doing selective update. Signed-off-by: NJosé Roberto de Souza <jose.souza@intel.com> Signed-off-by: NJani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180317013828.24182-1-jose.souza@intel.com
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- 15 2月, 2018 1 次提交
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由 Anusha Srivatsa 提交于
Forward Error Correction is supported on DP 1.4. This patch adds corresponding DPCD register definitions. v2: Add dri-devel mailing list to the CC list(Jani) v3: Change names, add missing masks (Manasi) v4: Add missing shifts to mask (Manasi) v5: Arrange the definitions in ascending order of the address (Jani) v6: remove unnecessary definitions. Add missing masks, add "/* 1.4 */" to offset definitions. (Jani) Cc: dri-devel@lists.freedesktop.org Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Manasi Navare <manasi.d.navare@intel.com> Signed-off-by: NAnusha Srivatsa <anusha.srivatsa@intel.com> Signed-off-by: NJani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1518636498-20921-1-git-send-email-anusha.srivatsa@intel.com
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- 26 1月, 2018 2 次提交
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由 Manasi Navare 提交于
DP 1.4 spec adds a TPS4 training pattern sequence required for HBR3. This patch adds the corresponding bit definitions in MAX_DOWNSPREAD register and TRAINING_PATTERN_SET and inline functions to check if this bit is set and for selecting a proper TRAINING_PATTERN_MASK that changed to 0x7 on DP spec 1.4 Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: dri-devel@lists.freedesktop.org Signed-off-by: NManasi Navare <manasi.d.navare@intel.com> Reviewed-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NJani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1516660991-20697-2-git-send-email-manasi.d.navare@intel.com
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由 Manasi Navare 提交于
Existing helpers add support upto HBR2. This patch adds support for HBR3 rate (8.1 Gbps) introduced as part of DP 1.4 specification. Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: dri-devel@lists.freedesktop.org Signed-off-by: NManasi Navare <manasi.d.navare@intel.com> Reviewed-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NJani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1516660991-20697-1-git-send-email-manasi.d.navare@intel.com
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- 09 1月, 2018 1 次提交
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由 Sean Paul 提交于
In preparation for implementing HDCP in i915, add some HDCP related register offsets and defines. The dpcd register offsets will go in drm_dp_helper.h whereas the ddc offsets along with generic HDCP stuff will get stuffed in drm_hdcp.h, which is new. Changes in v2: - drm_hdcp.h gets MIT license (Daniel) Changes in v3: - None Changes in v4: - None Changes in v5: - None Changes in v6: - SPDX license Cc: Daniel Vetter <daniel.vetter@intel.com> Reviewed-by: NRamalingam C <ramalingm.c@intel.com> Signed-off-by: NSean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20180108195545.218615-5-seanpaul@chromium.org
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- 27 10月, 2017 1 次提交
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由 Dhinakaran Pandiyan 提交于
DPCD 600h - SET_POWER & SET_DP_PWR_VOLTAGE defines power state 101 = Set Main-Link for local Sink device and all downstream Sink devices to D3 (power-down mode), keep AUX block fully powered, ready to reply within a Response Timeout period of 300us. This state is useful in a MST dock + MST monitor configuration that doesn't wake up from D3 state. v2: Use spaces instead of tabs (Jani) Reviewed-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NDhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Signed-off-by: NJani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1502475008-2035-1-git-send-email-dhinakaran.pandiyan@intel.com
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- 29 9月, 2017 1 次提交
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由 vathsala nagaraju 提交于
Add defines for dpcd register 2009 (synchronization latency in sink). v2: - add spec version (Daniel) - use register name as is in spec,only drop excess from end (jani) - add the full register contents (jani) [Rodrigo fixed spec version when merging] Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> CC: Puthikorn Voravootivat <puthik@chromium.org> Reviewed-by: NRodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: NVathsala Nagaraju <vathsala.nagaraju@intel.com> Signed-off-by: NRodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1506419953-32605-1-git-send-email-vathsala.nagaraju@intel.comSigned-off-by: NRodrigo Vivi <rodrigo.vivi@intel.com>
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- 27 9月, 2017 1 次提交
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由 Dave Airlie 提交于
These are all the ones required by the AMD display core. Signed-off-by: NDave Airlie <airlied@redhat.com> Reviewed-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 18 9月, 2017 1 次提交
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由 Dhinakaran Pandiyan 提交于
Link status is available in the ESI field on devices with DPCD r1.2 or higher. DP spec also says "An MST upstream device shall use this field instead of the Link/Sink Device Status field registers, starting from DPCD Address 00200h." v2: Prefixed DP_ (Jani) Rewrote commment to stay within 80 cols. Cc: Jani Nikula <jani.nikula@intel.com> Reviewed-by: NJani Nikula <jani.nikula@intel.com> Signed-off-by: NDhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Signed-off-by: NJani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170914062127.12047-1-dhinakaran.pandiyan@intel.com
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- 22 8月, 2017 1 次提交
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由 Ville Syrjälä 提交于
Add defines for the secondary data packet (SDP) types from the spec. These are the DP specific ones, and in addition HDMI infoframe types (see enum hdmi_infoframe_type) are also valid SDP types. v2: Add more SDP types v3: Note the DP version that added each SDP type (Rodrigo) Cc: dri-devel@lists.freedesktop.org Reviewed-by: NRodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170818134958.15502-2-ville.syrjala@linux.intel.com
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- 29 5月, 2017 2 次提交
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由 Jani Nikula 提交于
Face the fact, there are Display Port sink and branch devices out there in the wild that don't follow the Display Port specifications, or they have bugs, or just otherwise require special treatment. Start a common quirk database the drivers can query based on the DP device identification. At least for now, we leave the workarounds for the drivers to implement as they see fit. For starters, add a branch device that can't handle full 24-bit main link Mdiv and Ndiv main link attributes properly. Naturally, the workaround of reducing main link attributes for all devices ended up in regressions for other devices. So here we are. v2: Rebase on DRM DP desc read helpers v3: Fix the OUI memcmp blunder (Clint) Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Cc: Clint Taylor <clinton.a.taylor@intel.com> Cc: Adam Jackson <ajax@redhat.com> Cc: Harry Wentland <harry.wentland@amd.com> Tested-by: NClinton Taylor <clinton.a.taylor@intel.com> Reviewed-by: NClinton Taylor <clinton.a.taylor@intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> # v2 Signed-off-by: NJani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/91ec198dd95258dbf3bee2f6be739e0da73b4fdd.1495105635.git.jani.nikula@intel.com
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- 26 5月, 2017 1 次提交
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由 Puthikorn Voravootivat 提交于
This patch adds the following definition - Bit mask for EDP_PWMGEN_BIT_COUNT and min/max cap register which only use bit 0:4 - Base frequency (27 MHz) for backlight PWM frequency generator. Signed-off-by: NPuthikorn Voravootivat <puthik@chromium.org> Reviewed-by: NDhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Acked-by: NDave Airlie <airlied@gmail.com> Signed-off-by: NJani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170523223805.46372-5-puthik@chromium.org
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- 21 4月, 2017 1 次提交
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由 Clint Taylor 提交于
Adding DPCD register definitions from the DP 1.3 specification for CEC over AUX support. V2: Add DP_ prefix to all defines. V3: missed prefixes from the ESI1 defines Cc: Jani Nikula <jani.nikula@linux.intel.com> Reviewed-by: NJani Nikula <jani.nikula@intel.com> Signed-off-by: NClint Taylor <clinton.a.taylor@intel.com> Signed-off-by: NJani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1492703263-11494-1-git-send-email-clinton.a.taylor@intel.com
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- 20 4月, 2017 1 次提交
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由 Navare, Manasi D 提交于
Display stream compression is supported on DP 1.4 DP devices. This patch adds the corersponding DPCD register definitions for DSC. v4: * Add DSC Enable DPCD register def (Ander) v3: * Add some SHIFTS and MASKS for uniformity (Jani Nikula) v2: * Rebased on drm-tip Signed-off-by: NManasi Navare <manasi.d.navare@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: dri-devel@lists.freedesktop.org Signed-off-by: NJani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1491259870-25613-1-git-send-email-manasi.d.navare@intel.com
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- 07 3月, 2017 2 次提交
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由 Tomeu Vizoso 提交于
Adds helpers for starting and stopping capture of frame CRCs through the DPCD. When capture is on, a worker waits for vblanks and retrieves the frame CRC to put it in the queue on the CRTC that is using the eDP connector, so it's passed to userspace. v2: Reuse drm_crtc_wait_one_vblank Update locking, as drm_crtc_add_crc_entry now takes the lock v3: Don't call wake_up_interruptible directly, that's now done in drm_crtc_add_crc_entry. v4: Style fixes (Sean Paul) Reworked retry of CRC reads (Sean Paul) Flush worker after stopping CRC generationa (Sean Paul) v5: Move back to make the retry explicitly once v6: Set and use the drm_crtc backpointer (Sean Paul) Signed-off-by: NTomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: NSean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/20170303133936.14964-3-tomeu.vizoso@collabora.com
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由 Tomeu Vizoso 提交于
This backpointer allows DP helpers to access the crtc it's currently being used for. v6: Have the backpointer be to drm_crtc (Sean Paul) Signed-off-by: NTomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: NSean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/20170303133936.14964-2-tomeu.vizoso@collabora.com
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- 26 1月, 2017 1 次提交
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由 Manasi Navare 提交于
v4: * Remove redundant single bit defs (Jani Nikula) v3: * Fix the conventions in bit definitions (Jani Nikula) v2: * Add all the other DP Complianec TEST register defs (Jani Nikula) Cc: dri-devel@lists.freedesktop.org Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Signed-off-by: NManasi Navare <manasi.d.navare@intel.com> Signed-off-by: NJani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1484968170-12467-4-git-send-email-manasi.d.navare@intel.com
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- 11 1月, 2017 1 次提交
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由 Nagaraju, Vathsala 提交于
PSR2 vsc revision number hb2( as per table 6-11)is updated to 4 or 5 based on Y cordinate and Colorimetry Format as below 04h = 3D stereo + PSR/PSR2 + Y-coordinate. 05h = -3D stereo- + PSR/PSR2 + Y-coordinate + Pixel Encoding/Colorimetry Format indication. A DP Source device is allowed to indicate the pixel encoding/colorimetry format to the DP Sink device with VSC SDP only when the DP Sink device supports it ( i.e.,VSC_SDP_EXTENSION_FOR_COLORIMETRY_SUPPORTED bit in the DPRX_FEATURE_ENUMERATION_LIST register (DPCD Address 02210h, bit 3; is set to 1). v2: (Jani) - Change DP_PSR_Y_COORDINATE to DP_PSR2_SU_Y_COORDINATE_REQUIRED. - Add DP_PSR2_SU_GRANULARITY_REQUIRED. - Change DPRX_FEATURE_ENUMERATION_LIST to DP_DPRX. - Add GTC_CAP and AV_SYNC_CAP, other bits in DPRX_FEATURE_ENUMERATION_LIST. v3: (Jani) - Add support for bits 7:4 and 1 as per DP v1.4 for DPRX_FEATURE_ENUMERATION_LIST. Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Jim Bride <jim.bride@linux.intel.com> Signed-off-by: NVathsala Nagaraju <vathsala.nagaraju@intel.com> Signed-off-by: NPatil Deepti <deepti.patil@intel.com> Reviewed-by: NJani Nikula <jani.nikula@intel.com> Signed-off-by: NRodrigo Vivi <rodrigo.vivi@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1483356663-32668-2-git-send-email-vathsala.nagaraju@intel.com
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- 26 10月, 2016 1 次提交
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由 Imre Deak 提交于
This check is open-coded in a few places, so it makes sense to simplify things by having a helper for it similar to the rest of DPCD feature helpers. v2: (Jani) - Move the helper to drm_dp_helper.h. - Split out this change to a separate patch. Cc: Jani Nikula <jani.nikula@intel.com> Cc: dri-devel@lists.freedesktop.org Signed-off-by: NImre Deak <imre.deak@intel.com> Reviewed-by: NJani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1477326811-30431-2-git-send-email-imre.deak@intel.com
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- 25 10月, 2016 1 次提交
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由 Imre Deak 提交于
This check is open-coded in a few places, so it makes sense to simplify things by having a helper for it similar to the rest of DPCD feature helpers. v2: (Jani) - Move the helper to drm_dp_helper.h. - Split out this change to a separate patch. Cc: Jani Nikula <jani.nikula@intel.com> Cc: dri-devel@lists.freedesktop.org Signed-off-by: NImre Deak <imre.deak@intel.com> Reviewed-by: NJani Nikula <jani.nikula@intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1477326811-30431-2-git-send-email-imre.deak@intel.com
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- 15 9月, 2016 2 次提交
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由 Mika Kahola 提交于
Read DisplayPort branch device info from through debugfs interface. v2: use drm_dp_helper routines to collect data v3: cleanup to match the drm_dp_helper.c patches introduced earlier in this series v4: move DP branch device info to function 'intel_dp_branch_device_info()' v5: initial step to move debugging info from intel_dp. to drm_dp_helper.c (Daniel) v6: read hw and sw revision without using specific drm_dp_helper routines v7: indentation fixes (Jim Bride) Signed-off-by: NMika Kahola <mika.kahola@intel.com> Reviewed-by: NJim Bride <jim.bride@linux.intel.com> Signed-off-by: NJani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1473419458-17080-12-git-send-email-mika.kahola@intel.com
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由 Mika Kahola 提交于
SW revision is mandatory field for DisplayPort branch devices. This is defined in DPCD register fields 0x50A and 0x50B. v2: move drm_dp_ds_revision structure to be part of drm_dp_link structure (Daniel) v3: remove dependency to drm_dp_helper but instead parse DPCD and print SW revision info to dmesg (Ville) v4: commit message fix (Jim Bride) Signed-off-by: NMika Kahola <mika.kahola@intel.com> Reviewed-by: NJim Bride <jim.bride@linux.intel.com> Signed-off-by: NJani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1473419458-17080-9-git-send-email-mika.kahola@intel.com
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