1. 03 8月, 2012 2 次提交
  2. 22 6月, 2012 1 次提交
  3. 04 6月, 2012 1 次提交
  4. 11 4月, 2012 1 次提交
  5. 14 12月, 2011 1 次提交
  6. 24 8月, 2011 1 次提交
    • K
      USB: use usb_endpoint_maxp() instead of le16_to_cpu() · 29cc8897
      Kuninori Morimoto 提交于
      Now ${LINUX}/drivers/usb/* can use usb_endpoint_maxp(desc) to get maximum packet size
      instead of le16_to_cpu(desc->wMaxPacketSize).
      This patch fix it up
      
      Cc: Armin Fuerst <fuerst@in.tum.de>
      Cc: Pavel Machek <pavel@ucw.cz>
      Cc: Johannes Erdfelt <johannes@erdfelt.com>
      Cc: Vojtech Pavlik <vojtech@suse.cz>
      Cc: Oliver Neukum <oliver@neukum.name>
      Cc: David Kubicek <dave@awk.cz>
      Cc: Johan Hovold <jhovold@gmail.com>
      Cc: Brad Hards <bhards@bigpond.net.au>
      Acked-by: NFelipe Balbi <balbi@ti.com>
      Cc: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
      Cc: Thomas Dahlmann <dahlmann.thomas@arcor.de>
      Cc: David Brownell <david-b@pacbell.net>
      Cc: David Lopo <dlopo@chipidea.mips.com>
      Cc: Alan Stern <stern@rowland.harvard.edu>
      Cc: Michal Nazarewicz <m.nazarewicz@samsung.com>
      Cc: Xie Xiaobo <X.Xie@freescale.com>
      Cc: Li Yang <leoli@freescale.com>
      Cc: Jiang Bo <tanya.jiang@freescale.com>
      Cc: Yuan-hsin Chen <yhchen@faraday-tech.com>
      Cc: Darius Augulis <augulis.darius@gmail.com>
      Cc: Xiaochen Shen <xiaochen.shen@intel.com>
      Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
      Cc: OKI SEMICONDUCTOR, <toshiharu-linux@dsn.okisemi.com>
      Cc: Robert Jarzmik <robert.jarzmik@free.fr>
      Cc: Ben Dooks <ben@simtec.co.uk>
      Cc: Thomas Abraham <thomas.ab@samsung.com>
      Cc: Herbert Pötzl <herbert@13thfloor.at>
      Cc: Arnaud Patard <arnaud.patard@rtp-net.org>
      Cc: Roman Weissgaerber <weissg@vienna.at>
      Acked-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      Cc: Tony Olech <tony.olech@elandigitalsystems.com>
      Cc: Florian Floe Echtler <echtler@fs.tum.de>
      Cc: Christian Lucht <lucht@codemercs.com>
      Cc: Juergen Stuber <starblue@sourceforge.net>
      Cc: Georges Toth <g.toth@e-biz.lu>
      Cc: Bill Ryder <bryder@sgi.com>
      Cc: Kuba Ober <kuba@mareimbrium.org>
      Cc: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
      Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      29cc8897
  7. 09 6月, 2011 1 次提交
  8. 13 5月, 2011 2 次提交
  9. 07 5月, 2011 1 次提交
  10. 05 2月, 2011 1 次提交
  11. 01 2月, 2011 1 次提交
    • F
      usb: musb: disable double buffering when it's broken · 06624818
      Felipe Balbi 提交于
      We know that blackfin doesn't support double
      buffering feature as of today. So we add a
      flag set by musb_platform_init() to forcefully
      disable that feature.
      
      Such flag is created and marked as deprecated
      to force us to find a solution for the missing
      double buffering support on blackfin.
      Signed-off-by: NFelipe Balbi <balbi@ti.com>
      06624818
  12. 23 10月, 2010 2 次提交
  13. 25 9月, 2010 1 次提交
  14. 01 5月, 2010 1 次提交
  15. 19 3月, 2010 1 次提交
  16. 03 3月, 2010 2 次提交
  17. 12 12月, 2009 1 次提交
  18. 01 12月, 2009 1 次提交
  19. 13 7月, 2009 2 次提交
  20. 16 6月, 2009 7 次提交
  21. 18 4月, 2009 5 次提交
    • S
      USB: musb: fix isochronous TXDMA (take 2) · 6b6e9710
      Sergei Shtylyov 提交于
      Multi-frame isochronous TX URBs transfers in DMA mode never
      complete with CPPI DMA because musb_host_tx() doesn't restart
      DMA on the second frame, only emitting a debug message.
      With Inventra DMA they complete, but in PIO mode.  To fix:
      
       - Factor out programming of the DMA transfer from
         musb_ep_program() into musb_tx_dma_program();
      
       - Reorder the code at the end of musb_host_tx() to
         facilitate the fallback to PIO iff DMA fails;
      
       - Handle the buffer offset consistently for both
         PIO and DMA modes;
      
       - Add an argument to musb_ep_program() for the same
         reason (it only worked correctly with non-zero
         offset of the first frame in PIO mode);
      
       - Set the completed isochronous frame descriptor's
         'actual_length' and 'status' fields correctly in
         DMA mode.
      
      Also, since CPPI reportedly doesn't like sending isochronous
      packets in the RNDIS mode, change the criterion for this
      mode to be used only for multi-packet transfers.  (There's
      no need for that mode in the single-packet case anyway.)
      
      [ dbrownell@users.sourceforge.net: split comment paragraph
      into bullet list, shrink patch delta, style tweaks ]
      Signed-off-by: NPavel Kiryukhin <pkiryukhin@ru.mvista.com>
      Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>
      Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      6b6e9710
    • S
      USB: musb: sanitize clearing TXCSR DMA bits (take 2) · b6e434a5
      Sergei Shtylyov 提交于
      The MUSB code clears TXCSR_DMAMODE incorrectly in several
      places, either asserting that TXCSR_DMAENAB is clear (when
      sometimes it isn't) or clearing both bits together.  Recent
      versions of the programmer's guide require DMAENAB to be
      cleared first, although some older ones didn't.
      
      Fix this and while at it:
      
       - In musb_gadget::txstate(), stop clearing the AUTOSET
         and DMAMODE bits for the CPPI case since they never
         get set anyway (the former bit is reserved on DaVinci);
         but do clear the DMAENAB bit on the DMA error path.
      
       - In musb_host::musb_ep_program(), remove the duplicate
         DMA controller specific code code clearing the TXCSR
         previous state, add the code to clear TXCSR DMA bits
         on the Inventra DMA error path, to replace such code
         (executed late) on the PIO path.
      
       - In musbhsdma::dma_channel_abort()/dma_controller_irq(),
         add/use the 'offset' variable to avoid MUSB_EP_OFFSET()
         invocations on every RXCSR/TXCSR access.
      
      [dbrownell@users.sourceforge.net: don't introduce CamelCase,
      shrink diff]
      Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>
      Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      b6e434a5
    • S
      USB: musb: bugfixes for multi-packet TXDMA support · c7bbc056
      Sergei Shtylyov 提交于
      We really want to use DMA mode 1 for all multi-packet transfers;
      that's one IRQ on DMA completion, instead of one per packet.
      
      There is an important issue with such transfers, especially on
      the host side:  when such transfers end with a full-size packet,
      we must defer musb_dma_completion() calls until the FIFO empties.
      Else we report URB completions too soon, and may clobber data in
      the FIFO fifo when writing the next packet (losing data).
      
      The Inventra DMA support uses DMA mode 1, but it ignores that
      issue.  The CPPI DMA support uses mode 0, but doesn't handle
      its TXPKTRDY interrupts quite right either; it can get stale
      "packet ready" interrupts, and report transfer completion too
      early using slightly different code paths, also losing data.
      
      So I'm solving it in a generic way -- by adding a sort of the
      "interrupt filter" into musb_host_tx(), catching these cases
      where a DMA completion IRQ doesn't suffice and removing some
      needlessly controller-specific logic.  When a TXDMA interrupt
      happens and DMA request mode 1 is active, that filter resets
      to mode 0 and defers URB completion processing until TXPKTRDY,
      unless the FIFO is already empty.  Related filtering logic in
      Inventra and CPPI code gets removed.
      
      Since it should be competely safe now to use the DMA request
      mode 1 for host side transfers with the CPPI DMA controller,
      set it in musb_h_tx_dma_start() ... now renamed (and shared).
      
      [ dbrownell@users.sourceforge.net: don't introduce more
      CamElCase; use more concise explanations ]
      Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>
      Cc: Felipe Balbi <felipe.balbi@nokia.com>
      Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      c7bbc056
    • D
      USB: musb_host, fix ep0 fifo flushing · 78322c1a
      David Brownell 提交于
      The MUSB host side can't share generic TX FIFO flush logic
      with EP0; the EP0 TX status register bits are different
      from those for other entpoints.
      
      Resolve this issue by providing a new EP0-specific routine
      to flush and reset the FIFO, which pays careful attention to
      restrictions listed in the latest programmer's guide.  This
      gets rid of an open issue whereby the usbtest control write
      test (#14) failed.
      Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      78322c1a
    • D
      USB: musb_host, minor enqueue locking fix (v2) · 74bb3508
      David Brownell 提交于
      Someone noted that the enqueue path used an unlocked access
      for usb_host_endpoint->hcpriv ... fix that, by being safe
      and always accessing it under spinlock protection.
      Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      74bb3508
  22. 25 3月, 2009 2 次提交
    • A
      USB: musb: NAK timeout scheme on bulk RX endpoint · 1e0320f0
      Ajay Kumar Gupta 提交于
      Fixes endpoint starvation issue when more than one bulk QH is
      multiplexed on the reserved bulk RX endpoint, which is normal
      for cases like serial and ethernet adapters.
      
      This patch sets the NAK timeout interval for such QHs, and when
      a timeout triggers the next QH will be scheduled.  (This resembles
      the bulk scheduling done in hardware by EHCI, OHCI, and UHCI.)
      
      This scheme doesn't work for devices which are connected to a
      high to full speed tree (transaction translator) as there is
      no NAK timeout interrupt from the musb controller from such
      devices.
      
      Tested with PIO, Inventra DMA, CPPI DMA.
      
      [ dbrownell@users.sourceforge.net:  fold in start_urb() update;
        clarify only for bulk RX; don't accidentally clear WZC bits ]
      Signed-off-by: NAjay Kumar Gupta <ajay.gupta@ti.com>
      Cc: Felipe Balbi <felipe.balbi@nokia.com>
      Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      1e0320f0
    • S
      USB: musb: rewrite host periodic endpoint allocation · 5d67a851
      Sergei Shtylyov 提交于
      The current MUSB host code doesn't make use of all the available
      FIFOs in for periodic transfers since it wrongly assumes the RX
      and TX sides of any given hw_ep always share one FIFO.
      
      Change:  use 'in_qh' and 'out_qh' fields of the 'struct musb_hw_ep'
      to check the endpoint's business; get rid of the now-unused 'periodic'
      array in the 'struct musb'.  Also optimize a loop induction variable
      in the endpoint lookup code.
      
      (Based on a previous patch from Ajay Kumar Gupta <ajay.gupta@ti.com>)
      
      [ dbrownell@users.sourceforge.net: clarify description and origin
        of this fix; whitespace ]
      Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>
      Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
      Cc: Felipe Balbi <felipe.balbi@nokia.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      5d67a851
  23. 28 2月, 2009 2 次提交