1. 04 5月, 2019 28 次提交
  2. 03 5月, 2019 12 次提交
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      Merge branch 'NXP-SJA1105-DSA-driver' · 8ef988b9
      David S. Miller 提交于
      Vladimir Oltean says:
      
      ====================
      NXP SJA1105 DSA driver
      
      This patchset adds a DSA driver for the SPI-controlled NXP SJA1105
      switch.  Due to the hardware's unfriendliness, most of its state needs
      to be shadowed in kernel memory by the driver. To support this and keep
      a decent amount of cleanliness in the code, a new generic API for
      converting between CPU-accessible ("unpacked") structures and
      hardware-accessible ("packed") structures is proposed and used.
      
      The driver is GPL-2.0 licensed. The source code files which are licensed
      as BSD-3-Clause are hardware support files and derivative of the
      userspace NXP sja1105-tool program, which is BSD-3-Clause licensed.
      
      TODO items:
      * Add support for traffic.
      * Add full support for the P/Q/R/S series. The patches were mostly
        tested on a first-generation T device.
      * Add timestamping support and PTP clock manipulation.
      * Figure out how the tc-taprio hardware offload that was just proposed
        by Vinicius can be used to configure the switch's time-aware scheduler.
      * Rework link state callbacks to use phylink once the SGMII port
        is supported.
      
      Changes in v5:
      1. Removed trailing empty lines at the end of files.
      2. Moved the lib/packing.c file under a CONFIG_PACKING option instead of
         having it always built-in. The module is GPL licensed, which applies
         to its distribution in binary form, but the code is dual-licensed
         which means it can be used in projects with other licenses as well.
      3. Made SJA1105 driver select CONFIG_PACKING and CONFIG_CRC32.
      
      v4 patchset can be found at:
      https://lwn.net/Articles/787077/
      
      Changes in v4:
      1. Previous patchset was broken apart, and for the moment the driver is
         configuring the switch as unmanaged. Support for regular and management
         traffic, as well as for PTP timestamping, will be submitted once the
         basic driver is accepted. Some core DSA patches were also broken out
         of the series, and are a dependency for this series:
         https://patchwork.ozlabs.org/project/netdev/list/?series=105069
      2. Addressed Jiri Pirko's feedback about too generic function and macro
         naming.
      3. Re-introduced ETH_P_DSA_8021Q.
      
      v3 patchset can be found at:
      https://lkml.org/lkml/2019/4/12/978
      
      Changes in v3:
      1. Removed the patch for a dedicated Ethertype to use with 802.1Q DSA
         tagging
      2. Changed the SJA1105 switch tagging protocol sysfs label from
         "sja1105" to "8021q" to denote to users such as tcpdump that the
         structure is more generic.
      3. Respun previous patch "net: dsa: Allow drivers to modulate between
         presence and absence of tagging". Current equivalent patch is called
         "net: dsa: Allow drivers to filter packets they can decode source
         port from" and at least allows reception of management traffic during
         the time when switch tagging is not enabled.
      4. Added DSA-level fixes for the bridge core not unsetting
         vlan_filtering when ports leave. The global VLAN filtering is treated
         as a special case. Made the mt7530 driver use this. This patch
         benefits the SJA1105 because otherwise traffic in standalone mode
         would no longer work after removing the ports from a vlan_filtering
         bridge, since the driver and the hardware would be in an inconsistent
         state.
      5. Restructured the documentation as rst. This depends upon the recently
         submitted "[PATCH net-next] Documentation: net: dsa: transition to
         the rst format": https://patchwork.ozlabs.org/patch/1084658/.
      
      v2 patchset can be found at:
      https://www.spinics.net/lists/netdev/msg563454.html
      
      Changes in v2:
      1. Device ID is no longer auto-detected but enforced based on explicit DT
         compatible string. This helps with stricter checking of DT bindings.
      2. Group all device-specific operations into a sja1105_info structure and
         avoid using the IS_ET() and IS_PQRS() macros at runtime as much as possible.
      3. Added more verbiage to commit messages and documentation.
      4. Treat the case where RGMII internal delays are requested through DT bindings
         and return error.
      5. Miscellaneous cosmetic cleanup in sja1105_clocking.c
      6. Not advertising link features that are not supported, such as pause frames
         and the half duplex modes.
      7. Fixed a mistake in previous patchset where the switch tagging was not
         actually enabled (lost during a rebase). This brought up another uncaught
         issue where switching at runtime between tagging and no-tagging was not
         supported by DSA. Fixed up the mistake in "net: dsa: sja1105: Add support
         for traffic through standalone ports", and added the new patch "net: dsa:
         Allow drivers to modulate between presence and absence of tagging" to
         address the other issue.
      8. Added a workaround for switch resets cutting a frame in the middle of
         transmission, which would throw off some link partners.
      9. Changed the TPID from ETH_P_EDSA (0xDADA) to a newly introduced one:
         ETH_P_DSA_8021Q (0xDADB). Uncovered another mistake in the previous patchset
         with a missing ntohs(), which was not caught because 0xDADA is
         endian-agnostic.
      10. Made NET_DSA_TAG_8021Q select VLAN_8021Q
      11. Renamed __dsa_port_vlan_add to dsa_port_vid_add and not to
          dsa_port_vlan_add_trans, as suggested, because the corresponding _del function
          does not have a transactional phase and the naming is more uniform this way.
      
      v1 patchset can be found at:
      https://www.spinics.net/lists/netdev/msg561589.html
      
      Changes from RFC:
      1. Removed the packing code for the static configuration tables that were
         not currently used
      2. Removed the code for unpacking a static configuration structure from
         a memory buffer (not used)
      3. Completely removed the SGMII stubs, since the configuration is not
         complete anyway.
      4. Moved some code from the SJA1105 introduction commit into the patch
         that used it.
      5. Made the code for checking global VLAN filtering generic and made b53
         driver use it.
      6. Made mt7530 driver use the new generic dp->vlan_filtering
      7. Fixed check for stringset in .get_sset_count
      8. Minor cleanup in sja1105_clocking.c
      9. Fixed a confusing typo in DSA
      
      RFC can be found at:
      https://www.mail-archive.com/netdev@vger.kernel.org/msg291717.html
      ====================
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      8ef988b9
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      net: dsa: sja1105: Reject unsupported link modes for AN · ad9f299a
      Vladimir Oltean 提交于
      Ethernet flow control:
      
      The switch MAC does not consume, nor does it emit pause frames. It
      simply forwards them as any other Ethernet frame (and since the DMAC is,
      per IEEE spec, 01-80-C2-00-00-01, it means they are filtered as
      link-local traffic and forwarded to the CPU, which can't do anything
      useful with them).
      
      Duplex:
      
      There is no duplex setting in the SJA1105 MAC. It is known to forward
      traffic at line rate on the same port in both directions. Therefore it
      must be that it only supports full duplex.
      Signed-off-by: NVladimir Oltean <olteanv@gmail.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      ad9f299a
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      net: dsa: sja1105: Prevent PHY jabbering during switch reset · 1a4c6940
      Vladimir Oltean 提交于
      Resetting the switch at runtime is currently done while changing the
      vlan_filtering setting (due to the required TPID change).
      
      But reset is asynchronous with packet egress, and the switch core will
      not wait for egress to finish before carrying on with the reset
      operation.
      
      As a result, a connected PHY such as the BCM5464 would see an
      unterminated Ethernet frame and start to jabber (repeat the last seen
      Ethernet symbols - jabber is by definition an oversized Ethernet frame
      with bad FCS). This behavior is strange in itself, but it also causes
      the MACs of some link partners (such as the FRDM-LS1012A) to completely
      lock up.
      
      So as a remedy for this situation, when switch reset is required, simply
      inhibit Tx on all ports, and wait for the necessary time for the
      eventual one frame left in the egress queue (not even the Tx inhibit
      command is instantaneous) to be flushed.
      Signed-off-by: NVladimir Oltean <olteanv@gmail.com>
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      1a4c6940
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      net: dsa: sja1105: Add support for configuring address ageing time · 8456721d
      Vladimir Oltean 提交于
      If STP is active, this setting is applied on bridged ports each time an
      Ethernet link is established (topology changes).
      
      Since the setting is global to the switch and a reset is required to
      change it, resets are prevented if the new callback does not change the
      value that the hardware already is programmed for.
      Signed-off-by: NVladimir Oltean <olteanv@gmail.com>
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      8456721d
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      net: dsa: sja1105: Add support for VLAN operations · 6666cebc
      Vladimir Oltean 提交于
      VLAN filtering cannot be properly disabled in SJA1105. So in order to
      emulate the "no VLAN awareness" behavior (not dropping traffic that is
      tagged with a VID that isn't configured on the port), we need to hack
      another switch feature: programmable TPID (which is 0x8100 for 802.1Q).
      We are reprogramming the TPID to a bogus value which leaves the switch
      thinking that all traffic is untagged, and therefore accepts it.
      
      Under a vlan_filtering bridge, the proper TPID of ETH_P_8021Q is
      installed again, and the switch starts identifying 802.1Q-tagged
      traffic.
      Signed-off-by: NVladimir Oltean <olteanv@gmail.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      6666cebc
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      ether: Add dedicated Ethertype for pseudo-802.1Q DSA tagging · bf5bc3ce
      Vladimir Oltean 提交于
      There are two possible utilizations so far:
      
      - Switch devices that don't support a native insertion/extraction header
        on the CPU port may still enjoy the benefits of port isolation with a
        custom VLAN tag.
      
        For this, they need to have a customizable TPID in hardware and a new
        Ethertype to distinguish between real 802.1Q traffic and the private
        tags used for port separation.
      
      - Switches that don't support the deactivation of VLAN awareness, but
        still want to have a mode in which they accept all traffic, including
        frames that are tagged with a VLAN not configured on their ports, may
        use this as a fake to trick the hardware into thinking that the TPID
        for VLAN is something other than 0x8100.
      
      What follows after the ETH_P_DSA_8021Q EtherType is a regular VLAN
      header (TCI), however there is no other EtherType that can be used for
      this purpose and doesn't already have a well-defined meaning.
      ETH_P_8021AD, ETH_P_QINQ1, ETH_P_QINQ2 and ETH_P_QINQ3 expect that
      another follow-up VLAN tag is present, which is not the case here.
      Signed-off-by: NVladimir Oltean <olteanv@gmail.com>
      Suggested-by: NAndrew Lunn <andrew@lunn.ch>
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      bf5bc3ce
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      net: dsa: sja1105: Error out if RGMII delays are requested in DT · f5b8631c
      Vladimir Oltean 提交于
      Documentation/devicetree/bindings/net/ethernet.txt is confusing because
      it says what the MAC should not do, but not what it *should* do:
      
        * "rgmii-rxid" (RGMII with internal RX delay provided by the PHY, the MAC
           should not add an RX delay in this case)
      
      The gap in semantics is threefold:
      1. Is it illegal for the MAC to apply the Rx internal delay by itself,
         and simplify the phy_mode (mask off "rgmii-rxid" into "rgmii") before
         passing it to of_phy_connect? The documentation would suggest yes.
      1. For "rgmii-rxid", while the situation with the Rx clock skew is more
         or less clear (needs to be added by the PHY), what should the MAC
         driver do about the Tx delays? Is it an implicit wild card for the
         MAC to apply delays in the Tx direction if it can? What if those were
         already added as serpentine PCB traces, how could that be made more
         obvious through DT bindings so that the MAC doesn't attempt to add
         them twice and again potentially break the link?
      3. If the interface is a fixed-link and therefore the PHY object is
         fixed (a purely software entity that obviously cannot add clock
         skew), what is the meaning of the above property?
      
      So an interpretation of the RGMII bindings was chosen that hopefully
      does not contradict their intention but also makes them more applied.
      The SJA1105 driver understands to act upon "rgmii-*id" phy-mode bindings
      if the port is in the PHY role (either explicitly, or if it is a
      fixed-link). Otherwise it always passes the duty of setting up delays to
      the PHY driver.
      
      The error behavior that this patch adds is required on SJA1105E/T where
      the MAC really cannot apply internal delays. If the other end of the
      fixed-link cannot apply RGMII delays either (this would be specified
      through its own DT bindings), then the situation requires PCB delays.
      
      For SJA1105P/Q/R/S, this is however hardware supported and the error is
      thus only temporary. I created a stub function pointer for configuring
      delays per-port on RXC and TXC, and will implement it when I have access
      to a board with this hardware setup.
      
      Meanwhile do not allow the user to select an invalid configuration.
      Signed-off-by: NVladimir Oltean <olteanv@gmail.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      f5b8631c
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      net: dsa: sja1105: Add support for FDB and MDB management · 291d1e72
      Vladimir Oltean 提交于
      Currently only the (more difficult) first generation E/T series is
      supported. Here the TCAM is only 4-way associative, and to know where
      the hardware will search for a FDB entry, we need to perform the same
      hash algorithm in order to install the entry in the correct bin.
      
      On P/Q/R/S, the TCAM should be fully associative. However the SPI
      command interface is different, and because I don't have access to a
      new-generation device at the moment, support for it is TODO.
      Signed-off-by: NVladimir Oltean <olteanv@gmail.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      291d1e72
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      net: dsa: Introduce driver for NXP SJA1105 5-port L2 switch · 8aa9ebcc
      Vladimir Oltean 提交于
      At this moment the following is supported:
      * Link state management through phylib
      * Autonomous L2 forwarding managed through iproute2 bridge commands.
      
      IP termination must be done currently through the master netdevice,
      since the switch is unmanaged at this point and using
      DSA_TAG_PROTO_NONE.
      Signed-off-by: NVladimir Oltean <olteanv@gmail.com>
      Signed-off-by: NGeorg Waibel <georg.waibel@sensor-technik.de>
      Acked-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      8aa9ebcc