1. 11 5月, 2015 3 次提交
  2. 10 5月, 2015 1 次提交
  3. 09 5月, 2015 4 次提交
  4. 08 5月, 2015 1 次提交
  5. 06 5月, 2015 4 次提交
  6. 05 5月, 2015 12 次提交
  7. 04 5月, 2015 7 次提交
  8. 01 5月, 2015 8 次提交
    • S
      powerpc/powernv: Restore non-volatile CRs after nap · 0aab3747
      Sam Bobroff 提交于
      Patches 7cba160a "powernv/cpuidle: Redesign idle states management"
      and 77b54e9f "powernv/powerpc: Add winkle support for offline cpus"
      use non-volatile condition registers (cr2, cr3 and cr4) early in the system
      reset interrupt handler (system_reset_pSeries()) before it has been determined
      if state loss has occurred. If state loss has not occurred, control returns via
      the power7_wakeup_noloss() path which does not restore those condition
      registers, leaving them corrupted.
      
      Fix this by restoring the condition registers in the power7_wakeup_noloss()
      case.
      
      This is apparent when running a KVM guest on hardware that does not
      support winkle or sleep and the guest makes use of secondary threads. In
      practice this means Power7 machines, though some early unreleased Power8
      machines may also be susceptible.
      
      The secondary CPUs are taken off line before the guest is started and
      they call pnv_smp_cpu_kill_self(). This checks support for sleep
      states (in this case there is no support) and power7_nap() is called.
      
      When the CPU is woken, power7_nap() returns and because the CPU is
      still off line, the main while loop executes again. The sleep states
      support test is executed again, but because the tested values cannot
      have changed, the compiler has optimized the test away and instead we
      rely on the result of the first test, which has been left in cr3
      and/or cr4. With the result overwritten, the wrong branch is taken and
      power7_winkle() is called on a CPU that does not support it, leading
      to it stalling.
      
      Fixes: 7cba160a ("powernv/cpuidle: Redesign idle states management")
      Fixes: 77b54e9f ("powernv/powerpc: Add winkle support for offline cpus")
      [mpe: Massage change log a bit more]
      Signed-off-by: NSam Bobroff <sam.bobroff@au1.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      0aab3747
    • G
      powerpc/eeh: Delay probing EEH device during hotplug · d91dafc0
      Gavin Shan 提交于
      Commit 1c509148b ("powerpc/eeh: Do probe on pci_dn") probes EEH
      devices in early stage, which is reasonable to pSeries platform.
      However, it's wrong for PowerNV platform because the PE# isn't
      determined until the resources (IO and MMIO) are assigned to
      PE in hotplug case. So we have to delay probing EEH devices
      for PowerNV platform until the PE# is assigned.
      
      Fixes: ff57b454 ("powerpc/eeh: Do probe on pci_dn")
      Signed-off-by: NGavin Shan <gwshan@linux.vnet.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      d91dafc0
    • G
      powerpc/eeh: Fix race condition in pcibios_set_pcie_reset_state() · 1ae79b78
      Gavin Shan 提交于
      When asserting reset in pcibios_set_pcie_reset_state(), the PE
      is enforced to (hardware) frozen state in order to drop unexpected
      PCI transactions (except PCI config read/write) automatically by
      hardware during reset, which would cause recursive EEH error.
      However, the (software) frozen state EEH_PE_ISOLATED is missed.
      When users get 0xFF from PCI config or MMIO read, EEH_PE_ISOLATED
      is set in PE state retrival backend. Unfortunately, nobody (the
      reset handler or the EEH recovery functinality in host) will clear
      EEH_PE_ISOLATED when the PE has been passed through to guest.
      
      The patch sets and clears EEH_PE_ISOLATED properly during reset
      in function pcibios_set_pcie_reset_state() to fix the issue.
      
      Fixes: 28158cd1 ("Enhance pcibios_set_pcie_reset_state()")
      Reported-by: NCarol L. Soto <clsoto@us.ibm.com>
      Signed-off-by: NGavin Shan <gwshan@linux.vnet.ibm.com>
      Tested-by: NCarol L. Soto <clsoto@us.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      1ae79b78
    • N
      powerpc/pseries: Correct cpu affinity for dlpar added cpus · f32393c9
      Nathan Fontenot 提交于
      The incorrect ordering of operations during cpu dlpar add results in invalid
      affinity for the cpu being added. The ibm,associativity property in the
      device tree is populated with all zeroes for the added cpu which results in
      invalid affinity mappings and all cpus appear to belong to node 0.
      
      This occurs because rtas configure-connector is called prior to making the
      rtas set-indicator calls. Phyp does not assign affinity information
      for a cpu until the rtas set-indicator calls are made to set the isolation
      and allocation state.
      
      Correct the order of operations to make the rtas set-indicator
      calls (done in dlpar_acquire_drc) before calling rtas configure-connector.
      
      Fixes: 1a8061c4 ("powerpc/pseries: Add kernel based CPU DLPAR handling")
      Signed-off-by: NNathan Fontenot <nfont@linux.vnet.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      f32393c9
    • L
      ARM: shmobile: koelsch: Fix adv7511 IRQ sensing · 12392f58
      Laurent Pinchart 提交于
      The adv7511 IRQ is low level triggered, not falling edge triggered. The
      wrong sense configuration results in no interrupt being triggered at
      all, breaking hotplug detection. Fix it.
      Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
      Fixes: 83a0731b ("ARM: shmobile: koelsch: Add DU HDMI output support")
      Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
      12392f58
    • R
      ARM: pxa: lubbock: use new pxa_cplds driver · fc9e38c0
      Robert Jarzmik 提交于
      As the interrupt handling was transferred to the pxa_cplds driver,
      make the switch in lubbock platform code.
      
      Fixes: 157d2644 ("ARM: pxa: change gpio to platform device")
      Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
      Acked-by: NArnd Bergmann <arnd@arndb.de>
      fc9e38c0
    • R
      ARM: pxa: mainstone: use new pxa_cplds driver · 27768863
      Robert Jarzmik 提交于
      As the interrupt handling was transferred to the pxa_cplds driver,
      make the switch in mainstone platform code.
      
      Fixes: 157d2644 ("ARM: pxa: change gpio to platform device")
      Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
      Acked-by: NArnd Bergmann <arnd@arndb.de>
      27768863
    • R
      ARM: pxa: pxa_cplds: add lubbock and mainstone IO · aa8d6b73
      Robert Jarzmik 提交于
      Historically, this support was in arch/arm/mach-pxa/lubbock.c and
      arch/arm/mach-pxa/mainstone.c. When gpio-pxa was moved to drivers/pxa,
      it became a driver, and its initialization and probing happened at
      postcore initcall. The lubbock code used to install the chained lubbock
      interrupt handler at init_irq() time.
      
      The consequence of the gpio-pxa change is that the installed chained irq
      handler lubbock_irq_handler() was overwritten in pxa_gpio_probe(_dt)(),
      removing :
       - the handler
       - the falling edge detection setting of GPIO0, which revealed the
         interrupt request from the lubbock IO board.
      
      As a fix, move the gpio0 chained handler setup to a place where we have
      the guarantee that pxa_gpio_probe() was called before, so that lubbock
      handler becomes the true IRQ chained handler of GPIO0, demuxing the
      lubbock IO board interrupts.
      
      This patch moves all that handling to a mfd driver. It's only purpose
      for the time being is the interrupt handling, but in the future it
      should encompass all the motherboard CPLDs handling :
       - leds
       - switches
       - hexleds
      
      The same logic applies to mainstone board.
      
      Fixes: 157d2644 ("ARM: pxa: change gpio to platform device")
      Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
      Acked-by: NArnd Bergmann <arnd@arndb.de>
      aa8d6b73