- 12 6月, 2019 19 次提交
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由 Russell King 提交于
The irq_startup() method returns an unsigned int, but in __irq_startup() it is assigned to an int. However, nothing checks for errors, so any error that is returned is ignored. Remove the check for GPIO-input mode and the error return. Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk> Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk> Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Russell King 提交于
We must never alter the register tables; these are read-only as far as the driver is concerned. Constify these tables. Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk> Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Russell King 提交于
Use local variables to store the base iomem address and regs table pointer like omap_gpio_init_context() does. Not only does this make the function neater, it also avoids unnecessary reloads of the same data multiple times. Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk> Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Russell King 提交于
When a GPIO block has the set/clear dataout registers implemented, it also has the normal dataout register implemented. Reading this register reads the current GPIO output state, and writing it sets the GPIOs to the explicit state. This is the behaviour that we want when saving and restoring the context, so use the dataout register exclusively. Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk> Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Russell King 提交于
omap_set_gpio_irqenable() calls two helpers that are almost the same apart from whether they set or clear bits. We can consolidate these: - in the set/clear bit register case, we can perform the operation on our saved context copy and write the appropriate set/clear register. - otherwise, we can use our read-modify-write helper and invert enable if irqenable_inv is set. Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk> Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Russell King 提交于
This function open-codes an exclusive-or bitwise operation using an if() statement and explicitly setting or clearing the bit. Instead, use an exclusive-or operation instead, and simplify the function. We can combine the preprocessor conditional using IS_ENABLED() and gain some additional compilation coverage. Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk> Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Russell King 提交于
We already have a read-modify-write helper, but there's more that can be done with a read-modify-write helper if it returned the new value. Modify the existing helper to return the new value, and arrange for it to take one less argument by having the caller compute the register address. Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk> Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Russell King 提交于
bank->level_mask is merely the bitwise or of the level detection context which we have already read in this function. Rather than repeating additional reads, compute it from the values already read. Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk> Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Russell King 提交于
One of the reasons for set_multiple() to exist is to allow multiple GPIOs on the same chip to be changed simultaneously - see commit 5f424243 ("gpiolib: allow simultaneous setting of multiple GPIO outputs"): - Simultaneous glitch-free setting of multiple pins on any kind of parallel bus attached to GPIOs provided they all reside on the same chip and bank. In order for this to work, we should not use the atomic set/clear registers, but instead read-modify-write the dataout register. We already take the spinlock to ensure that happens atomically, so move the code into the set_multiple() function and kill the two helper functions. Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk> Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Russell King 提交于
There is no reason to have helper functions to read the datain and dataout registers when they are only used in one location. Simplify this code to make it more readable. Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk> Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Russell King 提交于
omap_gpio_get() calls omap_get_gpio_datain() or omap_get_gpio_dataout() to read the GPIO state. These two functions are only called from this method, so they don't add much value. Move their contents into omap_gpio_get() method and simplify. Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk> Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Russell King 提交于
Architectures are single-copy atomic, which means that simply reading a register is an inherently atomic operation. There is no need to take a spinlock here. Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk> Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Russell King 提交于
Move these two functions to live beside the rest of the gpio chip implementation, rather than in the middle of the irq chip implementation. Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk> Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Russell King 提交于
The irq_ack method does not fit our hardware requirements. Edge interrupts must be cleared before we handle them, and level interrupts must be cleared after handling them. We handle the interrupt clearance in our interrupt handler for edge IRQs and in the unmask method for level IRQs. Replace the irq_ack method with the no-op method from the dummy irq chip. Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk> Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Russell King 提交于
The edge interrupt handling was effectively: isr = ISR_reg & enabled; if (bank->level_mask) level_mask = bank->level_mask & enabled; else level_mask = 0; edge = isr & ~level_mask; When bank->level_mask is zero, level_mask will be computed as zero anyway, so the if() statement is redundant. We are then left with: isr = ISR_reg & enabled; level_mask = bank->level_mask & enabled; edge = isr & ~level_mask; This can be simplified further to: isr = ISR_reg & enabled; edge = isr & ~bank->level_mask; since the second mask with 'enabled' is redundant. Improve the associated comment as well. Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk> Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Russell King 提交于
Commit c4791bc6 ("gpio: omap: drop omap_gpio_list") removed the list head and addition to the list head of each gpio bank, but failed to remove the list_del() call and the node inside struct gpio_bank. Remove these too. Fixes: c4791bc6 ("gpio: omap: drop omap_gpio_list") Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk> Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Russell King 提交于
Commit 384ebe1c ("gpio/omap: Add DT support to GPIO driver") added the register definition tables to the gpio-omap driver. Subsequently to that commit, commit 4e962e89 ("gpio/omap: remove cpu_is_omapxxxx() checks from *_runtime_resume()") added definitions for irqstatus_raw* registers to the legacy OMAP4 definitions, but missed the DT definitions. This causes an unintentional change of behaviour for the 1.101 errata workaround on OMAP4 platforms. Fix this oversight. Fixes: 4e962e89 ("gpio/omap: remove cpu_is_omapxxxx() checks from *_runtime_resume()") Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk> Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Russell King 提交于
Documentation states: NOTE: There must be a correlation between the wake-up enable and interrupt-enable registers. If a GPIO pin has a wake-up configured on it, it must also have the corresponding interrupt enabled (on one of the two interrupt lines). Ensure that this condition is always satisfied by enabling the detection events after enabling the interrupt, and disabling the detection before disabling the interrupt. This ensures interrupt/wakeup events can not happen until both the wakeup and interrupt enables correlate. If we do any clearing, clear between the interrupt enable/disable and trigger setting. Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk> Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 11 4月, 2019 2 次提交
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由 Russell King 提交于
Commit b764a586 ("gpio: omap: Remove custom PM calls and use cpu_pm instead") moved interrupt using GPIO banks to idle with cpu_pm in order to drop the use of pm_runtime_irq_safe() in a later patch. The GPIO banks with no interrupts claimed are still being idled based on PM runtime calls. However this caused a regression for am437x suspend for rtc+ddr idle mode where the device cannot enter idle state as reported by Keerthy <j-keerthy@ti.com>. To fix the issue, we must not fail the pm_runtime callbacks. For GPIO interrupts, we already have irq_chip_pm_get increment the PM runtime use count as pointed out by Grygorii Strashko <grygorii.strashko@ti.com>. So all we need to do is remove the conditional handling in the runtime_suspend and resume functions and let the CPU PM notifier idle the GPIO banks. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Fixes: b764a586 ("gpio: omap: Remove custom PM calls and use cpu_pm instead") Reported-by: NKeerthy <j-keerthy@ti.com> Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk> [tony@atomide.com: updated patch description, dropped runtime count changes] Signed-off-by: NTony Lindgren <tony@atomide.com> Tested-by: NKeerthy <j-keerthy@ti.com> Reviewed-by: NKeerthy <j-keerthy@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Russell King 提交于
The GPIO block can enter idle independently of the CPU power management calls via smart-idle. When the GPIO block enters idle, level detection stops working due to clocks being shut off, and an alternative form of edge detection is used. However, this needs the edge detection registers set to mark the appropriate edges. Arrange to configure the edge detection enables along with the level detection to ensure that any transition to active interrupt state that occurs while the block is idle is detected as a wake-up event. Since we enable the edge detection when configuring the IRQ, both omap2_gpio_enable_level_quirk() nor omap2_gpio_disable_level_quirk() become redundant, which also means OMAP_GPIO_QUIRK_IDLE_REMOVE_TRIGGER can be removed. This can be now done without regressions as patch "gpio: gpio-omap: fix level interrupt idling" allows level interrupts to idle on omap4 without a workaround. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk> [tony@atomide.com: update description for the fix dependency] Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 05 4月, 2019 2 次提交
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Use the new helper that wraps the calls to platform_get_resource() and devm_ioremap_resource() together. Signed-off-by: NEnrico Weigelt, metux IT consult <info@metux.net> Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Arnd Bergmann 提交于
clang warns about a tentative array definition in the gpio-omap driver: drivers/gpio/gpio-omap.c:1282:34: error: tentative array definition assumed to have one element [-Werror] static const struct of_device_id omap_gpio_match[]; It's best to just reorder the entire file to avoid forward declarations, which lets us use the regular declaration. To do this, the unnecessary CONFIG_OF check must also be removed. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Reviewed-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 27 3月, 2019 3 次提交
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由 Tony Lindgren 提交于
We are currently assuming all GPIOs are non-wakeup capable GPIOs as we not configuring the bank->non_wakeup_gpios like we used to earlier with platform_data. Let's add omap_gpio_is_off_wakeup_capable() to make the handling clearer while considering that later patches may want to configure SoC specific bank->non_wakeup_gpios for the GPIOs in wakeup domain. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Russell King <rmk+kernel@armlinux.org.uk> Cc: Tero Kristo <t-kristo@ti.com> Reported-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
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由 Tony Lindgren 提交于
The bank->workaround_enabled should be for omap24xx erratum 1.101 but is not needed any longer as erratum 1.101 handling only needs to happen based on !bank->loses_context with patch "gpio: omap: Limit errata 1.101 handling to wkup domain gpios only". Further Grygorii Strashko <grygorii.strashko@ti.com> points out that we are now tagging all edge GPIOs as non-wakeup GPIOs and rely on original erratum 1.101 handling for scacnning for edge interrupts that have triggered during idle. Also the TI Android kernel tree has an earlier commit "GPIO: OMAP: Always scan gpios during runtime resume" by Tero Kristo <t-kristo@ti.com> saying: "This allows the driver to generate interrupts for GPIOs that can't wakeup but have changed state during runtime suspend. We cannot depend on the decision based on no need to restore, as the system state might change and pending events could gather up." So let's remove bank->workaround_enabled and always scan for triggered edge interrupts on resume. We do that based on bank->enabled_non_wakeup_gpios. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Russell King <rmk+kernel@armlinux.org.uk> Cc: Tero Kristo <t-kristo@ti.com> Reported-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
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由 Tony Lindgren 提交于
We need to only apply errata 1.101 handling to clear non-wakeup edge gpios for idle to the gpio bank(s) in the wkup domain to prevent spurious wake-up events. And we must restore what we did after idle manually as the gpio bank in wkup domain is not restored otherwise. Let's keep bank->saved_datain register reading separate, that's not related to the 1.101 errata and is used separately on restore. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Russell King <rmk+kernel@armlinux.org.uk> Cc: Tero Kristo <t-kristo@ti.com> Reported-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
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- 08 3月, 2019 1 次提交
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由 Russell King 提交于
Tony notes that the GPIO module does not idle when level interrupts are in use, as the wakeup appears to get stuck. After extensive investigation, it appears that the wakeup will only be cleared if the interrupt status register is cleared while the interrupt is enabled. However, we are currently clearing it with the interrupt disabled for level-based interrupts. It is acknowledged that this observed behaviour conflicts with a statement in the TRM: CAUTION After servicing the interrupt, the status bit in the interrupt status register (GPIOi.GPIO_IRQSTATUS_0 or GPIOi.GPIO_IRQSTATUS_1) must be reset and the interrupt line released (by setting the corresponding bit of the interrupt status register to 1) before enabling an interrupt for the GPIO channel in the interrupt-enable register (GPIOi.GPIO_IRQSTATUS_SET_0 or GPIOi.GPIO_IRQSTATUS_SET_1) to prevent the occurrence of unexpected interrupts when enabling an interrupt for the GPIO channel. However, this does not appear to be a practical problem. Further, as reported by Grygorii Strashko <grygorii.strashko@ti.com>, the TI Android kernel tree has an earlier similar patch as "GPIO: OMAP: Fix the sequence to clear the IRQ status" saying: if the status is cleared after disabling the IRQ then sWAKEUP will not be cleared and gates the module transition When we unmask the level interrupt after the interrupt has been handled, enable the interrupt and only then clear the interrupt. If the interrupt is still pending, the hardware will re-assert the interrupt status. Should the caution note in the TRM prove to be a problem, we could use a clear-enable-clear sequence instead. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Keerthy <j-keerthy@ti.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk> [tony@atomide.com: updated comments based on an earlier TI patch] Signed-off-by: NTony Lindgren <tony@atomide.com> Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 21 12月, 2018 1 次提交
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由 Tony Lindgren 提交于
Commit ec0daae6 ("gpio: omap: Add level wakeup handling for omap4 based SoCs") attempted to fix omap4 GPIO wakeup handling as it was blocking deeper SoC idle states. However this caused a regression for GPIOs during runtime having over second long latencies for Ethernet GPIO interrupt as reportedy by Russell King <rmk+kernel@armlinux.org.uk>. Let's fix this issue by doing a partial revert of the breaking commit. We still want to keep the quirk handling around as it is also used for OMAP_GPIO_QUIRK_IDLE_REMOVE_TRIGGER. The real fix for omap4 GPIO wakeup handling involves fixes for omap_set_gpio_trigger() and omap_gpio_unmask_irq() and will be posted separately. And we must keep the wakeup bit enabled during runtime because of module doing clock autogating with autoidle configured. Reported-by: NRussell King <rmk+kernel@armlinux.org.uk> Fixes: ec0daae6 ("gpio: omap: Add level wakeup handling for omap4 based SoCs") Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Russell King <rmk+kernel@armlinux.org.uk> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 05 11月, 2018 1 次提交
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由 Wolfram Sang 提交于
We should get 'driver_data' from 'struct device' directly. Going via platform_device is an unneeded step back and forth. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 01 10月, 2018 3 次提交
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由 YueHaibing 提交于
Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpio/gpio-omap.c: In function 'gpio_omap_cpu_notifier': drivers/gpio/gpio-omap.c:1327:17: warning: variable 'dev' set but not used [-Wunused-but-set-variable] Signed-off-by: NYueHaibing <yuehaibing@huawei.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Grygorii Strashko 提交于
omap_gpio_list is unused so drop it. Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Grygorii Strashko 提交于
OMAP GPIO driver is checking !BANK_USED() used condition before calling PM runtime API, because of PM runtime calls in omap2_gpio_prepare/resume_for_idle(). It's not required any more since "omap gpio add level idle, cpu_pm and drop runtime_irq_safe" series [1] from Tony Lindgren was accepted and PM runtime management was enabled in IRQ chip core by commit be45beb2 ("genirq: Add runtime power management support for IRQ chips") . As result safely drop !BANK_USED() checks from omap_gpio_request/free(), omap_gpio_irq_bus_lock/unlock() and enable PM runtime management for OMAP GPIO IRQ chip. [1] https://www.spinics.net/lists/arm-kernel/msg677583.htmlTested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 24 9月, 2018 3 次提交
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由 Tony Lindgren 提交于
If a gpio instance has any GPIO bits requested we do a pm_runtime_get() on the device. Now with cpu_pm handling the deeper SoC idle state quirks, let's just remove pm_runtime_irq_safe() call and add a warning in case we ever happen to encounter it. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Keerthy <j-keerthy@ti.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Tony Lindgren 提交于
For a long time the gpio-omap custom PM calls have been annoying me so let's replace them with cpu_pm instead. This will enable GPIO PM for deeper idle states on omap4. And we can handle GPIO PM for omap2/3/4 in the same way. Note that with this patch we are also slightly changing GPIO PM to be less aggressive for omap3 and only will idle GPIO when PER context may be lost. For omap2, we don't need to save context and don't want to remove any triggering so let's add a quirk flag for that. Let's do this all in a single patch to avoid a situation where old custom calls still are used with new code. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Keerthy <j-keerthy@ti.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Tony Lindgren 提交于
I noticed that unlike omap2 and 3 based SoCs, omap4 based SoCs keep the GPIO clocks enabled for GPIO level interrupts with wakeup enabled. This blocks deeper idle states as the whole domain will stay busy. The GPIO functional clock seems to stay enabled if the wakeup register is enabled and a level interrupt is triggered. In that case the only way to have the GPIO module idle is to reset it. It is possible this has gone unnoticed with OSWR (Open SWitch Retention) and off mode during idle resetting GPIO context most GPIO instances in the earlier Android trees for example. Looks like the way to deal with this is to have omap4 based SoCs only set wake for the duration of idle for level interrupts, and clear level registers for the idle. With level interrupts we can do this as the level interrupt from device will be still there on resume. I've taken the long path to fixing this to avoid yet more hard to read code. I've set up a quirks flag, and a struct for function pointers so we can use these to clean up other quirk handling easier in the later patches. The current level quirk handling is moved to the new functions. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com> Tested-by: NKeerthy <j-keerthy@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 07 8月, 2018 1 次提交
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由 Janusz Krzysztofik 提交于
This should make applications utilizing whole banks work faster. Signed-off-by: NJanusz Krzysztofik <jmkrzyszt@gmail.com> Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 24 5月, 2018 1 次提交
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由 Linus Walleij 提交于
This is a GPIO driver, include only <linux/gpio/driver.h>. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 22 2月, 2018 2 次提交
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由 Markus Elfring 提交于
Replace the specification of a data structure by a pointer dereference as the parameter for the operator "sizeof" to make the corresponding size determination a bit safer according to the Linux coding style convention. This issue was detected by using the Coccinelle software. Signed-off-by: NMarkus Elfring <elfring@users.sourceforge.net> Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Markus Elfring 提交于
Omit an extra message for a memory allocation failure in this function. This issue was detected by using the Coccinelle software. Signed-off-by: NMarkus Elfring <elfring@users.sourceforge.net> Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 03 1月, 2018 1 次提交
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由 Linus Walleij 提交于
As we need to add GPIO lookup tables to the OMAP platforms, we need to reference each GPIO chip with a unique label. Use the GPIO base to name each chip, "gpio-0-31", "gpio-32-63" etc. Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Santosh Shilimkar <ssantosh@kernel.org> Cc: Kevin Hilman <khilman@kernel.org> Cc: linux-omap@vger.kernel.org Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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