Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The v2 version of this controller is used on i.MX35/25 SoCs.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Later versions of this controller also allow 4k pagesize,
so use mtd->writesize instead of a flag.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The main/spare areas are on different addresses on later versions
of the controller, so make them configurable.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Instead of having two switch/case with other operations
in between, use only one switch/case
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The NAND controller has some limitations how to access the
internal buffers. It only allows 32 bit accesses. The driver
used to work around this by having special alignment aware
copy routines.
We now copy the whole page to a buffer in memory and let the
access functions use this buffer. This simplifies the driver.
A bonnie++ test showed that this has no negative performance
impact on the driver.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This factors the address cycle to a seperate function. This
becomes useful in a later patch where we can simplify the
command processing by making use of this function.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The oob layout was initialized several times. Instead, use
a smallpage layout by default and switch to a largepage
afterwards if necessary.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The original Freescale driver used to have eccoob descriptions like
this:

static struct nand_ecclayout nand_hw_eccoob_8 = {
	.eccbytes = 5,
	.eccpos = {6, 7, 8, 9, 10},
	.oobfree = {{0, 5}, {11, 5}}
};

static struct nand_ecclayout nand_hw_eccoob_16 = {
	.eccbytes = 5,
	.eccpos = {6, 7, 8, 9, 10},
	.oobfree = {{0, 6}, {12, 4}}
};

The former was used for 8bit flashes and the latter for 16bit flashes.
They honored the fact that the bad block marker on 8bit flashes is on byte 5
while on 16bit flashes it is on byte 11.
In the Kernel driver this was copied wrong and we ended up with two identical
descriptions.

Change it so that we have only one description which leaves byte 5 and byte
11 unspecified so that it won't be used by others.

Also, rename the descriptions to nand_hw_eccoob_smallpage and
nand_hw_eccoob_largepage so that it can't be confused with Nand chip bus
widths (what actually happened in this driver)
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This reverts commit 71b7d0d9.

The problem which that commit attempted to fix was a bootloader issue,
which had been misunderstood. The 'fix' causes lots of false bad blocks
for existing users with sane firmware.

Thanks to Mathieu Berland for diagnosing the problem coherently.
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NLeo Hao Chen <leochen@broadcom.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Add a request_mem_region() before doing the ioremap().  Also, use the
resource_size macro instead of doing the end - start + 1 calc by hand.
Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

The function mxcnd_remove is used only wrapped by __exit_p so define it
using __exit.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: NSam Ravnborg <sam@ravnborg.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Vladimir Barinov <vova.barinov@gmail.com>
Cc: Vladimir Barinov <vbarinov@embeddedalley.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Unused variable "eccpos" removed from atmel_nand driver.
Signed-off-by: NClaudio Scordino <claudio@evidence.eu.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Correct typo to use mask_ale from platform data when set to non-zero.
Signed-off-by: NHemant Pedanekar <hemantp@ti.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Fixed following htmldocs warnings:

  DOCPROC Documentation/DocBook/mtdnand.xml
  Warning(drivers/mtd/nand/nand_base.c:769): No description found for parameter 'page'
  Warning(drivers/mtd/nand/nand_base.c:785): No description found for parameter 'page'
  Warning(drivers/mtd/nand/nand_base.c:824): No description found for parameter 'page'
  Warning(drivers/mtd/nand/nand_base.c:947): No description found for parameter 'page'
  Warning(drivers/mtd/nand/nand_base.c:996): No description found for parameter 'page'
  Warning(drivers/mtd/nand/nand_base.c:1040): No description found for parameter 'page'
Signed-off-by: NJaswinder Singh Rajput <jaswinderrajput@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Trivial patch which adds the __init and __exit macros to the module_init /
module_exit functions to the following modules from drivers/mtd/
 devices/m25p80.c
 devices/slram.c
 linux version 2.6.30
 ftl.c
 nand/cafe_nand.c
 nand/cmx270_nand.c
Signed-off-by: NPeter Huewe <peterhuewe@gmx.de>
Signed-off-by: NJiri Kosina <jkosina@suse.cz>

Signed-off-by: NAlessandro Rubini <rubini@unipv.it>
Acked-by: NAndrea Gallo <andrea.gallo@stericsson.com>
Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

As with orion_nand in commit f33dabbe
("register orion_nand using platform_driver_probe()"), avoid .init.text
problems by using platform_device_probe(). This isn't going to be
hotplugged anyway.
Reported-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Using __nand_correct_data() helper function, this driver can read 512
byte (with 6 byte ECC) at a time.  This results minor performance
improvement.
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This driver may be reading 512 bytes at a times, but still calculates
256-byte sector ECC.  So the nand_correct_data() is not appropriate
for this driver.  Implement its ecc.correct function calling
__nand_correct_data() twice.
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Acked-by: NDmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Acked-by: NVimal Singh <vimalsingh@ti.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Split nand_correct_data() into two part, a pure calculation function
and a wrapper for mtd interface.

The tmio_nand driver can implement its ecc.correct function easily
using this __nand_correct_data helper.
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Acked-by: NDmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Acked-by: NVimal Singh <vimalsingh@ti.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Fix ECC Correction bug where the byte offset location were double
fliped causing correction routine to toggle the wrong byte location
in the ECC segment. The ndfc_calculate_ecc routine change the order
of getting the ECC code.
        /* The NDFC uses Smart Media (SMC) bytes order */
        ecc_code[0] = p[2];
        ecc_code[1] = p[1];
        ecc_code[2] = p[3];
But in the Correction algorithm when calculating the byte offset
location, the b1 is used as the upper part of the address. Which
again reverse the order making the final byte offset address
location incorrect.
	byte_addr = (addressbits[b1] << 4) + addressbits[b0];
The order is change to read it in straight and let the correction
function to revert it to SMC order.

Cc: stable@kernel.org
Signed-off-by: NFeng Kan <fkan@amcc.com>
Acked-by: NVictor Gallardo <vgallardo@amcc.com>
Acked-by: NProdyut Hazarika <phazarika@amcc.com>
Acked-by: NStefan Roese <sr@denx.de>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch adds DMA mode support for nand prefetch/post-write engine.
Signed-off-by: NVimal Singh <vimalsingh@ti.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch adds prefetch support to access nand flash in mpu mode.
This patch also adds 8-bit nand support (omap_read/write_buf8).
Prefetch can be used for both 8- and 16-bit devices.
Signed-off-by: NVimal Singh <vimalsingh@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Add w90p910 NAND driver for w90p910 evaluation board
based on w90p910,there is a K8F1G08 NAND on my board.

[dwmw2: depend on MTD_PARTITIONS]
Signed-off-by: NWan ZongShun <mcuos.com@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Acked-by: NEric Miao <eric.y.miao@gmail.com>
Signed-off-by: NYeasah Pell <yeasah@comrex.com>
Signed-off-by: NMike Rapoport <mike@compulab.co.il>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch allows i.MX27 to support 2KiB pagesize NAND flash.
We are using a 1.8V NAND flash which datasheet (unfortunately only
available under NDA) says :
Page size: x8: 2,112 bytes (2,048 + 64 bytes).
Without this patch, all sectors are marked as bad eraseblock.
Signed-off-by: NEric Benard <ebenard@eukrea.com>
Acked-by : Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch adds 4-bit ECC support for large page NAND chips using the new
ECC mode NAND_ECC_HW_OOB_FIRST.  The platform data from board-dm355-evm
has been adjusted to use this mode.

The patches have been verified on DM355 device with 2KiB-page Micron
devices using mtd-tests and JFFS2.  Error correction up to 4 bits has
also been verified using nandwrite/nanddump utilities.
Reviewed-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NSneha Narnakaje <nsnehaprabha@ti.com>
Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch adds the new mode NAND_ECC_HW_OOB_FIRST in the nand code to
support 4-bit ECC on TI DaVinci devices with large page (up to 2KiB) NAND
chips.  This ECC mode is similar to NAND_ECC_HW, with the exception of
read_page API that first reads the OOB area, reads the data in chunks,
feeds the ECC from OOB area to the ECC hw engine and perform any
correction on the data as per the ECC status reported by the engine.

"ECC_HW_OOB_FIRST" name suggested by Thomas Gleixner
Reviewed-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NSneha Narnakaje <nsnehaprabha@ti.com>
Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch adds a new "page" parameter to all NAND read_page/read_page_raw
APIs.  The read_page API for the new mode ECC_HW_OOB_FIRST requires the
page information to send the READOOB command and read the OOB area before
the data area.
Reviewed-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NSneha Narnakaje <nsnehaprabha@ti.com>
Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

orion_nand_probe lives in .init.text, so using platform_driver_register to
register it is wrong because binding a device after the init memory is
discarded (e.g.  via sysfs) results in an oops.

As requested by Nicolas Pitre platform_driver_probe is used instead of
moving the probe function to .devinit.text as proposed initially.  This
saves some memory, but devices registered after the driver is probed are
not bound (probably there are none) and binding via sysfs isn't possible.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Lennert Buytenhek <buytenh@marvell.com>
Cc: Saeed Bishara <saeed@marvell.com>
Cc: Joern Engel <joern@logfs.org>
Acked-by: NNicolas Pitre <nico@marvell.com>
Cc: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch allows core driver to choose ECC block size in
sw ecc case.
Signed-off-by: NVimal Singh <vimalsingh@ti.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>