- 02 12月, 2009 1 次提交
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由 Eric Anholt 提交于
This is a sync of a fix I made in the old UMS code. If the BIOS uses the GMBUS and doesn't clear that setup, then our bit-banging I2C can fail, leading to monitors not being detected. Signed-off-by: NEric Anholt <eric@anholt.net>
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- 05 9月, 2009 1 次提交
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由 Jesse Barnes 提交于
There are several sources of unnecessary power consumption on Intel graphics systems. The first is the LVDS clock. TFTs don't suffer from persistence issues like CRTs, and so we can reduce the LVDS refresh rate when the screen is idle. It will be automatically upclocked when userspace triggers graphical activity. Beyond that, we can enable memory self refresh. This allows the memory to go into a lower power state when the graphics are idle. Finally, we can drop some clocks on the gpu itself. All of these things can be reenabled between frames when GPU activity is triggered, and so there should be no user visible graphical changes. Signed-off-by: NJesse Barnes <jesse.barnes@intel.com> Signed-off-by: NMatthew Garrett <mjg@redhat.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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- 19 6月, 2009 1 次提交
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由 Keith Packard 提交于
The existing API passed around intel_i2c_chan pointers, which are dependent on the i2c bit-banging algo. This precluded the driver from using outputs which use a different algo. Switching to the more general i2c_adpater allows the driver to support non bit-banging DDC. This also required moving the slave address into the output private structures. Signed-off-by: NKeith Packard <keithp@keithp.com>
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- 15 5月, 2009 1 次提交
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由 Shaohua Li 提交于
In IGD, DPCUNIT_CLOCK_GATE_DISABLE bit should be set, otherwise i2c access will be wrong. v2: Disable CLOCK_GATE_DISABLE bit after bit bashing as suggested by Eric. Signed-off-by: NShaohua Li <shaohua.li@intel.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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- 27 1月, 2009 1 次提交
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由 Jean Delvare 提交于
Signed-off-by: NJean Delvare <khali@linux-fr.org>
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- 29 12月, 2008 1 次提交
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由 Jesse Barnes 提交于
This commit adds i915 driver support for the DRM mode setting APIs. Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are supported. HDMI, DisplayPort and additional SDVO output support will follow. Support for the mode setting code is controlled by the new 'modeset' module option. A new config option, CONFIG_DRM_I915_KMS controls the default behavior, and whether a PCI ID list is built into the module for use by user level module utilities. Note that if mode setting is enabled, user level drivers that access display registers directly or that don't use the kernel graphics memory manager will likely corrupt kernel graphics memory, disrupt output configuration (possibly leading to hangs and/or blank displays), and prevent panic/oops messages from appearing. So use caution when enabling this code; be sure your user level code supports the new interfaces. A new SysRq key, 'g', provides emergency support for switching back to the kernel's framebuffer console; which is useful for testing. Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NEric Anholt <eric@anholt.net> Signed-off-by: NDave Airlie <airlied@redhat.com>
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