1. 12 3月, 2010 4 次提交
  2. 26 2月, 2010 2 次提交
  3. 25 2月, 2010 24 次提交
    • S
      OMAP4: clock: Add dummy clock nodes for interface clocks · 7c43d547
      Santosh Shilimkar 提交于
      On OMAP4 platform the iclk control is completly under hardware control
      and no software control is available.
      
      This difference w.r.t previous OMAP's needs all the common driver
      accross OMAP's , cpu_is_xxxx() checks. To avoid poulluting the
      drivers dummy clock nodes are created (The autogeneration
      script has been updated accordingly).
      Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      Signed-off-by: NRajendra Nayak <rnayak@ti.com>
      Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
      [paul@pwsan.com: made OMAP1 dummy_ck common and edited patch to reuse that]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      7c43d547
    • P
      OMAP hwmod: add hwmod class support · 43b40992
      Paul Walmsley 提交于
      Add support for categorizing and iterating over hardware IP blocks by
      the "class" of the IP block.  The class is the type of the IP block:
      e.g., "timer", "timer1ms", etc.  Move the OCP_SYSCONFIG/SYSSTATUS data
      from the struct omap_hwmod into the struct omap_hwmod_class, since
      it's expected to stay consistent for each class.  While here, fix some
      comments.
      
      The hwmod_class structures in this patch were designed and proposed by
      Benoît Cousson <b-cousson@ti.com> and were refined in a discussion
      between Thara Gopinath <thara@ti.com>, Kevin Hilman
      <khilman@deeprootsystems.com>, and myself.
      
      This patch uses WARN() lines that are longer than 80 characters, as
      Kevin noted a broader lkml consensus to increase greppability by
      keeping the messages all on one line.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Signed-off-by: NBenoît Cousson <b-cousson@ti.com>
      Cc: Thara Gopinath <thara@ti.com>
      Cc: Kevin Hilman <khilman@deeprootsystems.com>
      43b40992
    • K
      ARM: 5952/1: ARM: MM: Add ARM_L1_CACHE_SHIFT_6 for handle inside each ARCH Kconfig · d6d502fa
      Kukjin Kim 提交于
      Add ARM_L1_CACHE_SHIFT_6 to arch/arm/Kconfig to allow CPUs with
      L1 cache lines which are 64bytes to indicate this without having to
      alter the arch/arm/mm/Kconfig entry each time.
      
      Update the mm Kconfig so that ARM_L1_CACHE_SHIFT default value
      uses this and change OMAP3 and S5PC1XX to select ARM_L1_CACHE_SHIFT_6.
      Acked-by: NBen Dooks <ben-linux@fluff.org>
      Acked-by: NTony Lindgren <tony@atomide.com>
      Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      d6d502fa
    • P
      OMAP hwmod: convert header files with static allocations into C files · 7359154e
      Paul Walmsley 提交于
      Code should be able to #include any header file without the fear that
      the header file will go allocating memory.  This is a coding style
      issue, similar to commit 82e9bd58.
      Move the existing hwmod data from .h files to .c files.
      
      While here, convert "omap34xx" to "omap3xxx" in the hwmod files, since
      most of these structures should be reusable across all OMAP3 chips.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Benoît Cousson <b-cousson@ti.com>
      Cc: Rajendra Nayak <rnayak@ti.com>
      Cc: Kevin Hilman <khilman@deeprootsystems.com>
      7359154e
    • P
      OMAP hwmod: convert hwmod to use hardware clock names rather than clkdev dev+con · 50ebdac2
      Paul Walmsley 提交于
      The OMAP hwmod core code is intended to use SoC IP block description
      structures that are autogenerated from TI's OMAP hardware database.
      Currently the hwmod code uses clkdev device + connection addressing to
      identify clocks.  This causes problems in the hwmod autogeneration
      process, since the TI hardware database doesn't use platform_device or
      clkdev addressing; it uses a single clock signal name string, which
      tends to bear some resemblance to what is used in the OMAP TRMs.  This
      patch converts the hwmod code and existing data to use omap_clk_get_by_name(),
      introduced in the previous patch.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Benoît Cousson <b-cousson@ti.com>
      Cc: Kevin Hilman <khilman@deeprootsystems.com>
      50ebdac2
    • P
      OMAP clock: add omap_clk_get_by_name() for use by OMAP hwmod core code · 74be8427
      Paul Walmsley 提交于
      The OMAP hwmod core code is intended to use SoC IP block description
      structures that are autogenerated from TI's OMAP hardware database.
      Currently the hwmod code uses clkdev device + connection addressing to
      identify clocks.  This causes problems in the hwmod autogeneration
      process, since the TI hardware database doesn't use platform_device or
      clkdev addressing; it uses a single clock signal name string, which
      tends to bear some resemblance to what is used in the OMAP TRMs.  This
      patch adds a non-exported function to the OMAP clock code,
      omap_clk_get_by_name().  A subsequent patch will convert the hwmod
      code to use this function.
      
      This function is for use only by core code, and practically, no other
      code outside the hwmod code should need it.  Device driver code in the
      kernel must not use this function, which is why it is not exported.
      Drivers should use the appropriate clock alias provided by the clkdev
      data structures, so driver code can be completely SoC-independent.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Benoît Cousson <b-cousson@ti.com>
      Cc: Kevin Hilman <khilman@deeprootsystems.com>
      74be8427
    • P
      OMAP4 clock: drop the ALWAYS_ENABLED clock flag · 53c92d8f
      Paul Walmsley 提交于
      Get rid of the ALWAYS_ENABLED clock flag - it doesn't actually do anything.
      (The OMAP4 clock autogeneration scripts have been updated accordingly.)
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Rajendra Nayak <rnayak@ti.com>
      Cc: Benoît Cousson <b-cousson@ti.com>
      53c92d8f
    • P
      OMAP clock: drop RATE_FIXED clock flag · 51c19541
      Paul Walmsley 提交于
      The RATE_FIXED clock flag is pointless.  In the OMAP1 clock code, it
      simply causes the omap1_clk_round_rate() function to return the
      current rate of the clock.  omap1_clk_round_rate(), however, should
      never be called for a fixed-rate clock, since none of these clocks
      have a .round_rate function pointer set in their struct clk records.
      Similarly, in the OMAP2+ clock code, the RATE_FIXED flag just causes
      the clock code to emit a warning if the OMAP clock maintainer was
      foolish enough to add a .round_rate function pointer to a fixed-rate
      clock.  "Doctor, it hurts when I pretend that a fixed-rate clock is
      rate-changeable."  "Then don't pretend that a fixed-rate clock is
      rate-changeable."  It has no functional value.  This patch drops the
      RATE_FIXED clock flag, removing it from all clocks that are so marked.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Richard Woodruff <r-woodruff2@ti.com>
      51c19541
    • P
      OMAP2 clock: drop DELAYED_APP clock flag · 8c34974a
      Paul Walmsley 提交于
      All of the clocks that are marked with DELAYED_APP are changed as part
      of the virt_prcm_set OPP virtual clock.  On 24xx, these clocks all
      need to be changed as part of a group to keep the clock tree
      functional - hence the need for the VALID_CONFIG bit, which is not
      present on later OMAPs.  These clocks should not be rate-changed
      independently.  So prevent these clocks from being changed
      independently by dropping their .round_rate and .set_rate function
      pointers.  It then turns out that the DELAYED_APP clock flag is no
      longer useful, so drop it and the associated code and renumber the
      clock flags.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Richard Woodruff <r-woodruff2@ti.com>
      8c34974a
    • P
      OMAP clock: drop .id field; ensure each clock has a unique name · b92c170d
      Paul Walmsley 提交于
      After the clkdev conversion, the struct clk.id field became
      superfluous, so, drop it.  Bring the clock names closer to the TRMs
      and ensure they are unique for debugfs.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      b92c170d
    • P
      OMAP clock: compress clock flags down to a u8 · f71eddb1
      Paul Walmsley 提交于
      There are now only eight OMAP clock flags, so renumber the flags to
      fit in a u8 and shrink the size of struct clk.flags from a u32 to a
      u8.  The intention is to save memory.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      f71eddb1
    • P
      OMAP2 clock: drop CONFIG_PARTICIPANT clock flag · 1a337717
      Paul Walmsley 提交于
      It turns out that the only purpose of the CONFIG_PARTICIPANT clock
      flag is to prevent omap2_clk_set_rate() and omap2_clk_set_parent()
      from being executed on clocks with that flag set.  The rate-changing
      component can be more directly accomplished by dropping the .set_rate
      and .round_rate function pointers from those CONFIG_PARTICIPANT struct
      clks.  As far as the parent-changing component is concerned, it turns
      out that none of the CONFIG_PARTICIPANT clocks have multiple parent
      choices, so all that is necessary is for omap2_clk_set_parent() to
      bail out early if the new parent is equal to the old parent.
      Implement this change and get rid of the flag, which has always had a
      confusing name (it appears to be a Kconfig option, falsely).
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Richard Woodruff <r-woodruff2@ti.com>
      1a337717
    • P
      OMAP4 clock: drop the CLOCK_IN_OMAP4430 clock flag · c78a05e8
      Paul Walmsley 提交于
      The CLOCK_IN_OMAP4430 clock flag is not currently needed in the OMAP4
      ES1 clock tree, and platform discrimination via clock flags is
      deprecated in favor of the clkdev mechanism, so, drop it.  (The OMAP4
      clock tree autogeneration script has been updated accordingly.)
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Benoît Cousson <b-cousson@ti.com>
      Cc: Rajendra Nayak <rnayak@ti.com>
      c78a05e8
    • P
      OMAP2/3/4 clock: fix DPLL multiplier value errors; also copyrights, includes, documentation · 93340a22
      Paul Walmsley 提交于
      The maximum DPLL multiplier (M) values for OMAP2xxx and OMAP3xxx are
      one increment higher than they should be.  See for example the
      OMAP242x TRM Rev X Section 5.10.6 "Clock Generator Registers" and the
      OMAP36xx TRM Rev C Table 3-202 "CM_CLKSEL1_PLL".  Programming a 0 into
      the DPLL's M register bitfield is valid for OMAP2/3 and indicates that
      the DPLL should enter MN-bypass mode.  Also, increase the minimum
      multiplier (M) value for the DPLL rate rounding code from 1 to 2, to
      ensure that it does not inadvertently put the DPLL into bypass.
      
      Note that the register documentation in the OMAP2xxx and OMAP3xxx TRMs
      does not make clear that the actual DPLL divider value (the "N") is
      the content of the appropriate register bitfield for the N value,
      _plus one_.  (In other words, an N register bitfield of 0 indicates a
      DPLL divider value of 1.)  This is only clearly documented in the
      OMAP4430 TRM, in, for example, OMAP4430 TRM Rev A Table 3-1167
      "CM_CLKSEL_DPLL_USB".
      
      While here, update copyrights, add kerneldoc for struct dpll_data,
      drop the unused struct dpll_data.max_tolerance field, remove some
      unnecessary #includes in DPLL-related code, and replace the #include
      of <linux/module.h> with <linux/list.h>, which is what was really
      needed.  The OMAP4 clock autogenerator script has been updated
      accordingly.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Benoît Cousson <b-cousson@ti.com>
      Cc: Rajendra Nayak <rnayak@ti.com>
      93340a22
    • V
      OMAP3 clock: add support for 192Mhz DPLL4M2 output · 7356f0b2
      Vishwanath BS 提交于
      In 3630, DPLL4M2 output can be 96MHz or 192MHz (for SGX to run at
      192). This patch has changes to support this feature. 96MHz clock is
      generated by dividing 192Mhz clock by 2 using CM_CLKSEL_CORE register.
      SGX can select Core Clock, 192MHz clock or CM_96M_FCLK as it's
      functional clock. In summary changes done are:
      1. Added a feature called omap3_has_192mhz_clk and enabled for 3630
      2. Added a new clock node called omap_192m_alwon_ck
      3. Made omap_96m_alwon_fck to derive its clock from omap_192m_alwon_ck
      Signed-off-by: NVishwanath BS <Vishwanath.bs@ti.com>
      [paul@pwsan.com: fixed whitespace]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      7356f0b2
    • V
      OMAP3 clock: Introduce 3630 DPLL4 HSDivider changes · 678bc9a2
      Vishwanath BS 提交于
      Divider (M2, M3, M4, M5 and M6) field width has been increased by 1 bit
      in 3630. This patch has changes to accommodate this in CM dynamically
      based on chip version.
      Basically new clock nodes have been added for 3630 DPLL4 M2,M3,M4,M5 and
      M6 and value of these nodes are used if cpu type is 3630.
      Signed-off-by: NVishwanath BS <vishwanath.bs@ti.com>
      [paul@pwsan.com: updated to apply on 2.6.34 queue; comments added]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      678bc9a2
    • R
      OMAP3 clock: introduce DPLL4 Jtype · 358965d7
      Richard Woodruff 提交于
      DPLL4 for 3630 introduces a changed block called j type dpll, requiring
      special divisor bits and additional reg fields. To allow for silicons to
      use this, this is introduced as a flag and is enabled for 3630 silicon.
      OMAP4 also has j type dpll for usb.
      
      Tested with 3630 ZOOM3 and OMAP3430 ZOOM2
      Signed-off-by: NRichard Woodruff <r-woodruff2@ti.com>
      Signed-off-by: NNishanth Menon <nm@ti.com>
      Signed-off-by: NVishwanath BS <Vishwanath.bs@ti.com>
      [paul@pwsan.com: added some comments; updated copyrights and credits; fixed
       some style issues]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      358965d7
    • T
      OMAP: HWMOD: Add support for early device register into omap device layer · c23a97d3
      Thara Gopinath 提交于
      This patch adds support in omap device layer to register devices
      as early platform devices. Certain devices needed during system boot up
      like timers, gpio etc can be registered as early devices. This will
      allow for them to be probed very early on during system boot up.
      This patch adds a parameter is_early_device in omap_device_build.
      Depending on this parameter a call to early_platform_add_devices
      or platform_register_device is made.
      Signed-off-by: NThara Gopinath <thara@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      c23a97d3
    • T
      OMAP3: hwmod: support to specify the offset position of various SYSCONFIG register bits. · 358f0e63
      Thara Gopinath 提交于
      In OMAP3 Some modules like Smartreflex do not have the regular sysconfig
      register.Instead clockactivity bits are part of another register at a
      different bit position than the usual bit positions 8 and 9.
      
      In OMAP4, a new scheme is available  due to the new protocol
      between the PRCM and the IPs. Depending of the scheme, the SYSCONFIG
      bitfields position will be different.
      The IP_REVISION register should be at offset 0x00.
      It should contain a SCHEME field. From this we can determine whether
      the IP follows legacy scheme or the new scheme.
      
      31:30 SCHEME  Used to distinguish between old scheme and current.
       Read 0x0:  Legacy protocol.
       Read 0x1:  New PRCM protocol defined for new OMAP4 IPs
      
      For legacy IP
       13:12 MIDLEMODE
       11:8  CLOCKACTIVITY
       6     EMUSOFT
       5     EMUFREE
       4:3   SIDLEMODE
       2     ENAWAKEUP
       1     SOFTRESET
       0     AUTOIDLE
      
      For new OMAP4 IP's, the bit position in SYSCONFIG is (for simple target):
       5:4   STANDBYMODE (Ex MIDLEMODE)
       3:2   IDLEMODE (Ex SIDLEMODE)
       1     FREEEMU (Ex EMUFREE)
       0     SOFTRESET
      
      Unfortunately In OMAP4 also some IPs will not follow any of these
      two schemes. This is the case at least for McASP, SmartReflex
      and some security IPs.
      
      This patch introduces a new field sysc_fields in omap_hwmod_sysconfig which
      can be used by the hwmod structures to specify the offsets for the
      sysconfig register of the IP.Also two static structures
      omap_hwmod_sysc_type1 and omap_hwmod_sysc_type2 are defined
      which can be used directly to populate the sysc_fields if the IP follows
      legacy or new OMAP4 scheme. If the IP follows none of these two schemes
      a new omap_hwmod_sysc_fields structure has to be defined and
      passed as part of omap_hwmod_sysconfig.
      Signed-off-by: NThara Gopinath <thara@ti.com>
      Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      358f0e63
    • R
      OMAP2/3 clock: Extend find_idlest() to pass back idle state value · 419cc97d
      Ranjith Lohithakshan 提交于
      Current implementation defines clock idle state indicators based on the
      cpu information (cpu_is_omap24xx() or cpu_is_omap34xx()) in a system wide
      manner. This patch extends the find_idlest() function in clkops to pass
      back the idle state indicator for that clock, thus allowing idle state
      indicators to be defined on a per clock basis if required.
      
      This is specifically needed on AM35xx devices as the new IPSS clocks
      indicates the idle status (0 is idle, 1 is ready) in a way just
      opposite to how its handled in OMAP3 (0 is ready, 1 is idle).
      Signed-off-by: NRanjith Lohithakshan <ranjithl@ti.com>
      [paul@pwsan.com: updated to apply after commit 98c45457 et seq.]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      419cc97d
    • T
      OMAP3 PM: Adding counters for power domain logic off and mem off during retention. · cde08f81
      Thara Gopinath 提交于
      This patch adds counters to keep track of whether the powerdomain
      logic or software controllable memory banks are turned off when
      the power domain enters retention. During power domain retention
      if logic gets turned off, the scenario is known as Open Switch Retention.
      Also during retention s/w controllable memory banks of a power
      domain can be chosen to be kept in retention or off.
      
      This patch adds one counter per powerdomain to track the power domain
      logic state during retention. Number of memory bank state counters
      added depends on the number of software controllable memory banks
      of the powerdomain. To view these counters do
      	cat ../debug/pm_debug/count
      Signed-off-by: NThara Gopinath <thara@ti.com>
      [paul@pwsan.com: conditional expressions simplified; counter increment
       code moved to its own function]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      cde08f81
    • T
      OMAP2/3 PM: Adding powerdomain APIs for reading the next logic and mem state · 1e3d0d2b
      Thara Gopinath 提交于
      This patch adds APIs pwrdm_read_logic_retst and
      pwrdm_read_mem_retst for reading the next programmed
      logic and memory state a powerdomain is to hit in event
      of the next power domain state being retention.
      These are needed for OSWR support.
      Signed-off-by: NThara Gopinath <thara@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      1e3d0d2b
    • K
      OMAP: omap_device: when 'called from invalid state', print state · 24d82e34
      Kevin Hilman 提交于
      The omap_device_[enable|idle|shutdown] functions print a warning
      when called from an invalid state.  Print the invalid state in
      the warning messages.  This also uses __func__ to get the function
      name.
      
      Also, move the entire print string onto a single line to facilitate
      grepping or error messages.  Recent discussions on LKML show
      strong preference for grep-able code vs. strict 80 column limit.
      Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      24d82e34
    • K
      OMAP: omap_device: add omap_device_is_valid() · 0007122a
      Kevin Hilman 提交于
      The omap_device struct contains a 'struct platform_device'.  Normally,
      converting a platform_device pointer to an omap_device pointer
      consists of simply doing a container_of(), as is done currently by the
      to_omap_device() macro.
      
      However, if this is attempted when using platform_device that has not
      been created as part of the omap_device creation, the container_of()
      will point to a memory location before the platform_device pointer
      which will contain random data.
      
      Therefore, we need a way to detect valid omap_device pointers.  This
      patch solves this by using the simple magic number approach.
      Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      0007122a
  4. 24 2月, 2010 10 次提交