1. 01 4月, 2020 1 次提交
  2. 27 3月, 2020 5 次提交
  3. 24 1月, 2020 1 次提交
    • Z
      riscv: mm: add support for CONFIG_DEBUG_VIRTUAL · 6435f773
      Zong Li 提交于
      This patch implements CONFIG_DEBUG_VIRTUAL to do additional checks on
      virt_to_phys and __pa_symbol calls. virt_to_phys used for linear mapping
      check, and __pa_symbol used for kernel symbol check. In current RISC-V,
      kernel image maps to linear mapping area. If CONFIG_DEBUG_VIRTUAL is
      disable, these two functions calculate the offset on the address feded
      directly without any checks.
      
      The result of test_debug_virtual as follows:
      
      [    0.358456] ------------[ cut here ]------------
      [    0.358738] virt_to_phys used for non-linear address: (____ptrval____) (0xffffffd000000000)
      [    0.359174] WARNING: CPU: 0 PID: 1 at arch/riscv/mm/physaddr.c:16 __virt_to_phys+0x3c/0x50
      [    0.359409] Modules linked in:
      [    0.359630] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.5.0-rc3-00002-g5133c5c0ca13 #57
      [    0.359861] epc: ffffffe000253d1a ra : ffffffe000253d1a sp : ffffffe03aa87da0
      [    0.360019]  gp : ffffffe000ae03b0 tp : ffffffe03aa88000 t0 : ffffffe000af2660
      [    0.360175]  t1 : 0000000000000064 t2 : 00000000000000b7 s0 : ffffffe03aa87dc0
      [    0.360330]  s1 : ffffffd000000000 a0 : 000000000000004f a1 : 0000000000000000
      [    0.360492]  a2 : 0000000000000000 a3 : 0000000000000000 a4 : ffffffe000a84358
      [    0.360672]  a5 : 0000000000000000 a6 : 0000000000000000 a7 : 0000000000000000
      [    0.360876]  s2 : ffffffe000ae0600 s3 : ffffffe00000fc7c s4 : ffffffe0000224b0
      [    0.361067]  s5 : ffffffe000030890 s6 : ffffffe000022470 s7 : 0000000000000008
      [    0.361267]  s8 : ffffffe0000002c4 s9 : ffffffe000ae0640 s10: ffffffe000ae0630
      [    0.361453]  s11: 0000000000000000 t3 : 0000000000000000 t4 : 000000000001e6d0
      [    0.361636]  t5 : ffffffe000ae0a18 t6 : ffffffe000aee54e
      [    0.361806] status: 0000000000000120 badaddr: 0000000000000000 cause: 0000000000000003
      [    0.362056] ---[ end trace aec0bf78d4978122 ]---
      [    0.362404] PA: 0xfffffff080200000 for VA: 0xffffffd000000000
      [    0.362607] PA: 0x00000000baddd2d0 for VA: 0xffffffe03abdd2d0
      Signed-off-by: NZong Li <zong.li@sifive.com>
      Reviewed-by: NPaul Walmsley <paul.walmsley@sifive.com>
      Tested-by: NPaul Walmsley <paul.walmsley@sifive.com>
      Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
      6435f773
  4. 23 1月, 2020 2 次提交
    • O
      riscv: keep 32-bit kernel to 32-bit phys_addr_t · fc76324f
      Olof Johansson 提交于
      While rv32 technically has 34-bit physical addresses, no current platforms
      use it and it's likely to shake out driver bugs.
      
      Let's keep 64-bit phys_addr_t off on 32-bit builds until one shows up,
      since other work will be needed to make such a system useful anyway.
      
      PHYS_ADDR_T_64BIT is def_bool 64BIT, so just remove the select.
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
      fc76324f
    • N
      riscv: Add KASAN support · 8ad8b727
      Nick Hu 提交于
      This patch ports the feature Kernel Address SANitizer (KASAN).
      
      Note: The start address of shadow memory is at the beginning of kernel
      space, which is 2^64 - (2^39 / 2) in SV39. The size of the kernel space is
      2^38 bytes so the size of shadow memory should be 2^38 / 8. Thus, the
      shadow memory would not overlap with the fixmap area.
      
      There are currently two limitations in this port,
      
      1. RV64 only: KASAN need large address space for extra shadow memory
      region.
      
      2. KASAN can't debug the modules since the modules are allocated in VMALLOC
      area. We mapped the shadow memory, which corresponding to VMALLOC area, to
      the kasan_early_shadow_page because we don't have enough physical space for
      all the shadow memory corresponding to VMALLOC area.
      Signed-off-by: NNick Hu <nickhu@andestech.com>
      Reported-by: NGreentime Hu <green.hu@gmail.com>
      Signed-off-by: NPalmer Dabbelt <palmerdabbelt@google.com>
      8ad8b727
  5. 07 1月, 2020 1 次提交
  6. 03 1月, 2020 1 次提交
  7. 20 12月, 2019 1 次提交
  8. 18 11月, 2019 1 次提交
    • C
      riscv: add nommu support · 6bd33e1e
      Christoph Hellwig 提交于
      The kernel runs in M-mode without using page tables, and thus can't run
      bare metal without help from additional firmware.
      
      Most of the patch is just stubbing out code not needed without page
      tables, but there is an interesting detail in the signals implementation:
      
       - The normal RISC-V syscall ABI only implements rt_sigreturn as VDSO
         entry point, but the ELF VDSO is not supported for nommu Linux.
         We instead copy the code to call the syscall onto the stack.
      
      In addition to enabling the nommu code a new defconfig for a small
      kernel image that can run in nommu mode on qemu is also provided, to run
      a kernel in qemu you can use the following command line:
      
      qemu-system-riscv64 -smp 2 -m 64 -machine virt -nographic \
      	-kernel arch/riscv/boot/loader \
      	-drive file=rootfs.ext2,format=raw,id=hd0 \
      	-device virtio-blk-device,drive=hd0
      
      Contains contributions from Damien Le Moal <Damien.LeMoal@wdc.com>.
      Signed-off-by: NChristoph Hellwig <hch@lst.de>
      Reviewed-by: NAnup Patel <anup@brainfault.org>
      [paul.walmsley@sifive.com: updated to apply; add CONFIG_MMU guards
       around PCI_IOBASE definition to fix build issues; fixed checkpatch
       issues; move the PCI_IO_* and VMEMMAP address space macros along
       with the others; resolve sparse warning]
      Signed-off-by: NPaul Walmsley <paul.walmsley@sifive.com>
      6bd33e1e
  9. 17 11月, 2019 1 次提交
    • A
      int128: move __uint128_t compiler test to Kconfig · c12d3362
      Ard Biesheuvel 提交于
      In order to use 128-bit integer arithmetic in C code, the architecture
      needs to have declared support for it by setting ARCH_SUPPORTS_INT128,
      and it requires a version of the toolchain that supports this at build
      time. This is why all existing tests for ARCH_SUPPORTS_INT128 also test
      whether __SIZEOF_INT128__ is defined, since this is only the case for
      compilers that can support 128-bit integers.
      
      Let's fold this additional test into the Kconfig declaration of
      ARCH_SUPPORTS_INT128 so that we can also use the symbol in Makefiles,
      e.g., to decide whether a certain object needs to be included in the
      first place.
      
      Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
      Signed-off-by: NArd Biesheuvel <ardb@kernel.org>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      c12d3362
  10. 14 11月, 2019 1 次提交
  11. 12 11月, 2019 1 次提交
  12. 06 11月, 2019 1 次提交
    • C
      riscv: abstract out CSR names for supervisor vs machine mode · a4c3733d
      Christoph Hellwig 提交于
      Many of the privileged CSRs exist in a supervisor and machine version
      that are used very similarly.  Provide versions of the CSR names and
      fields that map to either the S-mode or M-mode variant depending on
      a new CONFIG_RISCV_M_MODE kconfig symbol.
      
      Contains contributions from Damien Le Moal <Damien.LeMoal@wdc.com>
      and Paul Walmsley <paul.walmsley@sifive.com>.
      Signed-off-by: NChristoph Hellwig <hch@lst.de>
      Acked-by: Thomas Gleixner <tglx@linutronix.de> # for drivers/clocksource, drivers/irqchip
      [paul.walmsley@sifive.com: updated to apply]
      Signed-off-by: NPaul Walmsley <paul.walmsley@sifive.com>
      a4c3733d
  13. 30 10月, 2019 1 次提交
  14. 25 9月, 2019 1 次提交
    • A
      riscv: make mmap allocation top-down by default · 54c95a11
      Alexandre Ghiti 提交于
      In order to avoid wasting user address space by using bottom-up mmap
      allocation scheme, prefer top-down scheme when possible.
      
      Before:
      root@qemuriscv64:~# cat /proc/self/maps
      00010000-00016000 r-xp 00000000 fe:00 6389       /bin/cat.coreutils
      00016000-00017000 r--p 00005000 fe:00 6389       /bin/cat.coreutils
      00017000-00018000 rw-p 00006000 fe:00 6389       /bin/cat.coreutils
      00018000-00039000 rw-p 00000000 00:00 0          [heap]
      1555556000-155556d000 r-xp 00000000 fe:00 7193   /lib/ld-2.28.so
      155556d000-155556e000 r--p 00016000 fe:00 7193   /lib/ld-2.28.so
      155556e000-155556f000 rw-p 00017000 fe:00 7193   /lib/ld-2.28.so
      155556f000-1555570000 rw-p 00000000 00:00 0
      1555570000-1555572000 r-xp 00000000 00:00 0      [vdso]
      1555574000-1555576000 rw-p 00000000 00:00 0
      1555576000-1555674000 r-xp 00000000 fe:00 7187   /lib/libc-2.28.so
      1555674000-1555678000 r--p 000fd000 fe:00 7187   /lib/libc-2.28.so
      1555678000-155567a000 rw-p 00101000 fe:00 7187   /lib/libc-2.28.so
      155567a000-15556a0000 rw-p 00000000 00:00 0
      3fffb90000-3fffbb1000 rw-p 00000000 00:00 0      [stack]
      
      After:
      root@qemuriscv64:~# cat /proc/self/maps
      00010000-00016000 r-xp 00000000 fe:00 6389       /bin/cat.coreutils
      00016000-00017000 r--p 00005000 fe:00 6389       /bin/cat.coreutils
      00017000-00018000 rw-p 00006000 fe:00 6389       /bin/cat.coreutils
      2de81000-2dea2000 rw-p 00000000 00:00 0          [heap]
      3ff7eb6000-3ff7ed8000 rw-p 00000000 00:00 0
      3ff7ed8000-3ff7fd6000 r-xp 00000000 fe:00 7187   /lib/libc-2.28.so
      3ff7fd6000-3ff7fda000 r--p 000fd000 fe:00 7187   /lib/libc-2.28.so
      3ff7fda000-3ff7fdc000 rw-p 00101000 fe:00 7187   /lib/libc-2.28.so
      3ff7fdc000-3ff7fe2000 rw-p 00000000 00:00 0
      3ff7fe4000-3ff7fe6000 r-xp 00000000 00:00 0      [vdso]
      3ff7fe6000-3ff7ffd000 r-xp 00000000 fe:00 7193   /lib/ld-2.28.so
      3ff7ffd000-3ff7ffe000 r--p 00016000 fe:00 7193   /lib/ld-2.28.so
      3ff7ffe000-3ff7fff000 rw-p 00017000 fe:00 7193   /lib/ld-2.28.so
      3ff7fff000-3ff8000000 rw-p 00000000 00:00 0
      3fff888000-3fff8a9000 rw-p 00000000 00:00 0      [stack]
      
      [alex@ghiti.fr: v6]
        Link: http://lkml.kernel.org/r/20190808061756.19712-15-alex@ghiti.fr
      Link: http://lkml.kernel.org/r/20190730055113.23635-15-alex@ghiti.frSigned-off-by: NAlexandre Ghiti <alex@ghiti.fr>
      Reviewed-by: NChristoph Hellwig <hch@lst.de>
      Reviewed-by: NKees Cook <keescook@chromium.org>
      Reviewed-by: NLuis Chamberlain <mcgrof@kernel.org>
      Acked-by: Paul Walmsley <paul.walmsley@sifive.com>	[arch/riscv]
      Cc: Albert Ou <aou@eecs.berkeley.edu>
      Cc: Alexander Viro <viro@zeniv.linux.org.uk>
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Cc: Christoph Hellwig <hch@infradead.org>
      Cc: James Hogan <jhogan@kernel.org>
      Cc: Palmer Dabbelt <palmer@sifive.com>
      Cc: Paul Burton <paul.burton@mips.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Russell King <linux@armlinux.org.uk>
      Cc: Will Deacon <will.deacon@arm.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      54c95a11
  15. 05 9月, 2019 1 次提交
    • M
      riscv: Add support for perf registers sampling · 98a93b0b
      Mao Han 提交于
      This patch implements the perf registers sampling and validation API
      for the riscv arch. The valid registers and their register ID are
      defined in perf_regs.h. Perf tool can backtrace in userspace with
      unwind library and the registers/user stack dump support.
      Signed-off-by: NMao Han <han_mao@c-sky.com>
      Cc: Paul Walmsley <paul.walmsley@sifive.com>
      Cc: Greentime Hu <green.hu@gmail.com>
      Cc: Palmer Dabbelt <palmer@sifive.com>
      Cc: linux-riscv <linux-riscv@lists.infradead.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Guo Ren <guoren@kernel.org>
      Tested-by: NGreentime Hu <greentime.hu@sifive.com>
      [paul.walmsley@sifive.com: minor patch description fix]
      Signed-off-by: NPaul Walmsley <paul.walmsley@sifive.com>
      98a93b0b
  16. 31 8月, 2019 1 次提交
    • L
      RISC-V: Implement sparsemem · d95f1a54
      Logan Gunthorpe 提交于
      Implement sparsemem support for Risc-v which helps pave the
      way for memory hotplug and eventually P2P support.
      
      Introduce Kconfig options for virtual and physical address bits which
      are used to calculate the size of the vmemmap and set the
      MAX_PHYSMEM_BITS.
      
      The vmemmap is located directly before the VMALLOC region and sized
      such that we can allocate enough pages to populate all the virtual
      address space in the system (similar to the way it's done in arm64).
      
      During initialization, call memblocks_present() and sparse_init(),
      and provide a stub for vmemmap_populate() (all of which is similar to
      arm64).
      
      [greentime.hu@sifive.com: fixed pfn_valid, FIXADDR_TOP and fixed a bug
       rebasing onto v5.3]
      Signed-off-by: NGreentime Hu <greentime.hu@sifive.com>
      Signed-off-by: NLogan Gunthorpe <logang@deltatee.com>
      Reviewed-by: NPalmer Dabbelt <palmer@sifive.com>
      Reviewed-by: NChristoph Hellwig <hch@lst.de>
      Cc: Albert Ou <aou@eecs.berkeley.edu>
      Cc: Andrew Waterman <andrew@sifive.com>
      Cc: Olof Johansson <olof@lixom.net>
      Cc: Michael Clark <michaeljclark@mac.com>
      Cc: Rob Herring <robh@kernel.org>
      Cc: Zong Li <zong@andestech.com>
      Reviewed-by: NMike Rapoport <rppt@linux.ibm.com>
      [paul.walmsley@sifive.com: updated to apply; minor commit message
       reformat]
      Signed-off-by: NPaul Walmsley <paul.walmsley@sifive.com>
      d95f1a54
  17. 22 8月, 2019 1 次提交
  18. 23 7月, 2019 1 次提交
  19. 04 7月, 2019 1 次提交
  20. 02 7月, 2019 1 次提交
  21. 24 6月, 2019 1 次提交
  22. 21 6月, 2019 1 次提交
    • Y
      EDAC/sifive: Add EDAC platform driver for SiFive SoCs · 91abaeaa
      Yash Shah 提交于
      Add an EDAC driver for SiFive SoCs. The initial version supports ECC
      event monitoring and reporting through the EDAC framework for the SiFive
      L2 cache controller. It registers for notifier events from the L2 cache
      controller driver (arch/riscv/mm/sifive_l2_cache.c) for L2 ECC events.
      
       [ bp: Massage commit message. ]
      Signed-off-by: NYash Shah <yash.shah@sifive.com>
      Signed-off-by: NBorislav Petkov <bp@suse.de>
      Reviewed-by: NJames Morse <james.morse@arm.com>
      Cc: Albert Ou <aou@eecs.berkeley.edu>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com>
      Cc: Linus Walleij <linus.walleij@linaro.org>
      Cc: linux-edac <linux-edac@vger.kernel.org>
      Cc: linux-riscv@lists.infradead.org
      Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
      Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
      Cc: Palmer Dabbelt <palmer@sifive.com>
      Cc: "Paul E. McKenney" <paulmck@linux.ibm.com>
      Cc: Paul Walmsley <paul.walmsley@sifive.com>
      Cc: sachin.ghadi@sifive.com
      Link: https://lkml.kernel.org/r/1557142026-15949-2-git-send-email-yash.shah@sifive.com
      91abaeaa
  23. 15 6月, 2019 1 次提交
    • M
      docs: kbuild: convert docs to ReST and rename to *.rst · cd238eff
      Mauro Carvalho Chehab 提交于
      The kbuild documentation clearly shows that the documents
      there are written at different times: some use markdown,
      some use their own peculiar logic to split sections.
      
      Convert everything to ReST without affecting too much
      the author's style and avoiding adding uneeded markups.
      
      The conversion is actually:
        - add blank lines and identation in order to identify paragraphs;
        - fix tables markups;
        - add some lists markups;
        - mark literal blocks;
        - adjust title markups.
      
      At its new index.rst, let's add a :orphan: while this is not linked to
      the main index.rst file, in order to avoid build warnings.
      Signed-off-by: NMauro Carvalho Chehab <mchehab+samsung@kernel.org>
      Signed-off-by: NJonathan Corbet <corbet@lwn.net>
      cd238eff
  24. 21 5月, 2019 1 次提交
  25. 26 4月, 2019 1 次提交
  26. 08 4月, 2019 1 次提交
  27. 03 4月, 2019 1 次提交
    • W
      locking/rwsem: Remove rwsem-spinlock.c & use rwsem-xadd.c for all archs · 390a0c62
      Waiman Long 提交于
      Currently, we have two different implementation of rwsem:
      
       1) CONFIG_RWSEM_GENERIC_SPINLOCK (rwsem-spinlock.c)
       2) CONFIG_RWSEM_XCHGADD_ALGORITHM (rwsem-xadd.c)
      
      As we are going to use a single generic implementation for rwsem-xadd.c
      and no architecture-specific code will be needed, there is no point
      in keeping two different implementations of rwsem. In most cases, the
      performance of rwsem-spinlock.c will be worse. It also doesn't get all
      the performance tuning and optimizations that had been implemented in
      rwsem-xadd.c over the years.
      
      For simplication, we are going to remove rwsem-spinlock.c and make all
      architectures use a single implementation of rwsem - rwsem-xadd.c.
      
      All references to RWSEM_GENERIC_SPINLOCK and RWSEM_XCHGADD_ALGORITHM
      in the code are removed.
      Suggested-by: NPeter Zijlstra <peterz@infradead.org>
      Signed-off-by: NWaiman Long <longman@redhat.com>
      Signed-off-by: NPeter Zijlstra (Intel) <peterz@infradead.org>
      Acked-by: NLinus Torvalds <torvalds@linux-foundation.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Davidlohr Bueso <dave@stgolabs.net>
      Cc: H. Peter Anvin <hpa@zytor.com>
      Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Tim Chen <tim.c.chen@linux.intel.com>
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: linux-c6x-dev@linux-c6x.org
      Cc: linux-m68k@lists.linux-m68k.org
      Cc: linux-riscv@lists.infradead.org
      Cc: linux-um@lists.infradead.org
      Cc: linux-xtensa@linux-xtensa.org
      Cc: linuxppc-dev@lists.ozlabs.org
      Cc: nios2-dev@lists.rocketboards.org
      Cc: openrisc@lists.librecores.org
      Cc: uclinux-h8-devel@lists.sourceforge.jp
      Link: https://lkml.kernel.org/r/20190322143008.21313-3-longman@redhat.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
      390a0c62
  28. 26 2月, 2019 1 次提交
  29. 21 2月, 2019 1 次提交
  30. 20 2月, 2019 2 次提交
  31. 19 2月, 2019 1 次提交
    • Y
      32-bit userspace ABI: introduce ARCH_32BIT_OFF_T config option · 942fa985
      Yury Norov 提交于
      All new 32-bit architectures should have 64-bit userspace off_t type, but
      existing architectures has 32-bit ones.
      
      To enforce the rule, new config option is added to arch/Kconfig that defaults
      ARCH_32BIT_OFF_T to be disabled for new 32-bit architectures. All existing
      32-bit architectures enable it explicitly.
      
      New option affects force_o_largefile() behaviour. Namely, if userspace
      off_t is 64-bits long, we have no reason to reject user to open big files.
      
      Note that even if architectures has only 64-bit off_t in the kernel
      (arc, c6x, h8300, hexagon, nios2, openrisc, and unicore32),
      a libc may use 32-bit off_t, and therefore want to limit the file size
      to 4GB unless specified differently in the open flags.
      Signed-off-by: NYury Norov <ynorov@caviumnetworks.com>
      Acked-by: NArnd Bergmann <arnd@arndb.de>
      Signed-off-by: NYury Norov <ynorov@marvell.com>
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      942fa985
  32. 05 2月, 2019 1 次提交
    • B
      bpf, riscv: add BPF JIT for RV64G · 2353ecc6
      Björn Töpel 提交于
      This commit adds a BPF JIT for RV64G.
      
      The JIT is a two-pass JIT, and has a dynamic prolog/epilogue (similar
      to the MIPS64 BPF JIT) instead of static ones (e.g. x86_64).
      
      At the moment the RISC-V Linux port does not support
      CONFIG_HAVE_KPROBES, which means that CONFIG_BPF_EVENTS is not
      supported. Thus, no tests involving BPF_PROG_TYPE_TRACEPOINT,
      BPF_PROG_TYPE_PERF_EVENT, BPF_PROG_TYPE_KPROBE and
      BPF_PROG_TYPE_RAW_TRACEPOINT passes.
      
      The implementation does not support "far branching" (>4KiB).
      
      Test results:
        # modprobe test_bpf
        test_bpf: Summary: 378 PASSED, 0 FAILED, [366/366 JIT'ed]
      
        # echo 1 > /proc/sys/kernel/unprivileged_bpf_disabled
        # ./test_verifier
        ...
        Summary: 761 PASSED, 507 SKIPPED, 2 FAILED
      
      Note that "test_verifier" was run with one build with
      CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y and one without, otherwise
      many of the the tests that require unaligned access were skipped.
      
      CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y:
        # echo 1 > /proc/sys/kernel/unprivileged_bpf_disabled
        # ./test_verifier | grep -c 'NOTE.*unknown align'
        0
      
      No CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS:
        # echo 1 > /proc/sys/kernel/unprivileged_bpf_disabled
        # ./test_verifier | grep -c 'NOTE.*unknown align'
        59
      
      The two failing test_verifier tests are:
        "ld_abs: vlan + abs, test 1"
        "ld_abs: jump around ld_abs"
      
      This is due to that "far branching" involved in those tests.
      
      All tests where done on QEMU (QEMU emulator version 3.1.50
      (v3.1.0-688-g8ae951fbc106)).
      Signed-off-by: NBjörn Töpel <bjorn.topel@gmail.com>
      Signed-off-by: NDaniel Borkmann <daniel@iogearbox.net>
      2353ecc6
  33. 24 1月, 2019 1 次提交
  34. 08 1月, 2019 1 次提交