- 14 2月, 2014 2 次提交
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由 Pekon Gupta 提交于
Fixes: commit 75d3625e ARM: OMAP2+: gpmc: add DT bindings for OneNAND OMAP SoC(s) depend on GPMC controller driver to parse GPMC DT child nodes and register them platform_device for ONENAND driver to probe later. However this does not happen if generic MTD_ONENAND framework is built as module (CONFIG_MTD_ONENAND=m). Therefore, when MTD/ONENAND and MTD/ONENAND/OMAP2 modules are loaded, they are unable to find any matching platform_device and remain un-binded. This causes on board ONENAND flash to remain un-detected. This patch causes GPMC controller to parse DT nodes when CONFIG_MTD_ONENAND=y || CONFIG_MTD_ONENAND=m CC: <stable@vger.kernel.org> # 3.9.x+ Signed-off-by: NPekon Gupta <pekon@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Pekon Gupta 提交于
Fixes: commit bc6b1e7b ARM: OMAP: gpmc: add DT bindings for GPMC timings and NAND OMAP SoC(s) depend on GPMC controller driver to parse GPMC DT child nodes and register them platform_device for NAND driver to probe later. However this does not happen if generic MTD_NAND framework is built as module (CONFIG_MTD_NAND=m). Therefore, when MTD/NAND and MTD/NAND/OMAP2 modules are loaded, they are unable to find any matching platform_device and remain un-binded. This causes on board NAND flash to remain un-detected. This patch causes GPMC controller to parse DT nodes when CONFIG_MTD_NAND=y || CONFIG_MTD_NAND=m CC: <stable@vger.kernel.org> # 3.9.x+ Signed-off-by: NPekon Gupta <pekon@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 16 11月, 2013 1 次提交
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由 Tony Lindgren 提交于
Commit f2bf0e72 (ARM: OMAP2+: Add minimal 8250 support for GPMC) added support for using bootloader timings for some devices. Turns out we can do the same by looking at the compatible flags of the child without adding a new function as smc91x has a similar issue as 8250 with the bootloader timings. And let's fix the 8250 naming, we should use the device type as the name like uart instead of 8250 for zoom dts file. Cc: "Benoît Cousson" <bcousson@baylibre.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 07 11月, 2013 1 次提交
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由 Pekon Gupta 提交于
OMAP NAND driver support multiple ECC scheme, which can used in different flavours, depending on in-build Hardware engines present on SoC. This patch updates following in DT bindings related to sectionion of ecc-schemes - ti,elm-id: replaces elm_id (maintains backward compatibility) - ti,nand-ecc-opts: selection of h/w or s/w implementation of an ecc-scheme depends on ti,elm-id. (supported values ham1, bch4, and bch8) - maintain backward compatibility to deprecated DT bindings (sw, hw, hw-romcode) Below table shows different flavours of ecc-schemes supported by OMAP devices +---------------------------------------+---------------+---------------+ | ECC scheme |ECC calculation|Error detection| +---------------------------------------+---------------+---------------+ |OMAP_ECC_HAM1_CODE_HW |H/W (GPMC) |S/W | +---------------------------------------+---------------+---------------+ |OMAP_ECC_BCH8_CODE_HW_DETECTION_SW |H/W (GPMC) |S/W | |(requires CONFIG_MTD_NAND_ECC_BCH) | | | +---------------------------------------+---------------+---------------+ |OMAP_ECC_BCH8_CODE_HW |H/W (GPMC) |H/W (ELM) | |(requires CONFIG_MTD_NAND_OMAP_BCH && | | | | ti,elm-id in DT) | | | +---------------------------------------+---------------+---------------+ To optimize footprint of omap2-nand driver, selection of some ECC schemes also require enabling following Kconfigs, in addition to setting appropriate DT bindings - Kconfig:CONFIG_MTD_NAND_ECC_BCH error detection done in software - Kconfig:CONFIG_MTD_NAND_OMAP_BCH error detection done by h/w engine Signed-off-by: NPekon Gupta <pekon@ti.com> Reviewed-by: NFelipe Balbi <balbi@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 12 10月, 2013 1 次提交
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由 Tony Lindgren 提交于
Just initialize things using the bootloader timings like we've been doing for the legacy booting too. It should be possible to patch in the GPMC timings for the based on the TL16CP743C/TL16C754C manual at: http://www.ti.com/lit/ds/slls644g/slls644g.pdfSigned-off-by: NTony Lindgren <tony@atomide.com>
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- 19 9月, 2013 1 次提交
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由 Fabio Estevam 提交于
When CONFIG_ARM_LPAE=y the following build warning is generated: arch/arm/mach-omap2/gpmc.c:1495:4: warning: format '%x' expects argument of type 'unsigned int', but argument 4 has type 'resource_size_t' [-Wformat] According to Documentation/printk-formats.txt '%pa' can be used to properly print 'resource_size_t'. Reported-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 22 8月, 2013 1 次提交
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由 Chen Gang 提交于
'gpmc_irq_start' is mostly used as 'int', and for a variable, do not suggest to only use 'unsigned' as its type, so use 'int' instead of 'unsigned' for variable 'gpmc_irq_start'. Also it will fix the related issue (dummy the real world failure): arch/arm/mach-omap2/gpmc.c:728:2: warning: comparison of unsigned expression < 0 is always false [-Wtype-limits] Signed-off-by: NChen Gang <gang.chen@asianux.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 04 7月, 2013 1 次提交
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由 Thomas Meyer 提交于
Cocci spatch "ptr_ret.spatch" Signed-off-by: NThomas Meyer <thomas@m3y3r.de> Acked-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 18 6月, 2013 1 次提交
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由 avinash philip 提交于
GPMC is hardware controller for external memory interfaces. This patch adds suspend/resume support for GPMC driver. It also preserves GPMC register configurations across device low-power states in which GPMC hardware can be powered-off. gpmc_suspend()/gpmc_resume() are called by default by core PM framework as part of driver's runtime PM callbacks. Signed-off-by: NPhilip Avinash <avinashphilip@ti.com> Signed-off-by: NPekon Gupta <pekon@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 13 6月, 2013 2 次提交
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由 avinash philip 提交于
Support for pm_runtime add to GPMC driver. Signed-off-by: NPhilip Avinash <avinashphilip@ti.com> Signed-off-by: NPekon Gupta <pekon@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Gupta Pekon 提交于
This patch enables usage of DT property 'gpmc,num-cs' as already documented in Documentation/devicetree/bindings/bus/ti-gpmc.txt Though GPMC hardware supports upto 8 chip-selects, but all chip-selects may not be available for use because: - chip-select pin may not be bonded out at SoC device boundary. - chip-select pin-mux may conflict with other pins usage. - board level constrains. gpmc,num-cs allows user to configure maximum number of GPMC chip-selects available for use on any given platform. This ensures: - GPMC child nodes having chip-selects within allowed range are only probed. - And un-used GPMC chip-selects remain blocked.(may be for security reasons). Signed-off-by: NGupta, Pekon <pekon@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 17 5月, 2013 1 次提交
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由 Jon Hunter 提交于
Commit 8c8a7771 (ARM: OMAP2+: Add function to read GPMC settings from device-tree) added a device-tree property "gpmc,device-nand" to indicate is the GPMC child device is NAND. This commit should have updated the GPMC NAND documentation (Documentation/devicetree/bindings/mtd/gpmc-nand.txt) to list the property "gpmc,device-nand" as a required property and also updated the example. However, this property is redundant and not needed because the GPMC child device node for NAND is called "nand". Therefore, remove this property. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 16 5月, 2013 1 次提交
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由 Mark Jackson 提交于
OMAP devices support various NAND transfer modes. Currently all device-tree definitions will use the default "prefetch polled" mode, so this patch enables the transfer mode to be specified in the device-tree. Signed-off-by: NMark Jackson <mpfj@newflow.co.uk> Acked-by: NPekon Gupta <pekon@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 03 5月, 2013 1 次提交
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由 Russell King 提交于
Consistently check errors using the usual method used in the kernel for much of its history. For instance: int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t) { int div; div = gpmc_calc_divider(t->sync_clk); if (div < 0) return div; static int gpmc_set_async_mode(int cs, struct gpmc_timings *t) { ... return gpmc_cs_set_timings(cs, t); ..... ret = gpmc_set_async_mode(gpmc_onenand_data->cs, &t); if (IS_ERR_VALUE(ret)) return ret; So, gpmc_cs_set_timings() thinks any negative return value is an error, but where we check that in higher levels, only a limited range are errors... There is only _one_ use of IS_ERR_VALUE() in arch/arm which is really appropriate, and that is in arch/arm/include/asm/syscall.h: static inline long syscall_get_error(struct task_struct *task, struct pt_regs *regs) { unsigned long error = regs->ARM_r0; return IS_ERR_VALUE(error) ? error : 0; } because this function really does have to differentiate between error return values and addresses which look like negative numbers (eg, from mmap()). So, here's a patch to remove them from OMAP, except for the above. Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 30 4月, 2013 2 次提交
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由 Javier Martinez Canillas 提交于
If any of the GPMC child nodes fails, this shouldn't make the whole gpmc_probe_dt() function to fail. It is better to just WARN and allow other devices probe function to succeed. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NJon Hunter <jon-hunter@ti.com>
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由 Javier Martinez Canillas 提交于
The GPMC DT probe function use for_each_node_by_name() to search child device nodes of the GPMC controller. But this function does not use the GPMC device node as the root of the search and instead search across the complete Device Tree. This means that any device node on the DT that is using any of the GPMC child nodes names searched for will be returned even if they are not connected to the GPMC, making the gpmc_probe_xxx_child() function to fail. Fix this by using the GPMC device node as the search root so the search will be restricted to its children. Reported-by: NLars Poeschel <poeschel@lemonage.de> Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NJon Hunter <jon-hunter@ti.com>
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- 04 4月, 2013 8 次提交
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由 Javier Martinez Canillas 提交于
Besides being used to interface with external memory devices, the General-Purpose Memory Controller can be used to connect Pseudo-SRAM devices such as ethernet controllers to OMAP2+ processors using the TI GPMC as a data bus. This patch allows an ethernet chip to be defined as an GPMC child device node. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NJon Hunter <jon-hunter@ti.com>
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由 Javier Martinez Canillas 提交于
The gpmc_probe_nor_child() function is used in the GPMC driver to configure the GPMC for a NOR child device node. But this function is quite generic and all the NOR specific configuration is made by the driver of the actual NOR flash memory used. Other Pseudo-SRAM devices such as ethernet controllers need a similar setup so by making this function generic it can be used for those too. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NJon Hunter <jon-hunter@ti.com>
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由 Javier Martinez Canillas 提交于
gpmc_probe_nor_child() calls of_platform_device_create() to create a platform device for the NOR child. If this function fails the value of ret is returned to the caller but this value is zero since it was assigned the return of a previous call to gpmc_cs_program_settings() that had to succeed or otherwise gpmc_probe_nor_child() would have returned before. This means that if of_platform_device_create() fails, 0 will be returned to the caller instead of an appropriate error code. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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由 Jon Hunter 提交于
When the GPMC driver is probed, we call gpmc_mem_init() to see which chip-selects have already been configured and enabled by the boot-loader and allocate space for them. If we fail to allocate space for one chip-select, then we return failure from the probe and the GPMC driver will not be available. Rather than render the GPMC useless for all GPMC devices, if we fail to allocate space for one chip-select print a warning and disable the chip-select. This way other GPMC clients can still be used. There is no downside to this approach, because all GPMC clients need to request a chip-select before they can use the GPMC and on requesting a chip-select, if memory has not already been reserved for the chip-select then it will be. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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由 Jon Hunter 提交于
With commit 21cc2bda (ARM: OMAP2+: Remove apollon board support) the variable "boot_rom_space" is now not needed and the code surrounding this variable can be cleaned up and simplified. Remove unnecessary definitions and clean-up the comment as well. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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由 Jon Hunter 提交于
Each GPMC chip-select can be configured to map 16MB, 32MB, 64MB or 128MB of address space. The physical base address where a chip-select starts is also configurable and must be aligned on a boundary that is equal to or greater than the size of the address space mapped bt the chip-select. When enabling a GPMC chip-select, ensure that the base address is aligned to the appropriate boundary. Reported-by: NMark Jackson <mpfj-list@mimc.co.uk> Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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由 Jon Hunter 提交于
NOR flash is not currently supported when booting with device-tree on OMAP2+ devices. Add support to detect and configure NOR devices when booting with device-tree. Add documentation for the TI GPMC NOR binding. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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由 Jon Hunter 提交于
Some of the GPMC timings parameters are currently missing from the GPMC device-tree binding. Add these parameters to the binding documentation as well as code to read them. Also add either "-ps" or "-ns" suffix to the GPMC timing properties to indicate whether the timing is in picoseconds or nanoseconds. The existing code in gpmc_read_timings_dt() is checking the value of of_property_read_u32() and only is successful storing the value read in the gpmc_timings structure. Checking the return value in this case is not necessary and we can simply read the value, if present, and store directly in the gpmc_timings structure. Therefore, simplify the code by removing these checks. The comment in the gpmc_read_timings_dt() function, "only for OMAP3430" is also incorrect as it is applicable to all OMAP3+ devices. So correct this too. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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- 02 4月, 2013 10 次提交
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由 Jon Hunter 提交于
Adds a function to read the various GPMC chip-select settings from device-tree and store them in the gpmc_settings structure. Update the GPMC device-tree binding documentation to describe these options. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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由 Jon Hunter 提交于
With the addition of the gpmc_cs_program_settings(), we no longer need or use gpmc_cs_configure() to configure some of the GPMC chip-select options. So rename the function to gpmc_configure() and remove code that modifies options in the CONFIG1 register. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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由 Jon Hunter 提交于
The GPMC has various different configuration options such as bus-width, synchronous or asychronous mode selection, burst mode options etc. Currently, there is no common function for configuring these options and various devices set these options by either programming the GPMC CONFIG1 register directly or by calling gpmc_cs_configure() to set some of the options. Add a new function for configuring all of the GPMC options. Having a common function for configuring this options will simplify code and ease the migration to device-tree. Also add a new capability flag to detect devices that support the address-address-data multiplexing mode. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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由 Jon Hunter 提交于
The GPMC has various different configuration options such as bus-width, synchronous or asychronous mode selection, burst mode options etc. Currently, there is no central structure for storing all these options when configuring the GPMC for a given device. Some of the options are stored in the GPMC timing structure and some are directly programmed into the GPMC configuration register. Add a new structure to store these options and convert code to use this structure. Adding this structure will allow us to create a common function for configuring these options. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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由 Jon Hunter 提交于
The GPMC has wait-pin signals that can be assigned to a chip-select to monitor the ready signal of an external device. Add a variable to indicate the total number of wait-pins for a given device. This will allow us to detect if the wait-pin being selected is valid or not. When booting with device-tree read the number of wait-pins from the device-tree blob. When device-tree is not used set the number of wait-pins to 4 which is valid for OMAP2-5 devices. Newer devices that have less wait-pins (such as AM335x) only support booting with device-tree and so hard-coding the wait-pin number when not using device-tree is fine. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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由 Ezequiel Garcia 提交于
This check is done before the call to gpmc_cs_reserved() and gpmc_cs_set_reserved() and it's redundant to do it again in each function. This simplifies the code a bit. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Reviewed-by: NJon Hunter <jon-hunter@ti.com> Signed-off-by: NJon Hunter <jon-hunter@ti.com>
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由 Ezequiel Garcia 提交于
Currently gpmc_cs_reserved() return value is somewhat inconsistent, returning a negative value on an error condition, a positive value if the chip select is reserved and zero if it's available. Fix this by returning a boolean value as the function name suggests: * true if the chip select is reserved, * false if it's available Suggested-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Reviewed-by: NJon Hunter <jon-hunter@ti.com> Signed-off-by: NJon Hunter <jon-hunter@ti.com>
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由 Ezequiel Garcia 提交于
This function is not used anywhere, so it's safe to remove it. This means less code to maintain. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Reviewed-by: NJon Hunter <jon-hunter@ti.com> Signed-off-by: NJon Hunter <jon-hunter@ti.com>
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由 Ezequiel Garcia 提交于
This patch marks a bunch of functions that are local to gpmc.c file only as static. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Reviewed-by: NJon Hunter <jon-hunter@ti.com> Signed-off-by: NJon Hunter <jon-hunter@ti.com>
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由 Mark Jackson 提交于
When setting the GPMC device type, make sure any previous bits are cleared down, before applying the new setting. For OMAP4+ devices MUXADDDATA is a 2-bit field (bits 9:8) where as for OMAP2/3 devices it was only a one bit field (bit 9). For OMAP2/3 devices bit 8 is reserved and the OMAP documentation says to write a 0 to this bit. So clearing bit 8 on OMAP2/3 devices should not be a problem. Hence update the code to handle both bits 8 and 9 for all devices. Signed-off-by: NMark Jackson <mpfj@newflow.co.uk> [jon-hunter@ti.com: updated changelog] Signed-off-by: NJon Hunter <jon-hunter@ti.com>
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- 14 3月, 2013 1 次提交
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由 Russell King 提交于
Consistently check errors using the usual method used in the kernel for much of its history. For instance: int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t) { int div; div = gpmc_calc_divider(t->sync_clk); if (div < 0) return div; static int gpmc_set_async_mode(int cs, struct gpmc_timings *t) { ... return gpmc_cs_set_timings(cs, t); ..... ret = gpmc_set_async_mode(gpmc_onenand_data->cs, &t); if (IS_ERR_VALUE(ret)) return ret; So, gpmc_cs_set_timings() thinks any negative return value is an error, but where we check that in higher levels, only a limited range are errors... There is only _one_ use of IS_ERR_VALUE() in arch/arm which is really appropriate, and that is in arch/arm/include/asm/syscall.h: static inline long syscall_get_error(struct task_struct *task, struct pt_regs *regs) { unsigned long error = regs->ARM_r0; return IS_ERR_VALUE(error) ? error : 0; } because this function really does have to differentiate between error return values and addresses which look like negative numbers (eg, from mmap()). So, here's a patch to remove them from OMAP, except for the above. Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 05 3月, 2013 1 次提交
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由 Jon Hunter 提交于
Commit 6797b4fe (ARM: OMAP2+: Prevent potential crash if GPMC probe fails) added code to ensure that GPMC chip-selects could not be requested until the device probe was successful. The chip-selects should have been unreserved at the end of the probe function, but the code to unreserve them appears to have ended up in the gpmc_calc_timings() function and hence, this is causing problems requesting chip-selects. Fix this merge error by unreserving the chip-selects at the end of the probe, but before we call the gpmc child probe functions (for device-tree) which request a chip-select. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NPhilip Avinash <avinashphilip@ti.com> Tested-by: NGrazvydas Ignotas <notasas@gmail.com> [tony@atomide.com: updated description to add breaking commit id] Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 02 2月, 2013 4 次提交
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由 Ezequiel Garcia 提交于
This patch adds device tree bindings for OMAP OneNAND devices. Tested on an OMAP3 3430 IGEPv2 board. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Jon Hunter 提交于
If the GPMC probe fails, devices that use the GPMC (such as ethernet chips, flash memories, etc) can still allocate a GPMC chip-select and register the device. On the OMAP2420 H4 board, this was causing the kernel to crash after the gpmc probe failed and the board attempted to start networking. Prevent this by marking all the chip-selects as reserved by default and only make them available for devices to request if the GPMC probe succeeds. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Ezequiel Garcia 提交于
for_each_node_by_name() automatically calls of_node_put() on each node passed; so don't do it explicitly unless there's an error. Reported-by: NMark Rutland <mark.rutland@arm.com> Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: NJon Hunter <jon-hunter@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Kyungmin Park 提交于
As apollon board doesn't used anymore, remove it. Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> [tony@atomide.com: dropped uncompress.h changes, it's gone] Signed-off-by: NTony Lindgren <tony@atomide.com>
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