An rv515 laptop I got wouldn't startup with a montior plugged in,
found the proper bug hopefully with us not turning off D2VGA
here when we should.
Signed-off-by: NDave Airlie <airlied@redhat.com>

We did this on the userspace side, but we need a similar fix for the
kernel.

Fixes LP #460664.
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
Cc: stable@kernel.org
Signed-off-by: NDave Airlie <airlied@redhat.com>

AGP resume was broken since we moved to the new init path,
because we never re-enabled AGP on these systems at resume time.

This patch just calls the AGP resume call which just does the reinit
at resume time like the old path did.

Since AGP is pretty much gpu independant I did it outside
the gpu specific code.
Signed-off-by: NDave Airlie <airlied@redhat.com>

Signed-off-by: NJosh Triplett <josh@joshtriplett.org>

Fixes fdo bug 24710.
Signed-off-by: NFrancisco Jerez <currojerez@riseup.net>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Add some additional regs that require relocs.
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Signed-off-by: NRafał Miłecki <zajec5@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Generally this is done at post, but might not always be done
with softboot or for connectors on docking stations.

Could probably be done once when the driver loads/resumes
rather than on each mode set.
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

This will be useful for mode validation and certain
atom tables.
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Lots of cases were wrong or missing.

v2: rebased against drm-next
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Noticed by Andre on IRC.

Also fix up some minor whitespace issues.
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

The Lenovo W500 laptop hangs inside an SMI on brightness changes,
I thought it just needed the VGA disable but it turned out to require
slightly more work, setting the MC locations up just like the IGP
chip requirements seems to make it all happy again and I can boot
and play with brightness.

We should probably just do this for all chips and give up the VRAM
at 0x0 idea, it never seems to buy us anything but pain.
Signed-off-by: NDave Airlie <airlied@redhat.com>

Once kms is enabled we don't need these, and it causes a problem
with the Lenovo W500 ACPI brightness implementation, it hangs
in a loop inside an SMI.
Signed-off-by: NDave Airlie <airlied@redhat.com>

Immediate readback seems faulty on some chips.  I
suspect it takes a while to get through the fifo
to the actual register backbone.  There's no need
to read it back, so, just write the driver's copy
of the register's value directly.

Should fix bug 24535 and possibly 24218
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

When we are evicting from VRAM->RAM we allocate the ttm object,
but we don't set the caching policy on it before blitting into it.
This means on AGP we end up blitting into cached pages, and
the CPU later flushes out on top of them. This was mostly seen as
font corruption.

The other question is why we don't evict VRAM->GTT in a lot of cases,
this would save us some cache transitions since a lot of objects
that are evicted from VRAM will probably end up being pulled back in
a few operations later, and evicting them to system memory involves
2 unnecessary cache transitions.
Signed-off-by: NDave Airlie <airlied@redhat.com>

In commit c1c7af60 ("drm/i915: force
mode set at lid open time") the intel graphics driver was taught to
restore the LVDS mode on lid open.

That caused problems with interaction with the suspend/resume code,
which commonly runs at the same time (suspend is often caused by the lid
close event, while lid open is commonly a resume event), which was
worked around with in commit 06891e27
("drm/i915: fix suspend/resume breakage in lid notifier").

However, in the meantime the lid event code had also grown a user event
notifier (commit 06324194: "drm/i915:
generate a KMS uevent at lid open/close time"), and now _that_ causes
problems with suspend/resume and some versions of Xorg reacting to those
uevents by setting the mode.

So this effectively reverts that commit 06324194, and makes the lid
open protection logic against suspend/resume more explicit.  This fixes
at least one laptop. See

	http://bugzilla.kernel.org/show_bug.cgi?id=14484

for more details.
Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org>
Cc: Riccardo Magliocchetti <riccardo.magliocchetti@gmail.com>
Cc: Eric Anholt <eric@anholt.net>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

This fixes suspend/resume on my rc410 motherboard, it restores
the memory controller setup before posting the GPU, since it seems
to need the MC_FB_LOCATION setup correctly.
Signed-off-by: NDave Airlie <airlied@redhat.com>

Doesn't have a tv-out port
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Make sure we have an LVDS encoder before casting enc_priv.

[airlied: also fix two missing cpu_to_le16 casts we noticed on irc]
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

I believe this is a typo.
Signed-off-by: NDave Airlie <airlied@redhat.com>

Make the struct card_info, which is a per struct radeon_device dataset, a
struct member of the radeon device instead of a static per kernel module
value. This should avoid potential problems with two radeon cards installed in
one system.
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

DVO in 12 bit mode (which seems to be the most common
config) requires 2x ppll.

Fixes fdo bug 21857.
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Limiting the pll output range is a good thing generally as
it limits the number of possible pll combinations for a given
frequency presumably to the ones that work best on each card.
That's why the limits are in the bios tables. However, certain
duallink DVI monitors seem to like pll combinations that would
be limited by this at least on pre-DCE 3.0 r6xx hardware.  This
might need to be adjusted per family or per clock range in the
future.

See fdo bug 24727.
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

This sets the fbcon to use TRUECOLOR by default, it then
only modifies the pseudo palette for fbcon, and only touches
the real palette when in 8-bit pseudo color mode.
Signed-off-by: NDave Airlie <airlied@redhat.com>

Sometimes we will get the incorrect display modeline when parsing the detailed
timing in EDID. For example:
   >hsync/vsync width is zero
   >sync is beyond the blank.

So add the basic check for the detailed timing in EDID to avoid the incorrect
display modeline.
Signed-off-by: NZhao Yakui <yakui.zhao@intel.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Since we register all radeon devices, and the arbiter only cares about
VGA class ones, we will fail to startup on display controller class devices.
We don't gain anything by using the return value here.

this helps kms on sparc64 get started.
Reported-by: NDavid S. Miller <davem@davemloft.net>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Try to enable msi on chips that support it.
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Spread spectrum is a periodic disturbance added
to the feedback divider to change the pixel clock
periodically to reduce interference.

Only enabled on LVDS.

v2: add support for r4xx and fix DCE 3
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

The *_HIGH regs are reversed. The secondary ones are in the
primary block and vice versa.

We currently only use a 32 bit internal address, so these are
0 for now.
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

This patch only changes this is the swap path, where it doesn't loop.
Signed-off-by: NRobert Noland <rnoland@2hip.net>
Signed-off-by: NDave Airlie <airlied@redhat.com>

- Reduce the chance of error and avoid a bit of overhead.
  - Use switch to assign color and format
Signed-off-by: NRobert Noland <rnoland@2hip.net>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Where supported use ulMinPixelClockPLL_Output rather than
usMinPixelClockPLL_Output for pll_out_min.  This seems to
improve pll selection on some boards.
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

doesn't have a tv-out port
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

The problem boils down to the order when the bit11
of the texture size is or'ed to the original width.
In the end each mipmap level has the same width or
height because of that 11 bit is ored to the scaled
down lod with and thus blows up the size again to the
full size or more due to the power of two rounding
afterwards.

The attached patch changes this order so that the
texture sizes are computed correct. Also the on error
the yet missing inputs to the size computation are
printed which helped me to find out where it really breaks.
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: NDave Airlie <airlied@redhat.com>

This sets the fbcon to use TRUECOLOR by default, it then
only modifies the pseudo palette for fbcon, and only touches
the real palette when in 8-bit pseudo color mode.
Signed-off-by: NDave Airlie <airlied@redhat.com>

This adds registers save/restore for Ironlake to make suspend work.
Signed-off-by: NGuo, Chaohong <chaohong.guo@intel.com>
[zhenyuw: some code re-orgnization, and add more save/restore for
FDI link and transcoder registers, also fix palette register for Ironlake]
Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: NEric Anholt <eric@anholt.net>