1. 29 6月, 2015 6 次提交
  2. 02 6月, 2015 2 次提交
  3. 01 6月, 2015 1 次提交
  4. 30 5月, 2015 2 次提交
  5. 29 5月, 2015 1 次提交
  6. 28 5月, 2015 2 次提交
    • T
      ARM: OMAP3: Fix booting with thumb2 kernel · d8a50941
      Tony Lindgren 提交于
      We get a NULL pointer dereference on omap3 for thumb2 compiled kernels:
      
      Internal error: Oops: 80000005 [#1] SMP THUMB2
      ...
      [<c046497b>] (_raw_spin_unlock_irqrestore) from [<c0024375>]
      (omap3_enter_idle_bm+0xc5/0x178)
      [<c0024375>] (omap3_enter_idle_bm) from [<c0374e63>]
      (cpuidle_enter_state+0x77/0x27c)
      [<c0374e63>] (cpuidle_enter_state) from [<c00627f1>]
      (cpu_startup_entry+0x155/0x23c)
      [<c00627f1>] (cpu_startup_entry) from [<c06b9a47>]
      (start_kernel+0x32f/0x338)
      [<c06b9a47>] (start_kernel) from [<8000807f>] (0x8000807f)
      
      The power management related assembly on omaps needs to interact with
      ARM mode bootrom code, so we need to keep most of the related assembly
      in ARM mode.
      
      Turns out this error is because of missing ENDPROC for assembly code
      as suggested by Stephen Boyd <sboyd@codeaurora.org>. Let's fix the
      problem by adding ENDPROC in two places to sleep34xx.S.
      
      Let's also remove the now duplicate custom code for mode switching.
      This has been unnecessary since commit 6ebbf2ce ("ARM: convert
      all "mov.* pc, reg" to "bx reg" for ARMv6+").
      
      And let's also remove the comments about local variables, they are
      now just confusing after the ENDPROC.
      
      The reason why ENDPROC makes a difference is it sets .type and then
      the compiler knows what to do with the thumb bit as explained at:
      
      https://wiki.ubuntu.com/ARM/Thumb2PortingHowtoReported-by: NKevin Hilman <khilman@kernel.org>
      Tested-by: NKevin Hilman <khilman@linaro.org>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      d8a50941
    • I
      ARM: mvebu: armada-xp-linksys-mamba: Disable internal RTC · 2ff9ab4c
      Imre Kaloz 提交于
      The Mamba (like the OpenBlocks AX3) doesn't have a crystal
      connected to the internal RTC - let's prevent the kernel from
      probing it.
      Signed-off-by: NImre Kaloz <kaloz@openwrt.org>
      Cc: <stable@vger.kernel.org> # v4.0 +
      Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
      2ff9ab4c
  7. 27 5月, 2015 2 次提交
    • L
      ARM: imx6: gpc: don't register power domain if DT data is missing · b17c70cd
      Lucas Stach 提交于
      If the devicetree is too old and does not provide the regulator and clocks
      for the power domain, we need to avoid registering the power domain.
      Otherwise runtime PM will try to control the domain, which will lead to
      machine hangs without the proper DT configuration data.
      
      This restores functionality to the kernel 4.0 level if an old DT is
      detected, where the power domain is constantly powered on.
      Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
      Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
      b17c70cd
    • L
      ARM: imx6: allow booting with old DT · 634a6037
      Lucas Stach 提交于
      The GPC rewrite to IRQ domains has been on the premise that it may break
      suspend/resume for new kernels on old DT, but otherwise keep things working
      from a user perspective. This was an accepted compromise to be able to move
      the GIC cleanup forward.
      
      What actually happened was that booting a new kernel on an old DT crashes
      before even the console is up, so the user does not even see the warning
      that the DT is too old. The warning message suggests that this has been
      known before, which is clearly unacceptable.
      
      Fix the early crash by mapping the GPC memory space if the IRQ controller
      doesn't claim it. This keeps at least CPUidle and the needed CPU wakeup
      workarounds working. With this fixed the system is able to boot up
      properly minus the expected suspend/resume breakage.
      Signed-off-by: NLucas Stach <l.stach@pengutronix.de>
      Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
      634a6037
  8. 23 5月, 2015 2 次提交
  9. 22 5月, 2015 1 次提交
  10. 21 5月, 2015 3 次提交
  11. 19 5月, 2015 2 次提交
  12. 18 5月, 2015 1 次提交
  13. 15 5月, 2015 1 次提交
    • R
      ARM: fix missing syscall trace exit · 1b979372
      Russell King 提交于
      Josh Stone reports:
      
        I've discovered a case where both arm and arm64 will miss a ptrace
        syscall-exit that they should report.  If the syscall is entered
        without TIF_SYSCALL_TRACE set, then it goes on the fast path.  It's
        then possible to have TIF_SYSCALL_TRACE added in the middle of the
        syscall, but ret_fast_syscall doesn't check this flag again.
      
      Fix this by always checking for a syscall trace in the fast exit path.
      Reported-by: NJosh Stone <jistone@redhat.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      1b979372
  14. 14 5月, 2015 4 次提交
  15. 13 5月, 2015 4 次提交
    • H
      Revert "ARM: rockchip: fix undefined instruction of reset_ctrl_regs" · 3f937cf3
      Heiko Stuebner 提交于
      This reverts commit b403125d.
      
      As reported by Chris, both commits
              b403125d "ARM: rockchip: fix undefined instruction of reset_ctrl_regs"
              0ea001d3 "ARM: rockchip: disable dapswjdp during suspend"
      actually fix the same issue and b403125d is the older one, which got
      superseded by 0ea001d3. Therefore revert the obsolete one again.
      Reported-by: NChris Zhong <zyw@rock-chips.com>
      Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
      3f937cf3
    • K
      ARM: EXYNOS: Fix dereference of ERR_PTR returned by of_genpd_get_from_provider · 0b7dc0ff
      Krzysztof Kozlowski 提交于
      ERR_PTR was dereferenced during sub domain parsing, if parent domain
      could not be obtained (because of invalid phandle or deferred
      registration of parent domain).
      
      The Exynos power domain code checked whether
      of_genpd_get_from_provider() returned NULL and in that case it skipped
      that power domain node. However this function returns ERR_PTR or valid
      pointer, not NULL.
      
      Fixes: 0f780751 ("ARM: EXYNOS: add support for sub-power domains")
      Cc: <stable@vger.kernel.org>	[4.0+]
      Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
      Signed-off-by: NKukjin Kim <kgene@kernel.org>
      0b7dc0ff
    • J
      ARM: EXYNOS: Don't try to initialize suspend on old DT · e5cbec61
      Julien Grall 提交于
      Since commit 8b283c02 ("ARM: exynos4/5: convert pmu wakeup to
      stacked domains"), a suspend/resume is not supported on old DT.
      
      Although, rather than printing a warning and continue to boot, the
      kernel will segfault just after:
      
      ------------[ cut here ]------------
      
      WARNING: CPU: 1 PID: 1 at arch/arm/mach-exynos/suspend.c:726 exynos_pm_init+0x4c/0xc8()
      Modules linked in:
      CPU: 1 PID: 1 Comm: swapper/0 Not tainted 4.1.0-rc3 #1
      Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
      [<c02181c4>] (unwind_backtrace) from [<c0213b2c>] (show_stack+0x10/0x14)
      [<c0213b2c>] (show_stack) from [<c0949890>] (dump_stack+0x70/0x8c)
      [<c0949890>] (dump_stack) from [<c024f0b0>] (warn_slowpath_common+0x74/0xac)
      [<c024f0b0>] (warn_slowpath_common) from [<c024f104>] (warn_slowpath_null+0x1c/0x24)
      [<c024f104>] (warn_slowpath_null) from [<c0cf1d28>] (exynos_pm_init+0x4c/0xc8)
      [<c0cf1d28>] (exynos_pm_init) from [<c0ceaae8>] (init_machine_late+0x1c/0x28)
      [<c0ceaae8>] (init_machine_late) from [<c020aa64>] (do_one_initcall+0x80/0x1d0)
      [<c020aa64>] (do_one_initcall) from [<c0ce8d4c>] (kernel_init_freeable+0x10c/0x1d8)
      [<c0ce8d4c>] (kernel_init_freeable) from [<c0944a2c>] (kernel_init+0x8/0xe4)
      [<c0944a2c>] (kernel_init) from [<c0210e60>] (ret_from_fork+0x14/0x34)
      ---[ end trace 335bd937d409f3c7 ]---
      Outdated DT detected, suspend/resume will NOT work
      Unable to handle kernel NULL pointer dereference at virtual address 00000608
      pgd = c0204000
      [00000608] *pgd=00000000
      Internal error: Oops: 5 [#1] SMP ARM
      Modules linked in:
      CPU: 1 PID: 1 Comm: swapper/0 Tainted: G        W       4.1.0-rc3 #1
      Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
      task: db06c000 ti: db05a000 task.ti: db05a000
      PC is at exynos_pm_init+0x6c/0xc8
      LR is at exynos_pm_init+0x54/0xc8
      pc : [<c0cf1d48>]    lr : [<c0cf1d30>]    psr: 60000113
      sp : db05bee8  ip : 00000000  fp : 00000000
      r10: 00000116  r9 : c0dab2d4  r8 : d8d5f440
      r7 : c0db7ad8  r6 : c0db7ad8  r5 : 00000000  r4 : c0ceaacc
      r3 : c0eb2aec  r2 : c0951e40  r1 : 00000000  r0 : c0eb2acc
      Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
      Control: 10c5387d  Table: 6020406a  DAC: 00000015
      Process swapper/0 (pid: 1, stack limit = 0xdb05a220)
      Stack: (0xdb05bee8 to 0xdb05c000)
      bee0:                   c0db7ad8 c0d8fe34 c0cf17c8 c0ceaae8 00000000 c020aa64
      bf00: 00000033 c09580b8 db04fd00 c0ed79a4 c0eb1000 c0ce8588 c0ca2bc4 c0353fcc
      bf20: 00000000 c0df358c 60000113 00000000 dbfffba4 00000000 c0ca2bc4 c026654c
      bf40: c0b80134 c0ca1a64 00000007 00000007 c0df3554 c0d6c2f4 00000007 c0d6c2d4
      bf60: c0eb1000 c0ce8588 c0dab2d4 00000116 00000000 c0ce8d4c 00000007 00000007
      bf80: c0ce8588 c0944a24 00000000 c0944a24 00000000 00000000 00000000 00000000
      bfa0: 00000000 c0944a2c 00000000 c0210e60 00000000 00000000 00000000 00000000
      bfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
      bfe0: 00000000 00000000 00000000 00000000 00000013 00000000 00000000 00000000
      [<c0cf1d48>] (exynos_pm_init) from [<c0ceaae8>] (init_machine_late+0x1c/0x28)
      [<c0ceaae8>] (init_machine_late) from [<c020aa64>] (do_one_initcall+0x80/0x1d0)
      [<c020aa64>] (do_one_initcall) from [<c0ce8d4c>] (kernel_init_freeable+0x10c/0x1d8)
      [<c0ce8d4c>] (kernel_init_freeable) from [<c0944a2c>] (kernel_init+0x8/0xe4)
      [<c0944a2c>] (kernel_init) from [<c0210e60>] (ret_from_fork+0x14/0x34)
      Code: e59f005c e59220c0 e5901000 e5832000 (e591e608)
      ---[ end trace 335bd937d409f3c8 ]---
      
      This is happening because pmu_base_addr is only initialized when the
      PMU is an interrupt controller. It's not the case on old DT.
      Signed-off-by: NJulien Grall <julien.grall@citrix.com>
      Signed-off-by: NKukjin Kim <kgene@kernel.org>
      e5cbec61
    • J
      ARM: dts: Add keep-power-in-suspend to WiFi SDIO node for Peach Boards · b2706879
      Javier Martinez Canillas 提交于
      The Marvell mwifiex driver prevents the system to enter into a suspend
      state if the card power is not preserved during a suspend/resume cycle.
      
      So Suspend-to-RAM and Suspend-to-idle is failing on Exynos5800 Peach Pi
      and Exynos5420 Peach Pit Chromebooks.
      
      Add the keep-power-in-suspend Power Management property to the SDIO/MMC
      node so the mwifiex suspend handler doesn't fail and the system is able
      to enter into a suspend state.
      Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
      Reviewed-by: NDoug Anderson <dianders@chromium.org>
      Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
      Signed-off-by: NKukjin Kim <kgene@kernel.org>
      b2706879
  16. 12 5月, 2015 5 次提交
  17. 11 5月, 2015 1 次提交