- 31 8月, 2009 1 次提交
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由 Anton Vorontsov 提交于
In some CPUs (i.e. MPC8569) QE shuts down completely during sleep, drivers may want to know that to reinitialize registers and buffer descriptors. This patch implements qe_alive_during_sleep() helper function, so far it just checks if MPC8569-compatible power management controller is present, which is a sign that QE turns off during sleep. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 08 7月, 2009 2 次提交
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由 Anton Vorontsov 提交于
This patch fixes various badnesses like this for all interrupt controllers: ------------[ cut here ]------------ Badness at c04db9dc [verbose debug info unavailable] NIP: c04db9dc LR: c04db9ac CTR: 00000000 REGS: c053de30 TRAP: 0700 Not tainted (2.6.31-rc1-00432-ge69b2b5-dirty) MSR: 00021000 <ME,CE> CR: 22020084 XER: 00000000 TASK = c0500480[0] 'swapper' THREAD: c053c000 GPR00: 00000001 c053dee0 c0500480 00000000 00000050 00000020 3fffffff 00000000 GPR08: 00000001 c0540000 e0080080 00000000 22000084 64183600 3ff8f800 00000000 GPR16: 841b0240 449a0303 00000000 00000000 00000000 00000000 00000000 c04f5bf4 GPR24: 00000000 00000000 00000000 00000050 00000020 00000000 3fffffff 00000050 NIP [c04db9dc] alloc_arch_preferred_bootmem+0x48/0x74 LR [c04db9ac] alloc_arch_preferred_bootmem+0x18/0x74 Call Trace: [c053dee0] [c000a5a4] __of_address_to_resource+0x44/0xd0 (unreliable) [c053def0] [c04dba58] ___alloc_bootmem_nopanic+0x50/0x108 [c053df20] [c04dbb28] ___alloc_bootmem+0x18/0x50 [c053df30] [c04d5de0] qe_ic_init+0x5c/0x1b0 [c053df70] [c04d77b0] mpc85xx_mds_pic_init+0xb8/0x10c [c053dfb0] [c04cf374] init_IRQ+0x28/0x3c p.s. commit 85355bb2 ("powerpc: Fix mpic alloc warning") missed some alloc_bootmem() instances, this is now fixed. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Acked-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Joe Perches 提交于
Signed-off-by: NJoe Perches <joe@perches.com> Acked-by: NGeoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 26 6月, 2009 2 次提交
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由 Kumar Gala 提交于
Since we can use kmalloc earlier we are getting the following since the mpic_alloc() code calls alloc_bootmem(). Move to using kzalloc() to remove the warning. ------------[ cut here ]------------ Badness at c0583248 [verbose debug info unavailable] NIP: c0583248 LR: c0583210 CTR: 00000004 REGS: c0741de0 TRAP: 0700 Not tainted (2.6.30-06736-g12a31df) MSR: 00021000 <ME,CE> CR: 22024024 XER: 00000000 TASK = c070d3b8[0] 'swapper' THREAD: c0740000 CPU: 0 <6>GPR00: 00000001 c0741e90 c070d3b8 00000001 00000210 00000020 3fffffff 00000000 <6>GPR08: 00000000 c0c85700 c04f8c40 0000002d 22044022 1004a388 7ffd9400 00000000 <6>GPR16: 00000000 7ffcd100 7ffcd100 7ffcd100 c04f8c40 00000000 c059f62c c075a0c0 <6>GPR24: c059f648 00000000 0000000f 00000210 00000020 00000000 3fffffff 00000210 NIP [c0583248] alloc_arch_preferred_bootmem+0x50/0x80 LR [c0583210] alloc_arch_preferred_bootmem+0x18/0x80 Call Trace: [c0741e90] [c07343b0] devtree_lock+0x0/0x24 (unreliable) [c0741ea0] [c0583b14] ___alloc_bootmem_nopanic+0x54/0x108 [c0741ee0] [c0583e18] ___alloc_bootmem+0x18/0x50 [c0741ef0] [c057b9cc] mpic_alloc+0x48/0x710 [c0741f40] [c057ecf4] mpc85xx_ds_pic_init+0x190/0x1b8 [c0741f90] [c057633c] init_IRQ+0x24/0x34 [c0741fa0] [c05738b8] start_kernel+0x260/0x3dc [c0741ff0] [c00003c8] skpinv+0x2e0/0x31c Instruction dump: 409e001c 7c030378 80010014 83e1000c 38210010 7c0803a6 4e800020 3d20c0c8 39295700 80090004 7c000034 5400d97e <0f000000> 2f800000 409e001c 38800000 BenH: Changed to use GFP_KERNEL, the allocator will do the right thing Signed-off-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Benjamin Herrenschmidt 提交于
Commit 31207dab "Fix incorrect allocation of interrupt rev-map" introduced a regression crashing on boot on machines using a "DCR" based MPIC, such as the Cell blades. The reason is that the irq host data structure is initialized much later as a result of that patch, causing our calls to mpic_map() do be done before we have a host setup. Unfortunately, this breaks _mpic_map_dcr() which uses the mpic->irqhost to get to the device node. This fixes it by, instead, passing the device node explicitely to mpic_map(). Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: NAkira Tsukamoto <akirat@rd.scei.sony.co.jp>
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- 23 6月, 2009 1 次提交
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由 Timur Tabi 提交于
The qe_issue_cmd() function (Freescale PowerPC QUICC Engine library) polls on a register until a status bit changes, but does not include a timeout to handle the situation if the bit never changes. Change the code to use the new spin_event_timeout() macro, which simplifies polling on a register without a timeout. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 17 6月, 2009 1 次提交
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由 Wolfgang Denk 提交于
So far, MPC512x used mpc512x_find_ips_freq() to get the bus frequency, while MPC52xx used mpc52xx_find_ipb_freq(). Despite the different clock names (IPS vs. IPB) the code was identical. Use common code for both processor families. Signed-off-by: NWolfgang Denk <wd@denx.de> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 16 6月, 2009 1 次提交
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由 Michael Ellerman 提交于
Add the option to build the code under arch/powerpc with -Werror. The intention is to make it harder for people to inadvertantly introduce warnings in the arch/powerpc code. It needs to be configurable so that if a warning is introduced, people can easily work around it while it's being fixed. The option is a negative, ie. don't enable -Werror, so that it will be turned on for allyes and allmodconfig builds. The default is n, in the hope that developers will build with -Werror, that will probably lead to some build breaks, I am prepared to be flamed. It's not enabled for math-emu, which is a steaming pile of warnings. Signed-off-by: NMichael Ellerman <michael@ellerman.id.au> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 07 6月, 2009 3 次提交
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由 Roderick Colenbrander 提交于
Signed-off-by: NRoderick Colenbrander <thunderbird2k@gmail.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Grant Likely 提交于
This patch refactors some of the xilinx_intc interrupt controller driver and adds support for cascading an i8259 off one of the irq lines. This patch was based on the ML510 support work done by Roderick Colenbrander. Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Roderick Colenbrander 提交于
This patch adds support for the Xilinx plbv46-pci-1.03.a PCI host bridge IPcore. Signed-off-by: NRoderick Colenbrander <thunderbird2k@gmail.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 23 5月, 2009 1 次提交
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由 Martin K. Petersen 提交于
Until now we have had a 1:1 mapping between storage device physical block size and the logical block sized used when addressing the device. With SATA 4KB drives coming out that will no longer be the case. The sector size will be 4KB but the logical block size will remain 512-bytes. Hence we need to distinguish between the physical block size and the logical ditto. This patch renames hardsect_size to logical_block_size. Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com> Signed-off-by: NJens Axboe <jens.axboe@oracle.com>
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- 21 5月, 2009 5 次提交
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由 Kumar Gala 提交于
We shouldn't directly access sysdata to get the pci_controller. Instead use pci_bus_to_host() for this purpose. In the future we might have sysdata be a device_node to match ppc64 and unify the code between ppc32 & ppc64. Signed-off-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Kumar Gala 提交于
We shouldn't directly access sysdata to get the pci_controller. Instead use pci_bus_to_host() for this purpose. In the future we might have sysdata be a device_node to match ppc64 and unify the code between ppc32 & ppc64. Signed-off-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Kumar Gala 提交于
We shouldn't directly access sysdata to get the pci_controller. Instead use pci_bus_to_host() for this purpose. In the future we might have sysdata be a device_node to match ppc64 and unify the code between ppc32 & ppc64. Signed-off-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Kumar Gala 提交于
We shouldn't directly access sysdata to get the pci_controller. Instead use pci_bus_to_host() for this purpose. In the future we might have sysdata be a device_node to match ppc64 and unify the code between ppc32 & ppc64. Signed-off-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Tony Breeds 提交于
mpic_find() was overloaded to do two things, finding the mpic instance for a given interrupt and returning if it's an IPI. Instead we introduce mpic_is_ipi() and simplify mpic_find() to just return the mpic instance Also silences the warning: arch/powerpc/sysdev/mpic.c: In function 'mpic_irq_set_priority': arch/powerpc/sysdev/mpic.c:1382: warning: 'is_ipi' may be used uninitialized in this function Signed-off-by: NTony Breeds <tony@bakeyournoodle.com> Acked-by: NMichael Ellerman <michael@ellerman.id.au> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 19 5月, 2009 11 次提交
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由 Kumar Gala 提交于
Previouslly we just always set the inbound window to 2G. This was broken for systems with >2G. If a system has >=4G we will need SWIOTLB support to handle that case. We now allocate PCICSRBAR/PEXCSRBAR right below the lowest PCI outbound address for MMIO or the 4G boundary (if the lowest PCI address is above 4G). Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
The P2020 is a dual e500v2 core based SOC with: * 3 PCIe controllers * 2 General purpose DMA controllers * 2 sRIO controllers * 3 eTSECS * USB 2.0 * SDHC * SPI, I2C, DUART * enhanced localbus * and optional Security (P2020E) security w/XOR acceleration The p2020 DS reference board is pretty similar to the existing MPC85xx DS boards and has a ULI 1575 connected on one of the PCIe controllers. Signed-off-by: NTed Peters <Ted.Peters@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Li Yang 提交于
Instead of fixed address in old code. Signed-off-by: NLi Yang <leoli@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
We we build with resource_size_t as a 64-bit quantity we get: arch/powerpc/sysdev/fsl_rio.c: In function 'fsl_rio_setup': arch/powerpc/sysdev/fsl_rio.c:1029: warning: format '%08x' expects type 'unsigned int', but argument 4 has type 'resource_size_t' arch/powerpc/sysdev/fsl_rio.c:1029: warning: format '%08x' expects type 'unsigned int', but argument 5 has type 'resource_size_t' Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
Its feasible based on how the PCI address map is setup that the region of PCI address space used for MSIs differs for each PHB on the same SoC. Instead of assuming that the address mappes to CCSRBAR 1:1 we read PEXCSRBAR (BAR0) for the PHB that the given pci_dev is on. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Anton Vorontsov 提交于
This patch adds PCI IDs for MPC8569 and MPC8569E processors, plus adds appropriate quirks for these IDs, and thus makes PCI-E actually work on MPC8569E-MDS boards. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Haiying Wang 提交于
The latest QE chip may have more Serial Number(SNUM)s of thread to use. We will get the number of SNUMs from device tree by reading the new property "fsl,qe-num-snums", and set 28 as the default number of SNUMs so that it is compatible with the old QE chips' device trees which don't have this new property. The macro QE_NUM_OF_SNUM is defined as the maximum number in QE snum table which is 256. Also we update the snum_init[] array with 18 more new SNUMs which are confirmed to be useful on new chip. Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com> Acked-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Haiying Wang 提交于
Change the RISC allocation to macros instead of enum, add function to read the number of risc engines from the new property "fsl,qe-num-riscs" under the qe node in dts. Add new property "fsl,qe-num-riscs" description in qe.txt Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com> Acked-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
Kill of some old defines and macros that we no longer use like CPM_MAP_ADDR and CPM_IRQ_OFFSET. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Becky Bruce 提交于
Also, convert them to resource_size_t (which is unsigned long on 64-bit, so it's not a change there). We will be using these on fsl 32b to indicate the start and size address of memory that the pci controller can actually reach - this is needed to determine if an address requires bounce buffering. For now, initialize them to a standard value; in the near future, the value will be calculated based on how the inbound windows are programmed. Signed-off-by: NBecky Bruce <beckyb@kernel.crashing.org> Acked-by: NBen Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
The rstcr register mapping code was written sometime ago before of_iomap() existed. We can use it and clean up the code a bit and get rid of one user of get_immrbase() in the process. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 15 5月, 2009 2 次提交
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由 Kumar Gala 提交于
Before when we were setting up the irq host map for mpic we passed in just isu_size for the size of the linear map. However, for a number of mpic implementations we have no isu (thus pass in 0) and will end up with a no linear map (size = 0). This causes us to always call irq_find_mapping() from mpic_get_irq(). By moving the allocation of the host map to after we've determined the number of sources we can actually benefit from having a linear map for the non-isu users that covers all the interrupt sources. Signed-off-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 John Linn 提交于
The interrupt controller was not handling level interrupts correctly such that duplicate interrupts were happening. This fixes the problem and adds edge type interrupts which are needed in Xilinx hardware. Signed-off-by: NJohn Linn <john.linn@xilinx.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 09 5月, 2009 1 次提交
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由 Anton Vorontsov 提交于
commit b31a1d8b ("gianfar: Convert gianfar to an of_platform_driver"), possibly due merge issues, reintroduced completely unneded mpc83xx_wdt_init call, which I removed some time ago in commit 20d38e01 ("powerpc/fsl_soc: remove mpc83xx_wdt code"). Remove it once again. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 06 5月, 2009 1 次提交
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由 Ingo Molnar 提交于
This build failure: arch/powerpc/sysdev/mpic.c:810: error: conflicting types for 'mpic_set_affinity' arch/powerpc/sysdev/mpic.h:39: error: previous declaration of 'mpic_set_affinity' was here make[2]: *** [arch/powerpc/sysdev/mpic.o] Error 1 make[2]: *** Waiting for unfinished jobs.... Triggers because the function prototype was not updated when the function call signature got changed by: d5dedd45: irq: change ->set_affinity() to return status [ Impact: build fix on powerpc ] Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: linux-arch@vger.kernel.org LKML-Reference: <49F654E9.4070809@kernel.org> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 28 4月, 2009 1 次提交
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由 Yinghai Lu 提交于
according to Ingo, change set_affinity() in irq_chip should return int, because that way we can handle failure cases in a much cleaner way, in the genirq layer. v2: fix two typos [ Impact: extend API ] Signed-off-by: NYinghai Lu <yinghai@kernel.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Suresh Siddha <suresh.b.siddha@intel.com> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: linux-arch@vger.kernel.org LKML-Reference: <49F654E9.4070809@kernel.org> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 22 4月, 2009 1 次提交
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由 Anton Vorontsov 提交于
The driver should pass a device that specifies internal DMA ops, but currently NULL pointer is passed, therefore following bug appears during boot up: ------------[ cut here ]------------ Kernel BUG at c0018a7c [verbose debug info unavailable] Oops: Exception in kernel mode, sig: 5 [#1] [...] NIP [c0018a7c] fsl_rio_doorbell_init+0x34/0x60 LR [c0018a70] fsl_rio_doorbell_init+0x28/0x60 Call Trace: [ef82bda0] [c0018a70] fsl_rio_doorbell_init+0x28/0x60 (unreliable) [ef82bdc0] [c0019160] fsl_rio_setup+0x6b8/0x84c [ef82be20] [c02d28ac] fsl_of_rio_rpn_probe+0x30/0x50 [ef82be40] [c0234f20] of_platform_device_probe+0x5c/0x84 [...] ---[ end trace 561bb236c800851f ]--- This patch fixes the issue. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 06 4月, 2009 2 次提交
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由 Wolfgang Grandegger 提交于
This patch adds support for multi-chip NAND devices to the FSL-UPM driver. This requires support for multiple GPIOs for the RNB pins. The NAND chips are selected through address lines defined by the FDT property "fsl,upm-addr-line-cs-offsets". Signed-off-by: NWolfgang Grandegger <wg@grandegger.com> Acked-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Kumar Gala 提交于
CoreInt provides a mechansim to deliver the IRQ vector directly into the core on an interrupt (via the SPR EPR) rather than having to go IACK on the PIC. This is suppose to provide an improvment in interrupt latency by reducing the time to get the IRQ vector. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 01 4月, 2009 2 次提交
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由 Anton Vorontsov 提交于
The advantages of this: - Don't encourage legacy support; - Less external symbols, less code to compile-in for !MPC832x_RDB platforms. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Cc: David Brownell <david-b@pacbell.net> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Kumar Gala <galak@gate.crashing.org> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Anton Vorontsov 提交于
The main purpose of this patch is to pass 'struct spi_device' to the chip select handling routines. This is needed so that we could implement full-fledged OpenFirmware support for this driver. While at it, also: - Replace two {de,activate}_cs routines by single cs_contol(). - Don't duplicate platform data callbacks in mpc83xx_spi struct. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Cc: David Brownell <david-b@pacbell.net> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Kumar Gala <galak@gate.crashing.org> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 30 3月, 2009 2 次提交
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由 Matt LaPlante 提交于
Signed-off-by: NMatt LaPlante <kernel1@cyberdogtech.com> Acked-by: NRandy Dunlap <randy.dunlap@oracle.com> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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由 Rusty Russell 提交于
Impact: cleanup It's unused, since about 1995. So remove all initialization of it in preparation for actually removing the field. Signed-off-by: NRusty Russell <rusty@rustcorp.com.au> Acked-by: NThomas Gleixner <tglx@linutronix.de>
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