1. 01 9月, 2021 11 次提交
  2. 31 8月, 2021 21 次提交
  3. 30 7月, 2021 1 次提交
  4. 28 7月, 2021 7 次提交
    • Z
      iommu/arm-smmu-v3: Add support for less than one ECMDQ per core · 3965519b
      Zhen Lei 提交于
      hulk inclusion
      category: feature
      bugzilla: 174251
      CVE: NA
      
      -------------------------------------------------------------------------
      
      Due to limited hardware resources, the number of ECMDQs may be less than
      the number of cores. If the number of ECMDQs is greater than the number of
      numa nodes, ensure that each node has at least one ECMDQ. This is because
      ECMDQ queue memory is requested from the NUMA node where it resides, which
      may result in better command filling and insertion performance.
      
      The current ECMDQ implementation reuses the command insertion function
      arm_smmu_cmdq_issue_cmdlist() of the normal CMDQ. This function already
      supports multiple cores concurrent insertion commands.
      Signed-off-by: NZhen Lei <thunder.leizhen@huawei.com>
      Reviewed-by: NHanjun Guo <guohanjun@huawei.com>
      Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
      3965519b
    • Z
      iommu/arm-smmu-v3: Add arm_smmu_ecmdq_issue_cmdlist() for non-shared ECMDQ · bafa900a
      Zhen Lei 提交于
      hulk inclusion
      category: feature
      bugzilla: 174251
      CVE: NA
      
      -------------------------------------------------------------------------
      
      When a core can exclusively own an ECMDQ, competition with other cores
      does not need to be considered during command insertion. Therefore, we can
      delete the part of arm_smmu_cmdq_issue_cmdlist() that deals with
      multi-core contention and generate a more efficient ECMDQ-specific
      function arm_smmu_ecmdq_issue_cmdlist().
      Signed-off-by: NZhen Lei <thunder.leizhen@huawei.com>
      Reviewed-by: NHanjun Guo <guohanjun@huawei.com>
      Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
      bafa900a
    • Z
      iommu/arm-smmu-v3: Ensure that a set of associated commands are inserted in the same ECMDQ · 9a1685b3
      Zhen Lei 提交于
      hulk inclusion
      category: feature
      bugzilla: 174251
      CVE: NA
      
      -------------------------------------------------------------------------
      
      The SYNC command only ensures that the command that precedes it in the
      same ECMDQ must be executed, but cannot synchronize the commands in other
      ECMDQs. If an unmap involves multiple commands, some commands are executed
      on one core, and the other commands are executed on another core. In this
      case, after the SYNC execution is complete, the execution of all preceded
      commands can not be ensured.
      
      Prevent the process that performs a set of associated commands insertion
      from being migrated to other cores ensures that all commands are inserted
      into the same ECMDQ.
      Signed-off-by: NZhen Lei <thunder.leizhen@huawei.com>
      Reviewed-by: NHanjun Guo <guohanjun@huawei.com>
      Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
      9a1685b3
    • Z
      iommu/arm-smmu-v3: Add support for ECMDQ register mode · 1d26535b
      Zhen Lei 提交于
      hulk inclusion
      category: feature
      bugzilla: 174251
      CVE: NA
      
      -------------------------------------------------------------------------
      
      Ensure that each core exclusively occupies an ECMDQ and all of them are
      enabled during initialization. During this initialization process, any
      errors will result in a fallback to using normal CMDQ.
      
      When GERROR is triggered by ECMDQ, all ECMDQs need to be traversed: the
      ECMDQs with errors will be processed and the ECMDQs without errors will
      be skipped directly.
      
      Compared with register SMMU_CMDQ_PROD, register SMMU_ECMDQ_PROD has one
      more 'EN' bit and one more 'ERRACK' bit. Therefore, an extra member
      'ecmdq_prod' is added to record the values of these two bits. Each time
      register SMMU_ECMDQ_PROD is updated, the value of 'ecmdq_prod' is ORed.
      After the error indicated by SMMU_GERROR.CMDQP_ERR is fixed, the 'ERRACK'
      bit needs to be toggled to resume the corresponding ECMDQ. Therefore, a
      rwlock is used to protect the write operation to bit 'ERRACK' during error
      handling and the read operation to bit 'ERRACK' during command insertion.
      Signed-off-by: NZhen Lei <thunder.leizhen@huawei.com>
      Reviewed-by: NHanjun Guo <guohanjun@huawei.com>
      Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
      1d26535b
    • Z
      iommu/arm-smmu-v3: Extract reusable function __arm_smmu_cmdq_skip_err() · ced6498c
      Zhen Lei 提交于
      hulk inclusion
      category: feature
      bugzilla: 174251
      CVE: NA
      
      -------------------------------------------------------------------------
      
      When SMMU_GERROR.CMDQP_ERR is different to SMMU_GERRORN.CMDQP_ERR, it
      indicates that one or more errors have been encountered on a command queue
      control page interface. We need to traverse all ECMDQs in that control
      page to find all errors. For each ECMDQ error handling, it is much the
      same as the CMDQ error handling. This common processing part is extracted
      as a new function __arm_smmu_cmdq_skip_err().
      Signed-off-by: NZhen Lei <thunder.leizhen@huawei.com>
      Reviewed-by: NHanjun Guo <guohanjun@huawei.com>
      Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
      ced6498c
    • Z
      iommu/arm-smmu-v3: Add and use static helper function arm_smmu_get_cmdq() · 48f205a3
      Zhen Lei 提交于
      hulk inclusion
      category: feature
      bugzilla: 174251
      CVE: NA
      
      -------------------------------------------------------------------------
      
      One SMMU has only one normal CMDQ. Therefore, this CMDQ is used regardless
      of the core on which the command is inserted. It can be referenced
      directly through "smmu->cmdq". However, one SMMU has multiple ECMDQs, and
      the ECMDQ used by the core on which the command insertion is executed may
      be different. So the helper function arm_smmu_get_cmdq() is added, which
      returns the CMDQ/ECMDQ that the current core should use. Currently, the
      code that supports ECMDQ is not added. just simply returns "&smmu->cmdq".
      
      Many subfunctions of arm_smmu_cmdq_issue_cmdlist() use "&smmu->cmdq" or
      "&smmu->cmdq.q" directly. To support ECMDQ, they need to call the newly
      added function arm_smmu_get_cmdq() instead.
      
      Note that normal CMDQ is still required until ECMDQ is available.
      Signed-off-by: NZhen Lei <thunder.leizhen@huawei.com>
      Reviewed-by: NHanjun Guo <guohanjun@huawei.com>
      Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
      48f205a3
    • Z
      iommu/arm-smmu-v3: Add and use static helper function arm_smmu_cmdq_issue_cmd_with_sync() · 006da1fa
      Zhen Lei 提交于
      hulk inclusion
      category: feature
      bugzilla: 174251
      CVE: NA
      
      -------------------------------------------------------------------------
      
      The obvious key to the performance optimization of commit 587e6c10
      ("iommu/arm-smmu-v3: Reduce contention during command-queue insertion") is
      to allow multiple cores to insert commands in parallel after a brief mutex
      contention.
      
      Obviously, inserting as many commands at a time as possible can reduce the
      number of times the mutex contention participates, thereby improving the
      overall performance. At least it reduces the number of calls to function
      arm_smmu_cmdq_issue_cmdlist().
      
      Therefore, function arm_smmu_cmdq_issue_cmd_with_sync() is added to insert
      the 'cmd+sync' commands at a time.
      Signed-off-by: NZhen Lei <thunder.leizhen@huawei.com>
      Reviewed-by: NHanjun Guo <guohanjun@huawei.com>
      Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
      006da1fa