1. 25 5月, 2021 5 次提交
    • V
      net: dsa: sja1105: use 4095 as the private VLAN for untagged traffic · ed040abc
      Vladimir Oltean 提交于
      One thing became visible when writing the blamed commit, and that was
      that STP and PTP frames injected by net/dsa/tag_sja1105.c using the
      deferred xmit mechanism are always classified to the pvid of the CPU
      port, regardless of whatever VLAN there might be in these packets.
      
      So a decision needed to be taken regarding the mechanism through which
      we should ensure that delivery of STP and PTP traffic is possible when
      we are in a VLAN awareness mode that involves tag_8021q. This is because
      tag_8021q is not concerned with managing the pvid of the CPU port, since
      as far as tag_8021q is concerned, no traffic should be sent as untagged
      from the CPU port. So we end up not actually having a pvid on the CPU
      port if we only listen to tag_8021q, and unless we do something about it.
      
      The decision taken at the time was to keep VLAN 1 in the list of
      priv->dsa_8021q_vlans, and make it a pvid of the CPU port. This ensures
      that STP and PTP frames can always be sent to the outside world.
      
      However there is a problem. If we do the following while we are in
      the best_effort_vlan_filtering=true mode:
      
      ip link add br0 type bridge vlan_filtering 1
      ip link set swp2 master br0
      bridge vlan del dev swp2 vid 1
      
      Then untagged and pvid-tagged frames should be dropped. But we observe
      that they aren't, and this is because of the precaution we took that VID
      1 is always installed on all ports.
      
      So clearly VLAN 1 is not good for this purpose. What about VLAN 0?
      Well, VLAN 0 is managed by the 8021q module, and that module wants to
      ensure that 802.1p tagged frames are always received by a port, and are
      always transmitted as VLAN-tagged (with VLAN ID 0). Whereas we want our
      STP and PTP frames to be untagged if the stack sent them as untagged -
      we don't want the driver to just decide out of the blue that it adds
      VID 0 to some packets.
      
      So what to do?
      
      Well, there is one other VLAN that is reserved, and that is 4095:
      $ ip link add link swp2 name swp2.4095 type vlan id 4095
      Error: 8021q: Invalid VLAN id.
      $ bridge vlan add dev swp2 vid 4095
      Error: bridge: Vlan id is invalid.
      
      After we made this change, VLAN 1 is indeed forwarded and/or dropped
      according to the bridge VLAN table, there are no further alterations
      done by the sja1105 driver.
      
      Fixes: ec5ae610 ("net: dsa: sja1105: save/restore VLANs using a delta commit method")
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      ed040abc
    • V
      net: dsa: sja1105: error out on unsupported PHY mode · 6729188d
      Vladimir Oltean 提交于
      The driver continues probing when a port is configured for an
      unsupported PHY interface type, instead it should stop.
      
      Fixes: 8aa9ebcc ("net: dsa: Introduce driver for NXP SJA1105 5-port L2 switch")
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      6729188d
    • V
      net: dsa: sja1105: add error handling in sja1105_setup() · cec279a8
      Vladimir Oltean 提交于
      If any of sja1105_static_config_load(), sja1105_clocking_setup() or
      sja1105_devlink_setup() fails, we can't just return in the middle of
      sja1105_setup() or memory will leak. Add a cleanup path.
      
      Fixes: 0a7bdbc2 ("net: dsa: sja1105: move devlink param code to sja1105_devlink.c")
      Fixes: 8aa9ebcc ("net: dsa: Introduce driver for NXP SJA1105 5-port L2 switch")
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      cec279a8
    • V
      net: dsa: sja1105: call dsa_unregister_switch when allocating memory fails · dc596e3f
      Vladimir Oltean 提交于
      Unlike other drivers which pretty much end their .probe() execution with
      dsa_register_switch(), the sja1105 does some extra stuff. When that
      fails with -ENOMEM, the driver is quick to return that, forgetting to
      call dsa_unregister_switch(). Not critical, but a bug nonetheless.
      
      Fixes: 4d752508 ("net: dsa: sja1105: offload the Credit-Based Shaper qdisc")
      Fixes: a68578c2 ("net: dsa: Make deferred_xmit private to sja1105")
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      dc596e3f
    • V
      net: dsa: sja1105: fix VL lookup command packing for P/Q/R/S · ba61cf16
      Vladimir Oltean 提交于
      At the beginning of the sja1105_dynamic_config.c file there is a diagram
      of the dynamic config interface layout:
      
       packed_buf
      
       |
       V
       +-----------------------------------------+------------------+
       |              ENTRY BUFFER               |  COMMAND BUFFER  |
       +-----------------------------------------+------------------+
      
       <----------------------- packed_size ------------------------>
      
      So in order to pack/unpack the command bits into the buffer,
      sja1105_vl_lookup_cmd_packing must first advance the buffer pointer by
      the length of the entry. This is similar to what the other *cmd_packing
      functions do.
      
      This bug exists because the command packing function for P/Q/R/S was
      copied from the E/T generation, and on E/T, the command was actually
      embedded within the entry buffer itself.
      
      Fixes: 94f94d4a ("net: dsa: sja1105: add static tables for virtual links")
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      ba61cf16
  2. 28 4月, 2021 3 次提交
  3. 21 3月, 2021 1 次提交
    • V
      Revert "net: dsa: sja1105: Clear VLAN filtering offload netdev feature" · a1e6f641
      Vladimir Oltean 提交于
      This reverts commit e9bf9694.
      
      The topic of the reverted patch is the support for switches with global
      VLAN filtering, added by commit 061f6a50 ("net: dsa: Add
      ndo_vlan_rx_{add, kill}_vid implementation"). Be there a switch with 4
      ports swp0 -> swp3, and the following setup:
      
      ip link add br0 type bridge vlan_filtering 1
      ip link set swp0 master br0
      ip link set swp1 master br0
      
      What would happen with VLAN-tagged traffic received on standalone ports
      swp2 and swp3? Well, it would get dropped, were it not for the
      .ndo_vlan_rx_add_vid and .ndo_vlan_rx_kill_vid implementations (called
      from vlan_vid_add and vlan_vid_del respectively). Basically, for DSA
      switches where VLAN filtering is a global attribute, we enforce the
      standalone ports to have 'rx-vlan-filter: off [fixed]' in their ethtool
      features, which lets the user know that all VLAN-tagged packets that are
      not explicitly added in the RX filtering list are dropped.
      
      As for the sja1105 driver, at the time of the reverted patch, it was
      operating in a pretty handicapped mode when it had ports under a bridge
      with vlan_filtering=1. Specifically, it was unable to terminate traffic
      through the CPU port (for further explanation see "Traffic support" in
      Documentation/networking/dsa/sja1105.rst).
      
      However, since then, the sja1105 driver has made considerable progress,
      and that limitation is no longer as severe now. Specifically, since
      commit 2cafa72e ("net: dsa: sja1105: add a new
      best_effort_vlan_filtering devlink parameter"), the driver is able to
      perform CPU termination even when some ports are under bridges with
      vlan_filtering=1. Then, since commit 8841f6e6 ("net: dsa: sja1105:
      make devlink property best_effort_vlan_filtering true by default"), this
      even became the default operating mode.
      
      So we can now take advantage of the logic in the DSA core.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      a1e6f641
  4. 17 3月, 2021 1 次提交
  5. 14 3月, 2021 1 次提交
  6. 05 3月, 2021 2 次提交
  7. 26 2月, 2021 1 次提交
  8. 17 2月, 2021 2 次提交
  9. 16 2月, 2021 1 次提交
    • V
      net: dsa: sja1105: make devlink property best_effort_vlan_filtering true by default · 8841f6e6
      Vladimir Oltean 提交于
      The sja1105 driver has a limitation, extensively described under
      Documentation/networking/dsa/sja1105.rst and
      Documentation/networking/devlink/sja1105.rst, which says that when the
      ports are under a bridge with vlan_filtering=1, traffic to and from
      the network stack is not possible, unless the driver-specific
      best_effort_vlan_filtering devlink parameter is enabled.
      
      For users, this creates a 'wtf' moment. They need to go to the
      documentation and find about the existence of this property, then maybe
      install devlink and set it to true.
      
      Having best_effort_vlan_filtering enabled by the kernel by default
      delays that 'wtf' moment (maybe up to the point that it never even
      happens). The user doesn't need to care that the driver supports
      addressing the ports individually by retagging VLAN IDs until he/she
      needs to use more than 32 VLAN IDs (since there can be at most 32
      retagging rules). Only then do they need to think whether they need the
      full VLAN table, at the expense of no individual port addressing, or
      not.
      
      But the odds that an sja1105 user will need more than 32 VLANs
      terminated by the CPU is probably low. And, if we were to follow the
      principle that more advanced use cases should require more advanced
      preparation steps, then it makes more sense for ping to 'just work'
      while CPU termination of > 32 VLAN IDs to require a bit more forethought
      and possibly a driver-specific devlink param.
      
      So we should be able to safely change the default here, and make this
      driver act just a little bit more sanely out of the box.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      8841f6e6
  10. 15 2月, 2021 2 次提交
  11. 13 2月, 2021 1 次提交
    • V
      net: dsa: sja1105: offload bridge port flags to device · 4d942354
      Vladimir Oltean 提交于
      The chip can configure unicast flooding, broadcast flooding and learning.
      Learning is per port, while flooding is per {ingress, egress} port pair
      and we need to configure the same value for all possible ingress ports
      towards the requested one.
      
      While multicast flooding is not officially supported, we can hack it by
      using a feature of the second generation (P/Q/R/S) devices, which is that
      FDB entries are maskable, and multicast addresses always have an odd
      first octet. So by putting a match-all for 00:01:00:00:00:00 addr and
      00:01:00:00:00:00 mask at the end of the FDB, we make sure that it is
      always checked last, and does not take precedence in front of any other
      MDB. So it behaves effectively as an unknown multicast entry.
      
      For the first generation switches, this feature is not available, so
      unknown multicast will always be treated the same as unknown unicast.
      So the only thing we can do is request the user to offload the settings
      for these 2 flags in tandem, i.e.
      
      ip link set swp2 type bridge_slave flood off
      Error: sja1105: This chip cannot configure multicast flooding independently of unicast.
      ip link set swp2 type bridge_slave flood off mcast_flood off
      ip link set swp2 type bridge_slave mcast_flood on
      Error: sja1105: This chip cannot configure multicast flooding independently of unicast.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      4d942354
  12. 16 1月, 2021 1 次提交
    • V
      net: dsa: set configure_vlan_while_not_filtering to true by default · 0ee2af4e
      Vladimir Oltean 提交于
      As explained in commit 54a0ed0d ("net: dsa: provide an option for
      drivers to always receive bridge VLANs"), DSA has historically been
      skipping VLAN switchdev operations when the bridge wasn't in
      vlan_filtering mode, but the reason why it was doing that has never been
      clear. So the configure_vlan_while_not_filtering option is there merely
      to preserve functionality for existing drivers. It isn't some behavior
      that drivers should opt into. Ideally, when all drivers leave this flag
      set, we can delete the dsa_port_skip_vlan_configuration() function.
      
      New drivers always seem to omit setting this flag, for some reason. So
      let's reverse the logic: the DSA core sets it by default to true before
      the .setup() callback, and legacy drivers can turn it off. This way, new
      drivers get the new behavior by default, unless they explicitly set the
      flag to false, which is more obvious during review.
      
      Remove the assignment from drivers which were setting it to true, and
      add the assignment to false for the drivers that didn't previously have
      it. This way, it should be easier to see how many we have left.
      
      The following drivers: lan9303, mv88e6060 were skipped from setting this
      flag to false, because they didn't have any VLAN offload ops in the
      first place.
      
      The Broadcom Starfighter 2 driver calls the common b53_switch_alloc and
      therefore also inherits the configure_vlan_while_not_filtering=true
      behavior.
      
      Also, print a message through netlink extack every time a VLAN has been
      skipped. This is mildly annoying on purpose, so that (a) it is at least
      clear that VLANs are being skipped - the legacy behavior in itself is
      confusing, and the extack should be much more difficult to miss, unlike
      kernel logs - and (b) people have one more incentive to convert to the
      new behavior.
      
      No behavior change except for the added prints is intended at this time.
      
      $ ip link add br0 type bridge vlan_filtering 0
      $ ip link set sw0p2 master br0
      [   60.315148] br0: port 1(sw0p2) entered blocking state
      [   60.320350] br0: port 1(sw0p2) entered disabled state
      [   60.327839] device sw0p2 entered promiscuous mode
      [   60.334905] br0: port 1(sw0p2) entered blocking state
      [   60.340142] br0: port 1(sw0p2) entered forwarding state
      Warning: dsa_core: skipping configuration of VLAN. # This was the pvid
      $ bridge vlan add dev sw0p2 vid 100
      Warning: dsa_core: skipping configuration of VLAN.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NKurt Kanzenbach <kurt@linutronix.de>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Link: https://lore.kernel.org/r/20210115231919.43834-1-vladimir.oltean@nxp.comSigned-off-by: NJakub Kicinski <kuba@kernel.org>
      0ee2af4e
  13. 12 1月, 2021 4 次提交
    • V
      net: dsa: remove the transactional logic from VLAN objects · 1958d581
      Vladimir Oltean 提交于
      It should be the driver's business to logically separate its VLAN
      offloading into a preparation and a commit phase, and some drivers don't
      need / can't do this.
      
      So remove the transactional shim from DSA and let drivers propagate
      errors directly from the .port_vlan_add callback.
      
      It would appear that the code has worse error handling now than it had
      before. DSA is the only in-kernel user of switchdev that offloads one
      switchdev object to more than one port: for every VLAN object offloaded
      to a user port, that VLAN is also offloaded to the CPU port. So the
      "prepare for user port -> check for errors -> prepare for CPU port ->
      check for errors -> commit for user port -> commit for CPU port"
      sequence appears to make more sense than the one we are using now:
      "offload to user port -> check for errors -> offload to CPU port ->
      check for errors", but it is really a compromise. In the new way, we can
      catch errors from the commit phase that we previously had to ignore.
      But we have our hands tied and cannot do any rollback now: if we add a
      VLAN on the CPU port and it fails, we can't do the rollback by simply
      deleting it from the user port, because the switchdev API is not so nice
      with us: it could have simply been there already, even with the same
      flags. So we don't even attempt to rollback anything on addition error,
      just leave whatever VLANs managed to get offloaded right where they are.
      This should not be a problem at all in practice.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Acked-by: NLinus Walleij <linus.walleij@linaro.org>
      Acked-by: NJiri Pirko <jiri@nvidia.com>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      1958d581
    • V
      net: dsa: remove the transactional logic from MDB entries · a52b2da7
      Vladimir Oltean 提交于
      For many drivers, the .port_mdb_prepare callback was not a good opportunity
      to avoid any error condition, and they would suppress errors found during
      the actual commit phase.
      
      Where a logical separation between the prepare and the commit phase
      existed, the function that used to implement the .port_mdb_prepare
      callback still exists, but now it is called directly from .port_mdb_add,
      which was modified to return an int code.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Acked-by: NLinus Walleij <linus.walleij@linaro.org>
      Acked-by: NJiri Pirko <jiri@nvidia.com>
      Reviewed-by: Kurt Kanzenbach <kurt@linutronix.de> # hellcreek
      Reviewed-by: Linus Wallei <linus.walleij@linaro.org> # RTL8366
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      a52b2da7
    • V
      net: switchdev: remove the transaction structure from port attributes · bae33f2b
      Vladimir Oltean 提交于
      Since the introduction of the switchdev API, port attributes were
      transmitted to drivers for offloading using a two-step transactional
      model, with a prepare phase that was supposed to catch all errors, and a
      commit phase that was supposed to never fail.
      
      Some classes of failures can never be avoided, like hardware access, or
      memory allocation. In the latter case, merely attempting to move the
      memory allocation to the preparation phase makes it impossible to avoid
      memory leaks, since commit 91cf8ece ("switchdev: Remove unused
      transaction item queue") which has removed the unused mechanism of
      passing on the allocated memory between one phase and another.
      
      It is time we admit that separating the preparation from the commit
      phase is something that is best left for the driver to decide, and not
      something that should be baked into the API, especially since there are
      no switchdev callers that depend on this.
      
      This patch removes the struct switchdev_trans member from switchdev port
      attribute notifier structures, and converts drivers to not look at this
      member.
      
      In part, this patch contains a revert of my previous commit 2e554a7a
      ("net: dsa: propagate switchdev vlan_filtering prepare phase to
      drivers").
      
      For the most part, the conversion was trivial except for:
      - Rocker's world implementation based on Broadcom OF-DPA had an odd
        implementation of ofdpa_port_attr_bridge_flags_set. The conversion was
        done mechanically, by pasting the implementation twice, then only
        keeping the code that would get executed during prepare phase on top,
        then only keeping the code that gets executed during the commit phase
        on bottom, then simplifying the resulting code until this was obtained.
      - DSA's offloading of STP state, bridge flags, VLAN filtering and
        multicast router could be converted right away. But the ageing time
        could not, so a shim was introduced and this was left for a further
        commit.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Acked-by: NLinus Walleij <linus.walleij@linaro.org>
      Acked-by: NJiri Pirko <jiri@nvidia.com>
      Reviewed-by: Kurt Kanzenbach <kurt@linutronix.de> # hellcreek
      Reviewed-by: Linus Walleij <linus.walleij@linaro.org> # RTL8366RB
      Reviewed-by: NIdo Schimmel <idosch@nvidia.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      bae33f2b
    • V
      net: switchdev: remove vid_begin -> vid_end range from VLAN objects · b7a9e0da
      Vladimir Oltean 提交于
      The call path of a switchdev VLAN addition to the bridge looks something
      like this today:
      
              nbp_vlan_init
              |  __br_vlan_set_default_pvid
              |  |                       |
              |  |    br_afspec          |
              |  |        |              |
              |  |        v              |
              |  | br_process_vlan_info  |
              |  |        |              |
              |  |        v              |
              |  |   br_vlan_info        |
              |  |       / \            /
              |  |      /   \          /
              |  |     /     \        /
              |  |    /       \      /
              v  v   v         v    v
            nbp_vlan_add   br_vlan_add ------+
             |              ^      ^ |       |
             |             /       | |       |
             |            /       /  /       |
             \ br_vlan_get_master/  /        v
              \        ^        /  /  br_vlan_add_existing
               \       |       /  /          |
                \      |      /  /          /
                 \     |     /  /          /
                  \    |    /  /          /
                   \   |   /  /          /
                    v  |   | v          /
                    __vlan_add         /
                       / |            /
                      /  |           /
                     v   |          /
         __vlan_vid_add  |         /
                     \   |        /
                      v  v        v
            br_switchdev_port_vlan_add
      
      The ranges UAPI was introduced to the bridge in commit bdced7ef
      ("bridge: support for multiple vlans and vlan ranges in setlink and
      dellink requests") (Jan 10 2015). But the VLAN ranges (parsed in br_afspec)
      have always been passed one by one, through struct bridge_vlan_info
      tmp_vinfo, to br_vlan_info. So the range never went too far in depth.
      
      Then Scott Feldman introduced the switchdev_port_bridge_setlink function
      in commit 47f8328b ("switchdev: add new switchdev bridge setlink").
      That marked the introduction of the SWITCHDEV_OBJ_PORT_VLAN, which made
      full use of the range. But switchdev_port_bridge_setlink was called like
      this:
      
      br_setlink
      -> br_afspec
      -> switchdev_port_bridge_setlink
      
      Basically, the switchdev and the bridge code were not tightly integrated.
      Then commit 41c498b9 ("bridge: restore br_setlink back to original")
      came, and switchdev drivers were required to implement
      .ndo_bridge_setlink = switchdev_port_bridge_setlink for a while.
      
      In the meantime, commits such as 0944d6b5 ("bridge: try switchdev op
      first in __vlan_vid_add/del") finally made switchdev penetrate the
      br_vlan_info() barrier and start to develop the call path we have today.
      But remember, br_vlan_info() still receives VLANs one by one.
      
      Then Arkadi Sharshevsky refactored the switchdev API in 2017 in commit
      29ab586c ("net: switchdev: Remove bridge bypass support from
      switchdev") so that drivers would not implement .ndo_bridge_setlink any
      longer. The switchdev_port_bridge_setlink also got deleted.
      This refactoring removed the parallel bridge_setlink implementation from
      switchdev, and left the only switchdev VLAN objects to be the ones
      offloaded from __vlan_vid_add (basically RX filtering) and  __vlan_add
      (the latter coming from commit 9c86ce2c ("net: bridge: Notify about
      bridge VLANs")).
      
      That is to say, today the switchdev VLAN object ranges are not used in
      the kernel. Refactoring the above call path is a bit complicated, when
      the bridge VLAN call path is already a bit complicated.
      
      Let's go off and finish the job of commit 29ab586c by deleting the
      bogus iteration through the VLAN ranges from the drivers. Some aspects
      of this feature never made too much sense in the first place. For
      example, what is a range of VLANs all having the BRIDGE_VLAN_INFO_PVID
      flag supposed to mean, when a port can obviously have a single pvid?
      This particular configuration _is_ denied as of commit 6623c60d
      ("bridge: vlan: enforce no pvid flag in vlan ranges"), but from an API
      perspective, the driver still has to play pretend, and only offload the
      vlan->vid_end as pvid. And the addition of a switchdev VLAN object can
      modify the flags of another, completely unrelated, switchdev VLAN
      object! (a VLAN that is PVID will invalidate the PVID flag from whatever
      other VLAN had previously been offloaded with switchdev and had that
      flag. Yet switchdev never notifies about that change, drivers are
      supposed to guess).
      
      Nonetheless, having a VLAN range in the API makes error handling look
      scarier than it really is - unwinding on errors and all of that.
      When in reality, no one really calls this API with more than one VLAN.
      It is all unnecessary complexity.
      
      And despite appearing pretentious (two-phase transactional model and
      all), the switchdev API is really sloppy because the VLAN addition and
      removal operations are not paired with one another (you can add a VLAN
      100 times and delete it just once). The bridge notifies through
      switchdev of a VLAN addition not only when the flags of an existing VLAN
      change, but also when nothing changes. There are switchdev drivers out
      there who don't like adding a VLAN that has already been added, and
      those checks don't really belong at driver level. But the fact that the
      API contains ranges is yet another factor that prevents this from being
      addressed in the future.
      
      Of the existing switchdev pieces of hardware, it appears that only
      Mellanox Spectrum supports offloading more than one VLAN at a time,
      through mlxsw_sp_port_vlan_set. I have kept that code internal to the
      driver, because there is some more bookkeeping that makes use of it, but
      I deleted it from the switchdev API. But since the switchdev support for
      ranges has already been de facto deleted by a Mellanox employee and
      nobody noticed for 4 years, I'm going to assume it's not a biggie.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: Ido Schimmel <idosch@nvidia.com> # switchdev and mlxsw
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Reviewed-by: Kurt Kanzenbach <kurt@linutronix.de> # hellcreek
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      b7a9e0da
  14. 06 1月, 2021 1 次提交
  15. 05 10月, 2020 1 次提交
    • V
      net: dsa: propagate switchdev vlan_filtering prepare phase to drivers · 2e554a7a
      Vladimir Oltean 提交于
      A driver may refuse to enable VLAN filtering for any reason beyond what
      the DSA framework cares about, such as:
      - having tc-flower rules that rely on the switch being VLAN-aware
      - the particular switch does not support VLAN, even if the driver does
        (the DSA framework just checks for the presence of the .port_vlan_add
        and .port_vlan_del pointers)
      - simply not supporting this configuration to be toggled at runtime
      
      Currently, when a driver rejects a configuration it cannot support, it
      does this from the commit phase, which triggers various warnings in
      switchdev.
      
      So propagate the prepare phase to drivers, to give them the ability to
      refuse invalid configurations cleanly and avoid the warnings.
      
      Since we need to modify all function prototypes and check for the
      prepare phase from within the drivers, take that opportunity and move
      the existing driver restrictions within the prepare phase where that is
      possible and easy.
      
      Cc: Florian Fainelli <f.fainelli@gmail.com>
      Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
      Cc: Hauke Mehrtens <hauke@hauke-m.de>
      Cc: Woojung Huh <woojung.huh@microchip.com>
      Cc: Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>
      Cc: Sean Wang <sean.wang@mediatek.com>
      Cc: Landen Chao <Landen.Chao@mediatek.com>
      Cc: Andrew Lunn <andrew@lunn.ch>
      Cc: Vivien Didelot <vivien.didelot@gmail.com>
      Cc: Jonathan McDowell <noodles@earth.li>
      Cc: Linus Walleij <linus.walleij@linaro.org>
      Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
      Cc: Claudiu Manoil <claudiu.manoil@nxp.com>
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      2e554a7a
  16. 04 10月, 2020 1 次提交
  17. 26 9月, 2020 3 次提交
  18. 21 9月, 2020 1 次提交
    • V
      net: dsa: tag_8021q: add VLANs to the master interface too · bbed0bbd
      Vladimir Oltean 提交于
      The whole purpose of tag_8021q is to send VLAN-tagged traffic to the
      CPU, from which the driver can decode the source port and switch id.
      
      Currently this only works if the VLAN filtering on the master is
      disabled. Change that by explicitly adding code to tag_8021q.c to add
      the VLANs corresponding to the tags to the filter of the master
      interface.
      
      Because we now need to call vlan_vid_add, then we also need to hold the
      RTNL mutex. Propagate that requirement to the callers of dsa_8021q_setup
      and modify the existing call sites as appropriate. Note that one call
      path, sja1105_best_effort_vlan_filtering_set -> sja1105_vlan_filtering
      -> sja1105_setup_8021q_tagging, was already holding this lock.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      bbed0bbd
  19. 12 9月, 2020 2 次提交
    • V
      net: dsa: tag_8021q: add a context structure · 5899ee36
      Vladimir Oltean 提交于
      While working on another tag_8021q driver implementation, some things
      became apparent:
      
      - It is not mandatory for a DSA driver to offload the tag_8021q VLANs by
        using the VLAN table per se. For example, it can add custom TCAM rules
        that simply encapsulate RX traffic, and redirect & decapsulate rules
        for TX traffic. For such a driver, it makes no sense to receive the
        tag_8021q configuration through the same callback as it receives the
        VLAN configuration from the bridge and the 8021q modules.
      
      - Currently, sja1105 (the only tag_8021q user) sets a
        priv->expect_dsa_8021q variable to distinguish between the bridge
        calling, and tag_8021q calling. That can be improved, to say the
        least.
      
      - The crosschip bridging operations are, in fact, stateful already. The
        list of crosschip_links must be kept by the caller and passed to the
        relevant tag_8021q functions.
      
      So it would be nice if the tag_8021q configuration was more
      self-contained. This patch attempts to do that.
      
      Create a struct dsa_8021q_context which encapsulates a struct
      dsa_switch, and has 2 function pointers for adding and deleting a VLAN.
      These will replace the previous channel to the driver, which was through
      the .port_vlan_add and .port_vlan_del callbacks of dsa_switch_ops.
      
      Also put the list of crosschip_links into this dsa_8021q_context.
      Drivers that don't support cross-chip bridging can simply omit to
      initialize this list, as long as they dont call any cross-chip function.
      
      The sja1105_vlan_add and sja1105_vlan_del functions are refactored into
      a smaller sja1105_vlan_add_one, which now has 2 entry points:
      - sja1105_vlan_add, from struct dsa_switch_ops
      - sja1105_dsa_8021q_vlan_add, from the tag_8021q ops
      But even this change is fairly trivial. It just reflects the fact that
      for sja1105, the VLANs from these 2 channels end up in the same hardware
      table. However that is not necessarily true in the general sense (and
      that's the reason for making this change).
      
      The rest of the patch is mostly plain refactoring of "ds" -> "ctx". The
      dsa_8021q_context structure needs to be propagated because adding a VLAN
      is now done through the ops function pointers inside of it.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      5899ee36
    • V
      net: dsa: tag_8021q: setup tagging via a single function call · 7e092af2
      Vladimir Oltean 提交于
      There is no point in calling dsa_port_setup_8021q_tagging for each
      individual port. Additionally, it will become more difficult to do that
      when we'll have a context structure to tag_8021q (next patch). So
      refactor this now.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      7e092af2
  20. 25 8月, 2020 1 次提交
  21. 06 8月, 2020 1 次提交
    • V
      net: dsa: sja1105: use detected device id instead of DT one on mismatch · 0b0e2997
      Vladimir Oltean 提交于
      Although we can detect the chip revision 100% at runtime, it is useful
      to specify it in the device tree compatible string too, because
      otherwise there would be no way to assess the correctness of device tree
      bindings statically, without booting a board (only some switch versions
      have internal RGMII delays and/or an SGMII port).
      
      But for testing the P/Q/R/S support, what I have is a reworked board
      with the SJA1105T replaced by a pin-compatible SJA1105Q, and I don't
      want to keep a separate device tree blob just for this one-off board.
      Since just the chip has been replaced, its RGMII delay setup is
      inherently the same (meaning: delays added by the PHY on the slave
      ports, and by PCB traces on the fixed-link CPU port).
      
      For this board, I'd rather have the driver shout at me, but go ahead and
      use what it found even if it doesn't match what it's been told is there.
      
      [    2.970826] sja1105 spi0.1: Device tree specifies chip SJA1105T but found SJA1105Q, please fix it!
      [    2.980010] sja1105 spi0.1: Probed switch chip: SJA1105Q
      [    3.005082] sja1105 spi0.1: Enabled switch tagging
      Signed-off-by: NVladimir Oltean <olteanv@gmail.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      0b0e2997
  22. 04 8月, 2020 1 次提交
    • V
      net: dsa: sja1105: poll for extts events from a timer · af9fdd2b
      Vladimir Oltean 提交于
      The current poll interval is enough to ensure that rising and falling
      edge events are not lost for a 1 PPS signal with 50% duty cycle.
      
      But when we deliver the events to user space, it will try to infer if
      they were corresponding to a rising or to a falling edge (the kernel
      driver doesn't know that either). User space will try to make that
      inference based on the time at which the PPS master had emitted the
      pulse (i.e. if it's a .0 time, it's rising edge, if it's .5 time, it's
      falling edge).
      
      But there is no in-kernel API for retrieving the precise timestamp
      corresponding to a PPS master (aka perout) pulse. So user space has to
      guess even that. It will read the PTP time on the PPS master right after
      we've delivered the extts event, and declare that the PPS master time
      was just the closest integer second, based on 2 thresholds (lower than
      .25, or higher than .75, and ignore anything else).
      
      Except that, if we poll for extts events (and our hardware doesn't
      really help us, by not providing an interrupt), then there is a risk
      that the poll period (and therefore the time at which the event is
      delivered) might confuse user space.
      
      Because we are always scheduling the next extts poll at
      SJA1105_EXTTS_INTERVAL "from now" (that's the only thing that the
      schedule_delayed_work() API gives us), it means that the start time of
      the next delayed workqueue will always be shifted to the right a little
      bit (shifted with the SPI access duration of this workqueue run).
      In turn, because user space sees extts events that are non-periodic
      compared to the PPS master's time, this means that it might start making
      wrong guesses about rising/falling edge.
      
      To understand the effect, here is the output of ts2phc currently. Notice
      the 'src' timestamps of the 'SKIP extts' events, and how they have a
      large wander. They keep increasing until the upper limit for the ignore
      threshold (.75 seconds), after which the application starts ignoring the
      _other_ edge.
      
      ts2phc[26.624]: /dev/ptp3 SKIP extts index 0 at 21.449898912 src 21.657784518
      ts2phc[27.133]: adding tstamp 21.949894240 to clock /dev/ptp3
      ts2phc[27.133]: adding tstamp 22.000000000 to clock /dev/ptp1
      ts2phc[27.133]: /dev/ptp3 offset        640 s2 freq   +5112
      ts2phc[27.636]: /dev/ptp3 SKIP extts index 0 at 22.449889360 src 22.669398022
      ts2phc[28.140]: adding tstamp 22.949884376 to clock /dev/ptp3
      ts2phc[28.140]: adding tstamp 23.000000000 to clock /dev/ptp1
      ts2phc[28.140]: /dev/ptp3 offset         96 s2 freq   +4760
      ts2phc[28.644]: /dev/ptp3 SKIP extts index 0 at 23.449879504 src 23.677420422
      ts2phc[29.153]: adding tstamp 23.949874704 to clock /dev/ptp3
      ts2phc[29.153]: adding tstamp 24.000000000 to clock /dev/ptp1
      ts2phc[29.153]: /dev/ptp3 offset       -264 s2 freq   +4429
      ts2phc[29.656]: /dev/ptp3 SKIP extts index 0 at 24.449870008 src 24.689407238
      ts2phc[30.160]: adding tstamp 24.949865376 to clock /dev/ptp3
      ts2phc[30.160]: adding tstamp 25.000000000 to clock /dev/ptp1
      ts2phc[30.160]: /dev/ptp3 offset       -280 s2 freq   +4334
      ts2phc[30.664]: /dev/ptp3 SKIP extts index 0 at 25.449860760 src 25.697449926
      ts2phc[31.168]: adding tstamp 25.949856176 to clock /dev/ptp3
      ts2phc[31.168]: adding tstamp 26.000000000 to clock /dev/ptp1
      ts2phc[31.168]: /dev/ptp3 offset       -176 s2 freq   +4354
      ts2phc[31.672]: /dev/ptp3 SKIP extts index 0 at 26.449851584 src 26.705433606
      ts2phc[32.180]: adding tstamp 26.949846992 to clock /dev/ptp3
      ts2phc[32.180]: adding tstamp 27.000000000 to clock /dev/ptp1
      ts2phc[32.180]: /dev/ptp3 offset        -80 s2 freq   +4397
      ts2phc[32.684]: /dev/ptp3 SKIP extts index 0 at 27.449842384 src 27.717415110
      ts2phc[33.192]: adding tstamp 27.949837768 to clock /dev/ptp3
      ts2phc[33.192]: adding tstamp 28.000000000 to clock /dev/ptp1
      ts2phc[33.192]: /dev/ptp3 offset          0 s2 freq   +4453
      ts2phc[33.696]: /dev/ptp3 SKIP extts index 0 at 28.449833128 src 28.729412902
      ts2phc[34.200]: adding tstamp 28.949828472 to clock /dev/ptp3
      ts2phc[34.200]: adding tstamp 29.000000000 to clock /dev/ptp1
      ts2phc[34.200]: /dev/ptp3 offset          8 s2 freq   +4461
      ts2phc[34.704]: /dev/ptp3 SKIP extts index 0 at 29.449823816 src 29.737416038
      ts2phc[35.208]: adding tstamp 29.949819152 to clock /dev/ptp3
      ts2phc[35.208]: adding tstamp 30.000000000 to clock /dev/ptp1
      ts2phc[35.208]: /dev/ptp3 offset         -8 s2 freq   +4447
      ts2phc[35.712]: /dev/ptp3 SKIP extts index 0 at 30.449814496 src 30.745554982
      ts2phc[36.216]: adding tstamp 30.949809840 to clock /dev/ptp3
      ts2phc[36.216]: adding tstamp 31.000000000 to clock /dev/ptp1
      ts2phc[36.216]: /dev/ptp3 offset         -8 s2 freq   +4445
      ts2phc[36.468]: /dev/ptp3 SKIP extts index 0 at 31.449805184 src 31.501109446
      ts2phc[36.972]: adding tstamp 31.949800536 to clock /dev/ptp3
      ts2phc[36.972]: adding tstamp 32.000000000 to clock /dev/ptp1
      ts2phc[36.972]: /dev/ptp3 offset         -8 s2 freq   +4442
      ts2phc[37.480]: /dev/ptp3 SKIP extts index 0 at 32.449795896 src 32.513320070
      ts2phc[37.984]: adding tstamp 32.949791248 to clock /dev/ptp3
      ts2phc[37.984]: adding tstamp 33.000000000 to clock /dev/ptp1
      ts2phc[37.984]: /dev/ptp3 offset          0 s2 freq   +4448
      
      Fix that by taking the following measures:
      - Schedule the poll from a timer. Because we are really scheduling the
        timer periodically, the extts events delivered to user space are
        periodic too, and don't suffer from the "shift-to-the-right" effect.
      - Increase the poll period to 6 times a second. This imposes a smaller
        upper bound to the shift that can occur to the delivery time of extts
        events, and makes user space (ts2phc) to always interpret correctly
        which events should be skipped and which shouldn't.
      - Move the SPI readout itself to the main PTP kernel thread, instead of
        the generic workqueue. This is because the timer runs in atomic
        context, but is also better than before, because if needed, we can
        chrt & taskset this kernel thread, to ensure it gets enough priority
        under load.
      
      After this patch, one can notice that the wander is greatly reduced, and
      that the latencies of one extts poll are not propagated to the next. The
      'src' timestamp that is skipped is never larger than .65 seconds (which
      means .15 seconds larger than the time at which the real event occurred
      at, and .10 seconds smaller than the .75 upper threshold for ignoring
      the falling edge):
      
      ts2phc[40.076]: adding tstamp 34.949261296 to clock /dev/ptp3
      ts2phc[40.076]: adding tstamp 35.000000000 to clock /dev/ptp1
      ts2phc[40.076]: /dev/ptp3 offset         48 s2 freq   +4631
      ts2phc[40.568]: /dev/ptp3 SKIP extts index 0 at 35.449256496 src 35.595791078
      ts2phc[41.064]: adding tstamp 35.949251744 to clock /dev/ptp3
      ts2phc[41.064]: adding tstamp 36.000000000 to clock /dev/ptp1
      ts2phc[41.064]: /dev/ptp3 offset       -224 s2 freq   +4374
      ts2phc[41.552]: /dev/ptp3 SKIP extts index 0 at 36.449247088 src 36.579825574
      ts2phc[42.044]: adding tstamp 36.949242456 to clock /dev/ptp3
      ts2phc[42.044]: adding tstamp 37.000000000 to clock /dev/ptp1
      ts2phc[42.044]: /dev/ptp3 offset       -240 s2 freq   +4290
      ts2phc[42.536]: /dev/ptp3 SKIP extts index 0 at 37.449237848 src 37.563828774
      ts2phc[43.028]: adding tstamp 37.949233264 to clock /dev/ptp3
      ts2phc[43.028]: adding tstamp 38.000000000 to clock /dev/ptp1
      ts2phc[43.028]: /dev/ptp3 offset       -144 s2 freq   +4314
      ts2phc[43.520]: /dev/ptp3 SKIP extts index 0 at 38.449228656 src 38.547823238
      ts2phc[44.012]: adding tstamp 38.949224048 to clock /dev/ptp3
      ts2phc[44.012]: adding tstamp 39.000000000 to clock /dev/ptp1
      ts2phc[44.012]: /dev/ptp3 offset        -80 s2 freq   +4335
      ts2phc[44.508]: /dev/ptp3 SKIP extts index 0 at 39.449219432 src 39.535846118
      ts2phc[44.996]: adding tstamp 39.949214816 to clock /dev/ptp3
      ts2phc[44.996]: adding tstamp 40.000000000 to clock /dev/ptp1
      ts2phc[44.996]: /dev/ptp3 offset        -32 s2 freq   +4359
      ts2phc[45.488]: /dev/ptp3 SKIP extts index 0 at 40.449210192 src 40.515824678
      ts2phc[45.980]: adding tstamp 40.949205568 to clock /dev/ptp3
      ts2phc[45.980]: adding tstamp 41.000000000 to clock /dev/ptp1
      ts2phc[45.980]: /dev/ptp3 offset          8 s2 freq   +4390
      ts2phc[46.636]: /dev/ptp3 SKIP extts index 0 at 41.449200928 src 41.664176902
      ts2phc[47.132]: adding tstamp 41.949196288 to clock /dev/ptp3
      ts2phc[47.132]: adding tstamp 42.000000000 to clock /dev/ptp1
      ts2phc[47.132]: /dev/ptp3 offset          0 s2 freq   +4384
      ts2phc[47.620]: /dev/ptp3 SKIP extts index 0 at 42.449191656 src 42.648117190
      ts2phc[48.112]: adding tstamp 42.949187016 to clock /dev/ptp3
      ts2phc[48.112]: adding tstamp 43.000000000 to clock /dev/ptp1
      ts2phc[48.112]: /dev/ptp3 offset          0 s2 freq   +4384
      ts2phc[48.604]: /dev/ptp3 SKIP extts index 0 at 43.449182384 src 43.632112582
      ts2phc[49.100]: adding tstamp 43.949177736 to clock /dev/ptp3
      ts2phc[49.100]: adding tstamp 44.000000000 to clock /dev/ptp1
      ts2phc[49.100]: /dev/ptp3 offset         -8 s2 freq   +4376
      ts2phc[49.588]: /dev/ptp3 SKIP extts index 0 at 44.449173096 src 44.616136774
      ts2phc[50.080]: adding tstamp 44.949168464 to clock /dev/ptp3
      ts2phc[50.080]: adding tstamp 45.000000000 to clock /dev/ptp1
      ts2phc[50.080]: /dev/ptp3 offset          8 s2 freq   +4390
      ts2phc[50.572]: /dev/ptp3 SKIP extts index 0 at 45.449163816 src 45.600134662
      ts2phc[51.064]: adding tstamp 45.949159160 to clock /dev/ptp3
      ts2phc[51.064]: adding tstamp 46.000000000 to clock /dev/ptp1
      ts2phc[51.064]: /dev/ptp3 offset         -8 s2 freq   +4376
      ts2phc[51.556]: /dev/ptp3 SKIP extts index 0 at 46.449154528 src 46.584588550
      ts2phc[52.048]: adding tstamp 46.949149896 to clock /dev/ptp3
      ts2phc[52.048]: adding tstamp 47.000000000 to clock /dev/ptp1
      ts2phc[52.048]: /dev/ptp3 offset          0 s2 freq   +4382
      ts2phc[52.540]: /dev/ptp3 SKIP extts index 0 at 47.449145256 src 47.568132198
      ts2phc[53.032]: adding tstamp 47.949140616 to clock /dev/ptp3
      ts2phc[53.032]: adding tstamp 48.000000000 to clock /dev/ptp1
      ts2phc[53.032]: /dev/ptp3 offset          0 s2 freq   +4382
      ts2phc[53.524]: /dev/ptp3 SKIP extts index 0 at 48.449135968 src 48.552121446
      ts2phc[54.016]: adding tstamp 48.949131320 to clock /dev/ptp3
      ts2phc[54.016]: adding tstamp 49.000000000 to clock /dev/ptp1
      ts2phc[54.016]: /dev/ptp3 offset          0 s2 freq   +4382
      ts2phc[54.512]: /dev/ptp3 SKIP extts index 0 at 49.449126680 src 49.540147014
      ts2phc[55.000]: adding tstamp 49.949122040 to clock /dev/ptp3
      ts2phc[55.000]: adding tstamp 50.000000000 to clock /dev/ptp1
      ts2phc[55.000]: /dev/ptp3 offset          0 s2 freq   +4382
      ts2phc[55.492]: /dev/ptp3 SKIP extts index 0 at 50.449117400 src 50.520119078
      ts2phc[55.988]: adding tstamp 50.949112768 to clock /dev/ptp3
      ts2phc[55.988]: adding tstamp 51.000000000 to clock /dev/ptp1
      ts2phc[55.988]: /dev/ptp3 offset          8 s2 freq   +4390
      ts2phc[56.476]: /dev/ptp3 SKIP extts index 0 at 51.449108120 src 51.504175910
      ts2phc[57.132]: adding tstamp 51.949103480 to clock /dev/ptp3
      ts2phc[57.132]: adding tstamp 52.000000000 to clock /dev/ptp1
      ts2phc[57.132]: /dev/ptp3 offset          0 s2 freq   +4384
      ts2phc[57.624]: /dev/ptp3 SKIP extts index 0 at 52.449098840 src 52.651833574
      ts2phc[58.116]: adding tstamp 52.949094200 to clock /dev/ptp3
      ts2phc[58.116]: adding tstamp 53.000000000 to clock /dev/ptp1
      ts2phc[58.116]: /dev/ptp3 offset          8 s2 freq   +4392
      ts2phc[58.612]: /dev/ptp3 SKIP extts index 0 at 53.449089560 src 53.639826918
      ts2phc[59.100]: adding tstamp 53.949084920 to clock /dev/ptp3
      ts2phc[59.100]: adding tstamp 54.000000000 to clock /dev/ptp1
      ts2phc[59.100]: /dev/ptp3 offset          8 s2 freq   +4394
      ts2phc[59.592]: /dev/ptp3 SKIP extts index 0 at 54.449080272 src 54.619842278
      ts2phc[60.084]: adding tstamp 54.949075624 to clock /dev/ptp3
      ts2phc[60.084]: adding tstamp 55.000000000 to clock /dev/ptp1
      ts2phc[60.084]: /dev/ptp3 offset          8 s2 freq   +4397
      ts2phc[60.576]: /dev/ptp3 SKIP extts index 0 at 55.449070968 src 55.603885542
      ts2phc[61.068]: adding tstamp 55.949066312 to clock /dev/ptp3
      ts2phc[61.068]: adding tstamp 56.000000000 to clock /dev/ptp1
      ts2phc[61.068]: /dev/ptp3 offset          0 s2 freq   +4391
      ts2phc[61.560]: /dev/ptp3 SKIP extts index 0 at 56.449061680 src 56.587885798
      ts2phc[62.052]: adding tstamp 56.949057032 to clock /dev/ptp3
      ts2phc[62.052]: adding tstamp 57.000000000 to clock /dev/ptp1
      ts2phc[62.052]: /dev/ptp3 offset         -8 s2 freq   +4383
      Signed-off-by: NVladimir Oltean <olteanv@gmail.com>
      Acked-by: NRichard Cochran <richardcochran@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      af9fdd2b
  23. 30 6月, 2020 1 次提交
  24. 26 6月, 2020 2 次提交
    • V
      net: dsa: sja1105: fix tc-gate schedule with single element · 43ce887c
      Vladimir Oltean 提交于
      The sja1105_gating_cfg_time_to_interval function does this, as per the
      comments:
      
      /* The gate entries contain absolute times in their e->interval field. Convert
       * that to proper intervals (i.e. "0, 5, 10, 15" to "5, 5, 5, 5").
       */
      
      To perform that task, it iterates over gating_cfg->entries, at each step
      updating the interval of the _previous_ entry. So one interval remains
      to be updated at the end of the loop: the last one (since it isn't
      "prev" for anyone else).
      
      But there was an erroneous check, that the last element's interval
      should not be updated if it's also the only element. I'm not quite sure
      why that check was there, but it's clearly incorrect, as a tc-gate
      schedule with a single element would get an e->interval of zero,
      regardless of the duration requested by the user. The switch wouldn't
      even consider this configuration as valid: it will just drop all traffic
      that matches the rule.
      
      Fixes: 834f8933 ("net: dsa: sja1105: implement tc-gate using time-triggered virtual links")
      Reported-by: NXiaoliang Yang <xiaoliang.yang_1@nxp.com>
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      43ce887c
    • V
      net: dsa: sja1105: recalculate gating subschedule after deleting tc-gate rules · 82f6896a
      Vladimir Oltean 提交于
      Currently, tas_data->enabled would remain true even after deleting all
      tc-gate rules from the switch ports, which would cause the
      sja1105_tas_state_machine to get unnecessarily scheduled.
      
      Also, if there were any errors which would prevent the hardware from
      enabling the gating schedule, the sja1105_tas_state_machine would
      continuously detect and print that, spamming the kernel log, even if the
      rules were subsequently deleted.
      
      The rules themselves are _not_ active, because sja1105_init_scheduling
      does enough of a job to not install the gating schedule in the static
      config. But the virtual link rules themselves are still present.
      
      So call the functions that remove the tc-gate configuration from
      priv->tas_data.gating_cfg, so that tas_data->enabled can be set to
      false, and sja1105_tas_state_machine will stop from being scheduled.
      
      Fixes: 834f8933 ("net: dsa: sja1105: implement tc-gate using time-triggered virtual links")
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      82f6896a