This patch adds basic support to MX27PDK board http://www.freescale.com/imx27pdk ).
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Adds a defconfig file for the i.MX21 SoC, targeting
the Freescale i.MX21ADS (M9328MX21ADSE) Application
Development System.
Signed-off-by: NIvo Clarysse <ivo.clarysse@gmail.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

* Kconfig enables now HAVE_PWM (this enables in turn the selection of
  CONFIG_BACKLIGHT_PWM)
* changes CONFIG_ARCH_MXyy to CONFIG_MACH_MXyy
* fix some register names to match those of the reference manual
* write a stub code so that the PWM can be used to program the
  LCD backlight
* convert from #ifdef CONFIG_ARCH_MXxx to cpu_is_mxXX()
* remove unneeded defines and fix 80-column "violations" of checkpatch.pl
Signed-off-by: NHolger Schurig <hs4233@mail.mn-solutions.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

[PATCH v6] MXC: mx21ads base support

Base machine support for the  Freescale i.MX21ADS
(M9328MX21ADSE) Application Development System.
Signed-off-by: NIvo Clarysse <ivo.clarysse@gmail.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Add support for a QVGA Sharp LCD on pcm037.
Signed-off-by: NGuennadi Liakhovetski <lg@denx.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

MXC GPIO controller does not support generation of interrupts on both
edges. Emulate this mode in software by reconfiguring the irq trigger
polarity on each interrupt. This follows an example of
drivers/mfd/asic3.c.
Signed-off-by: NGuennadi Liakhovetski <lg@denx.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NHolger Schurig <hs4233@mail.mn-solutions.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

arch-imx is superseeded by the MXC architecture support.
This patch removes arch/arm/mach-imx from the kernel.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

arch-imx is superseeded by the MXC architecture support.
This patch removes arch-imx from the build system.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Currently we depend on hardcoded base addresses for the interrupt
controller. This prevents us from compiling in more than one i.MX
architecture at a time. This patch changes the base address to a
runtime calculated one.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Currently we depend on hardcoded base addresses for the timer.
This prevents us from compiling in more than one i.MX architecture
at a time. This patch changes the base address to a runtime
calculated one.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This allows us to have more mapping functions for more than one
i.MX architecture in the kernel. As this is the earliest board
specific hook we have, also use it to set the cpu type.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

It is no longer present in newer cores. Unfortunately Freescale decided
to put the bit which decides between automotive clock path and consumer
clock path in the automotive clock path direction. With current code we
cannot detect the core revision, so just remove automotive path completely.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The PCM043 is a i.MX35 based board from Phytec also known as the
phyCORE-i.MX35.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This iomux is called iomux-v3 in the tree because it is the third known
incarnation of MXC iomuxers. It is not only found on the MX35 but also
on the MX51 and probably others.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The i.MX31 ARM11 core is not a v6K core. Disable this option as it
is incompatible with non v6K cores.
Signed-off-by: NMagnus Lilja <lilja.magnus@gmail.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Before this patch I got the following line in my dmesg:

	[    0.000000] BUG: mapping for 0xd4000000 at 0xeb000000 overlaps vmalloc space

VMALLOC_END is 0xf4000000 and there are the following other mappings
defined for mx27ads:

	(0xa0500000,+0x00001000) maps to 0xffff0000
	(0x10000000,+0x00100000) maps to 0xf4000000
	(0x80000000,+0x00100000) maps to 0xf4100000
	(0xd8000000,+0x00100000) maps to 0xf4200000

So map PBC to 0xf4300000.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

On i.MX31 I sometimes get spurious interrupts. There is no need
to crash the whole system when this happens. Instead, silently
ignore it.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

We want to have a mx31_defconfig file that builds a kernel that is able
to boot on all support mx31 systems and thus also can be better tested
by automatic build scripts. For these reasons, this config file is not
needed anymore.
Signed-off-by: NValentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

All i.MX platforms support <linux/clk.h> calls and should select HAVE_CLK.
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

On MX2 platforms imx_dma_request() calls request_irq() which may sleep
with interrupts disabled.
Signed-off-by: NMartin Fuzzey <mfuzzey@gmail.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The sequence
	imx_dma_request()
	imx_dma_enable()
	imx_dma_free()
left the dma channel in_use mode and did not release the timer.
Signed-off-by: NMartin Fuzzey <mfuzzey@gmail.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This patch is a workaround for the 460075 Cortex-A8 (r2p0) erratum. It
configures the L2 cache auxiliary control register so that the Write
Allocate mode for the L2 cache is disabled.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch adds a workaround for the 458693 Cortex-A8 (r2p0)
erratum. It sets the corresponding bits in the auxiliary control
register so that the PLD instruction becomes a NOP.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch adds the workaround for the 430973 Cortex-A8 (r1p0..r1p2)
erratum. The BTAC/BTB is now flushed at every context switch.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch implements the recommended workaround for erratum 411920
(ARM1136, ARM1156, ARM1176).
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

arm is placing some code in the .text.init section, but it does not
reference that section in its linker scripts.

This change moves this code from the .text.init section to the
.init.text section, which is presumably where it belongs.
Signed-off-by: NTim Abbott <tabbott@mit.edu>
Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Acked-by: NSam Ravnborg <sam@ravnborg.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Update NAND partitioning for the dm6446 evm, unmasking the hidden
data at the beginning and letting the kernel be updated from Linux.

 - This is boot-compatible with TI's software (U-Boot 1.20 and both
   the 2.6.10 and 2.6.18 kernels), in terms of startup and loading
   kernels from flash.

 - In the same way, it's also boot-compatible with mainline U-Boot,
   which stores U-Boot params in block 0 not block 16.

 - It's not quite compatible with systems that previously used NAND
   partitions to hold (filesystem) data.  The compatibilities are a
   bit different based on which kernel was used previously
     + Users of TI/MV kernels no longer see mtd2 "params"
       (mainline u-boot env is in a different place)
	* Filesystem is now mtd2 ... vs mtd3
     + Users of GIT kernels now see mtd0 and mtd1 partitions
	* Filesystem partition starts 640 KBytes earlier
	* Filesystem is now mtd2 ... vs mtd0
     * Linux now *uses* the flash-resident BBT
	* Removes annoying slowdown/hiccup during boot
	* Potentially ~64KB less space available with TI/MV kernels

If you *used* NAND partitions from Linux, there is no solution that's
fully compatible with all previous kernels in those respects ... ergo
this "best compromise".  It'd be good to back back up the filesystem
data; or, carry your own backwards-compatibility patch for awhile.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

Rework DM644x code into SoC specific and board specific parts.
This is also to generalize the structure a bit so it's easier to add
support for new SoCs in the DaVinci family.
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

Rename DM6446 EVM board file, no functional changes.  Code is updated
and reworked in following patch.
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

Update MUX support to be more general and useful across multiple
SoCs in the DaVinci family.
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

Adding IRQ defintions for DaVinci DM355 and default interrupt
priorities for DM355
Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

Signed-off-by: NSudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>