To aid debugging set the page mapping during allocation instead of
during VM faults.
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NRoger He <Hongbo.He@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This reverts commit 1c331f75.

Breaks resume on some systems.

Bug: https://bugs.freedesktop.org/show_bug.cgi?id=100759Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org

We use our own backing store and don't need the shmem file.
Signed-off-by: NChristian König <christian.koenig@amd.com>
Acked-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

We use our own backing store and don't need the shmem file.
Signed-off-by: NChristian König <christian.koenig@amd.com>
Acked-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

To be able to use DRI_PRIME with amdgpu and i915 we add all our fences
only as exclusive ones.

Disable that behavior when sharing between amdgpu itself cause it
hinders concurrent execution.
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Instead of the pin/unpin callback implement the attach/detach ones.

Functional identical, but allows us access to the attachment.
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

The logic has moved to cgs.  mclk switching with DC at higher refresh
rates should work.
Reviewed-by: NEric Huang <JinhuiEric.Huang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>

Clamp the vblank period to 0 if the refresh rate is larger than
120 hz for non-DC.  This allows us to remove the refresh rate
checks from powerplay for mclk switching.
Reviewed-by: NEric Huang <JinhuiEric.Huang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

If there are no displays attached, there is no reason to disable
mclk switching.

Fixes mclks getting set to high when there are no displays attached.
Reviewed-by: NEric Huang <JinhuiEric.Huang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org

If there are no displays attached, there is no reason to disable
mclk switching.

Fixes mclks getting set to high when there are no displays attached.
Reviewed-by: NEric Huang <JinhuiEric.Huang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org

Rather than open coding it.
Reviewed-by: NEric Huang <JinhuiEric.Huang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

All thoses headers are not used by any source files.
Lets just remove them.
Signed-off-by: NCorentin Labbe <clabbe@baylibre.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Currently, if amdgpu_vm_bo_update() fails, the returned error
is being ignored.

Fix this by properly checking _r_ after calling amdgpu_vm_bo_update.
Also, remove redundant code just before label _error_.

Addresses-Coverity-ID: 1464280 ("Unused value")
Fixes: 0abc6878 ("drm/amdgpu: update VM PDs after the PTs")
Signed-off-by: NGustavo A. R. Silva <gustavo@embeddedor.com>
Reviewed-by: NChristian König <christian.koenig@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Updating the PASID is rather heavyweight and shouldn't be done all the
time.
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Stuffing the PASID mapping into the VM flush isn't flexible enough since
the PASID mapping changes not as often as we need a VM flush.

v2: add missing use of gmc_v7_0_emit_pasid_mapping
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Previously, the number of software segmets per region was reduced to 16.
This needs to be reflected in the sampling distance (increment) used when
translating to the hardware format.
Signed-off-by: NLeo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: NKrunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Some refactoring and optimizations in color module.
Added de gamma 2.2 & 2.4, also re gamma 2.2.
Added interface for diagnostic for de gamma & de pq.
Signed-off-by: NVitaly Prosyak <vitaly.prosyak@amd.com>
Reviewed-by: NKrunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Reviewed-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Acked-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Add basic logging for DPCD access. Does not print
by default.

Currently only prints first byte of the data accessed.

Technical debt: Need to make it so that the entire
data block accessed is printed. Also need to log
address space that's not DPCD.
Signed-off-by: NEric Yang <Eric.Yang2@amd.com>
Reviewed-by: NTony Cheng <Tony.Cheng@amd.com>
Acked-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Brightness couldn't change when booting up in DC mode.
It was because "psr_enabled" flag was not set to true before
setting vsc packet revision, causing packet rev setup was skipped.
Now instead of checking the psr flag, it checks if the DPCD_REV >= 1.2
and set the vsc packet revision.
Signed-off-by: NTao <xtao@amd.com>
Reviewed-by: NTony Cheng <Tony.Cheng@amd.com>
Acked-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NAnthony Koo <Anthony.Koo@amd.com>
Reviewed-by: NTony Cheng <Tony.Cheng@amd.com>
Acked-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Reviewed-by: NHersen Wu <hersenxs.wu@amd.com>
Acked-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

We have an mst dock firmware that will emulate an EDID with bad
checksum.

v2: Tread -> Treat
Signed-off-by: NEric Yang <Eric.Yang2@amd.com>
Reviewed-by: NTony Cheng <Tony.Cheng@amd.com>
Acked-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Identical to the two entries above them.
Signed-off-by: NKen Chalmers <ken.chalmers@amd.com>
Reviewed-by: NTony Cheng <Tony.Cheng@amd.com>
Acked-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Previously, FBC dynamic allocation relied on connector modes
populated during dm init. This is only the case if
DRM_FBDEV_EMULATION config flag is enabled.
Moving fbc allocation from dm_late_init() to
amdgpu_dm_connector_get_modes() where actual modes init happens.
Signed-off-by: NRoman Li <Roman.Li@amd.com>
Reviewed-by: NShirish Shankarappa <Shirish.S@amd.com>
Acked-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

HDMI HPD's generic solution makes the monitor
patch code unnecessary so anything related has
been removed.
Signed-off-by: NJohn Barberiz <jbarberi@amd.com>
Reviewed-by: NJohn Barberiz <jbarberi@amd.com>
Acked-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Skipping the first frame will prevent uncoooked values most of the time.
However, in some unlikely cases, the second frame will be uncooked as
well.
Signed-off-by: NLeo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: NHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Implement CRC for DCE8. Registers remain the same, so call DCE110 code
directly.
Signed-off-by: NLeo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: NHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Clear up the logic, and enable programming truncation as a bit reduction
mode.
Signed-off-by: NLeo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: NHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: NTony Cheng <Tony.Cheng@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

When user-mode is using 8bpc, the hardware represents it internally
using a higher bit depth. This causes problems when comparing CRCs for
color managment tests.

We need to disable dithering as well, since it makes CRC values
non-deterministic.

It's easy to see why dithering needs to be disabled, The reason why
truncation also needs to be enabled is better described with an example.
Consider the folowing which tests the color transform matrix (CTM):

Expected CRC = FB_A -> Degamma (Bypassed) -> CTM (Bypassed)
                                                  |
                                                  v
                            Obtain CRC  <- Regamma(Bypassed)

Actual CRC = FB_B -> Degamma (Bypassed) -> CTM (0.5*Identity)
                                                  |
                                                  v
                            Obtain CRC  <- Regamma(Bypassed)

FB_A contains a solid red color at half intensity (127 @ 8bpc)
FB_B contains a solid red color at full intensity (255 @ 8bpc)

We expect that Expected CRC = Actual CRC, but that's not the case. When
the CTM is applied, the output is at half intensity, but also at a
higher bit depth within hardware. i.e. 255/2 = 127.5: not representable
in 8bpc, but can be at 10bpc. This causes the two CRC's to be different.

The solution is to truncate the output bit depth to the same as input
when enabling CRC capture. Since Linux only supports 8bpc, hard code
that for now.
Signed-off-by: NLeo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: NHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

We will need this to disable dither for CRC capture.
Signed-off-by: NLeo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: NHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NLeo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: NHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Hookup new color management functions into amdgpu_dm:

- Notify DRM that we support CRTC color management during CRTC init
- Call color management functions within atomic check to update dc
  states in preparation for a commit
Signed-off-by: NLeo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: NHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Implement color management functionalities within amdgpu_dm_color, and
expose functions within amdgpu_dm.h.
Signed-off-by: NLeo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: NHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Also guard includes that we don't need.
Signed-off-by: NLeo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: NHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

The MAX_LOW_POINT macro should reflect the maximum low point within
hardware. Otherwise, sampling for the hardware points from the output
transfer function (OTF) will be incorrect.

Also, fix usage of MAX_LOW_POINT accordingly.
Signed-off-by: NLeo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: NKrunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Reviewed-by: NTony Cheng <Tony.Cheng@amd.com>
Acked-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Both functions are the same
Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Reviewed-by: NTony Cheng <Tony.Cheng@amd.com>
Acked-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Signed-off-by: NHarry Wentland <harry.wentland@amd.com>
Reviewed-by: NTony Cheng <Tony.Cheng@amd.com>
Acked-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This path fixed specific eDP panel cold boot black screen
due to unnecessary enable link.
Change:
In case of boot up with eDP, if OS is going to set mode
on eDP, keep eDP light up, do not disable and reset corresponding
HW.
This change may affect dce asics and S3/S4 Resume with multi-monitor.
Signed-off-by: NYongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: NTony Cheng <Tony.Cheng@amd.com>
Acked-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>