1. 20 9月, 2022 4 次提交
    • V
      net: dsa: allow masters to join a LAG · acc43b7b
      Vladimir Oltean 提交于
      There are 2 ways in which a DSA user port may become handled by 2 CPU
      ports in a LAG:
      
      (1) its current DSA master joins a LAG
      
       ip link del bond0 && ip link add bond0 type bond mode 802.3ad
       ip link set eno2 master bond0
      
      When this happens, all user ports with "eno2" as DSA master get
      automatically migrated to "bond0" as DSA master.
      
      (2) it is explicitly configured as such by the user
      
       # Before, the DSA master was eno3
       ip link set swp0 type dsa master bond0
      
      The design of this configuration is that the LAG device dynamically
      becomes a DSA master through dsa_master_setup() when the first physical
      DSA master becomes a LAG slave, and stops being so through
      dsa_master_teardown() when the last physical DSA master leaves.
      
      A LAG interface is considered as a valid DSA master only if it contains
      existing DSA masters, and no other lower interfaces. Therefore, we
      mainly rely on method (1) to enter this configuration.
      
      Each physical DSA master (LAG slave) retains its dev->dsa_ptr for when
      it becomes a standalone DSA master again. But the LAG master also has a
      dev->dsa_ptr, and this is actually duplicated from one of the physical
      LAG slaves, and therefore needs to be balanced when LAG slaves come and
      go.
      
      To the switch driver, putting DSA masters in a LAG is seen as putting
      their associated CPU ports in a LAG.
      
      We need to prepare cross-chip host FDB notifiers for CPU ports in a LAG,
      by calling the driver's ->lag_fdb_add method rather than ->port_fdb_add.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NPaolo Abeni <pabeni@redhat.com>
      acc43b7b
    • V
      net: dsa: propagate extack to port_lag_join · 2e359b00
      Vladimir Oltean 提交于
      Drivers could refuse to offload a LAG configuration for a variety of
      reasons, mainly having to do with its TX type. Additionally, since DSA
      masters may now also be LAG interfaces, and this will translate into a
      call to port_lag_join on the CPU ports, there may be extra restrictions
      there. Propagate the netlink extack to this DSA method in order for
      drivers to give a meaningful error message back to the user.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NPaolo Abeni <pabeni@redhat.com>
      2e359b00
    • V
      net: dsa: allow the DSA master to be seen and changed through rtnetlink · 95f510d0
      Vladimir Oltean 提交于
      Some DSA switches have multiple CPU ports, which can be used to improve
      CPU termination throughput, but DSA, through dsa_tree_setup_cpu_ports(),
      sets up only the first one, leading to suboptimal use of hardware.
      
      The desire is to not change the default configuration but to permit the
      user to create a dynamic mapping between individual user ports and the
      CPU port that they are served by, configurable through rtnetlink. It is
      also intended to permit load balancing between CPU ports, and in that
      case, the foreseen model is for the DSA master to be a bonding interface
      whose lowers are the physical DSA masters.
      
      To that end, we create a struct rtnl_link_ops for DSA user ports with
      the "dsa" kind. We expose the IFLA_DSA_MASTER link attribute that
      contains the ifindex of the newly desired DSA master.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NPaolo Abeni <pabeni@redhat.com>
      95f510d0
    • V
      net: dsa: introduce dsa_port_get_master() · 8f6a19c0
      Vladimir Oltean 提交于
      There is a desire to support for DSA masters in a LAG.
      
      That configuration is intended to work by simply enslaving the master to
      a bonding/team device. But the physical DSA master (the LAG slave) still
      has a dev->dsa_ptr, and that cpu_dp still corresponds to the physical
      CPU port.
      
      However, we would like to be able to retrieve the LAG that's the upper
      of the physical DSA master. In preparation for that, introduce a helper
      called dsa_port_get_master() that replaces all occurrences of the
      dp->cpu_dp->master pattern. The distinction between LAG and non-LAG will
      be made later within the helper itself.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NPaolo Abeni <pabeni@redhat.com>
      8f6a19c0
  2. 23 8月, 2022 2 次提交
    • V
      net: dsa: make phylink-related OF properties mandatory on DSA and CPU ports · e09e9873
      Vladimir Oltean 提交于
      Early DSA drivers were kind of simplistic in that they assumed a fairly
      narrow hardware layout. User ports would have integrated PHYs at an
      internal MDIO address that is derivable from the port number, and shared
      (DSA and CPU) ports would have an MII-style (serial or parallel)
      connection to another MAC. Phylib and then phylink were used to drive
      the internal PHYs, and this needed little to no description through the
      platform data structures. Bringing up the shared ports at the maximum
      supported link speed was the responsibility of the drivers.
      
      As a result of this, when these early drivers were converted from
      platform data to the new DSA OF bindings, there was no link information
      translated into the first DT bindings.
      
      https://lore.kernel.org/all/YtXFtTsf++AeDm1l@lunn.ch/
      
      Later, phylink was adopted for shared ports as well, and today we have a
      workaround in place, introduced by commit a20f9970 ("net: dsa: Don't
      instantiate phylink for CPU/DSA ports unless needed"). There, DSA checks
      for the presence of phy-handle/fixed-link/managed OF properties, and if
      missing, phylink registration would be skipped. This is because phylink
      is optional for some drivers (the shared ports already work without it),
      but the process of starting to register a port with phylink is
      irreversible: if phylink_create() fails to find the fwnode properties it
      needs, it bails out and it leaves the ports inoperational (because
      phylink expects ports to be initially down, so DSA necessarily takes
      them down, and doesn't know how to put them back up again).
      
      DSA being a common framework, new drivers opt into this workaround
      willy-nilly, but the ideal behavior from the DSA core's side would have
      been to not interfere with phylink's process of failing at all. This
      isn't possible because of regression concerns with pre-phylink DT blobs,
      but at least DSA should put a stop to the proliferation of more of such
      cases that rely on the workaround to skip phylink registration, and
      sanitize the environment that new drivers work in.
      
      To that end, create a list of compatible strings for which the
      workaround is preserved, and don't apply the workaround for any drivers
      outside that list (this includes new drivers).
      
      In some cases, we make the assumption that even existing drivers don't
      rely on DSA's workaround, and we do this by looking at the device trees
      in which they appear. We can't fully know what is the situation with
      downstream DT blobs, but we can guess the overall trend by studying the
      DT blobs that were submitted upstream. If there are upstream blobs that
      have lacking descriptions, we take it as very likely that there are many
      more downstream blobs that do so too. If all upstream blobs have
      complete descriptions, we take that as a hint that the driver is a
      candidate for enforcing strict DT bindings (considering that most
      bindings are copy-pasted). If there are no upstream DT blobs, we take
      the conservative route of allowing the workaround, unless the driver
      maintainer instructs us otherwise.
      
      The driver situation is as follows:
      
      ar9331
      ~~~~~~
      
          compatible strings:
          - qca,ar9331-switch
      
          1 occurrence in mainline device trees, part of SoC dtsi
          (arch/mips/boot/dts/qca/ar9331.dtsi), description is not problematic.
      
          Verdict: opt into strict DT bindings and out of workarounds.
      
      b53
      ~~~
      
          compatible strings:
          - brcm,bcm5325
          - brcm,bcm53115
          - brcm,bcm53125
          - brcm,bcm53128
          - brcm,bcm5365
          - brcm,bcm5389
          - brcm,bcm5395
          - brcm,bcm5397
          - brcm,bcm5398
      
          - brcm,bcm53010-srab
          - brcm,bcm53011-srab
          - brcm,bcm53012-srab
          - brcm,bcm53018-srab
          - brcm,bcm53019-srab
          - brcm,bcm5301x-srab
          - brcm,bcm11360-srab
          - brcm,bcm58522-srab
          - brcm,bcm58525-srab
          - brcm,bcm58535-srab
          - brcm,bcm58622-srab
          - brcm,bcm58623-srab
          - brcm,bcm58625-srab
          - brcm,bcm88312-srab
          - brcm,cygnus-srab
          - brcm,nsp-srab
          - brcm,omega-srab
      
          - brcm,bcm3384-switch
          - brcm,bcm6328-switch
          - brcm,bcm6368-switch
          - brcm,bcm63xx-switch
      
          I've found at least these mainline DT blobs with problems:
      
          arch/arm/boot/dts/bcm47094-linksys-panamera.dts
          - lacks phy-mode
          arch/arm/boot/dts/bcm47189-tenda-ac9.dts
          - lacks phy-mode and fixed-link
          arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts
          arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
          arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts
          - lacks phy-mode and fixed-link
          arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts
          arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
          arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts
          arch/arm/boot/dts/bcm953012er.dts
          arch/arm/boot/dts/bcm4708-netgear-r6250.dts
          arch/arm/boot/dts/bcm4708-buffalo-wzr-1166dhp-common.dtsi
          arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
          arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts
          - lacks phy-mode and fixed-link
          arch/arm/boot/dts/bcm53016-meraki-mr32.dts
          - lacks phy-mode
      
          Verdict: opt into DSA workarounds.
      
      bcm_sf2
      ~~~~~~~
      
          compatible strings:
          - brcm,bcm4908-switch
          - brcm,bcm7445-switch-v4.0
          - brcm,bcm7278-switch-v4.0
          - brcm,bcm7278-switch-v4.8
      
          A single occurrence in mainline
          (arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi), part of a SoC
          dtsi, valid description. Florian Fainelli explains that most of the
          bcm_sf2 device trees lack a full description for the internal IMP
          ports.
      
          Verdict: opt the BCM4908 into strict DT bindings, and opt the rest
          into the workarounds. Note that even though BCM4908 has strict DT
          bindings, it still does not register with phylink on the IMP port
          due to it implementing ->adjust_link().
      
      hellcreek
      ~~~~~~~~~
      
          compatible strings:
          - hirschmann,hellcreek-de1soc-r1
      
          No occurrence in mainline device trees. Kurt Kanzenbach explains
          that the downstream device trees lacked phy-mode and fixed link, and
          needed work, but were fixed in the meantime.
      
          Verdict: opt into strict DT bindings and out of workarounds.
      
      lan9303
      ~~~~~~~
      
          compatible strings:
          - smsc,lan9303-mdio
          - smsc,lan9303-i2c
      
          1 occurrence in mainline device trees:
          arch/arm/boot/dts/imx53-kp-hsc.dts
          - no phy-mode, no fixed-link
      
          Verdict: opt out of strict DT bindings and into workarounds.
      
      lantiq_gswip
      ~~~~~~~~~~~~
      
          compatible strings:
          - lantiq,xrx200-gswip
          - lantiq,xrx300-gswip
          - lantiq,xrx330-gswip
      
          No occurrences in mainline device trees. Martin Blumenstingl
          confirms that the downstream OpenWrt device trees lack a proper
          fixed-link and need work, and that the incomplete description can
          even be seen in the example from
          Documentation/devicetree/bindings/net/dsa/lantiq-gswip.txt.
      
          Verdict: opt out of strict DT bindings and into workarounds.
      
      microchip ksz
      ~~~~~~~~~~~~~
      
          compatible strings:
          - microchip,ksz8765
          - microchip,ksz8794
          - microchip,ksz8795
          - microchip,ksz8863
          - microchip,ksz8873
          - microchip,ksz9477
          - microchip,ksz9897
          - microchip,ksz9893
          - microchip,ksz9563
          - microchip,ksz8563
          - microchip,ksz9567
          - microchip,lan9370
          - microchip,lan9371
          - microchip,lan9372
          - microchip,lan9373
          - microchip,lan9374
      
          5 occurrences in mainline device trees, all descriptions are valid.
          But we had a snafu for the ksz8795 and ksz9477 drivers where the
          phy-mode property would be expected to be located directly under the
          'switch' node rather than under a port OF node. It was fixed by
          commit edecfa98 ("net: dsa: microchip: look for phy-mode in port
          nodes"). The driver still has compatibility with the old DT blobs.
          The lan937x support was added later than the above snafu was fixed,
          and even though it has support for the broken DT blobs by virtue of
          sharing a common probing function, I'll take it that its DT blobs
          are correct.
      
          Verdict: opt lan937x into strict DT bindings, and the others out.
      
      mt7530
      ~~~~~~
      
          compatible strings
          - mediatek,mt7621
          - mediatek,mt7530
          - mediatek,mt7531
      
          Multiple occurrences in mainline device trees, one is part of an SoC
          dtsi (arch/mips/boot/dts/ralink/mt7621.dtsi), all descriptions are fine.
      
          Verdict: opt into strict DT bindings and out of workarounds.
      
      mv88e6060
      ~~~~~~~~~
      
          compatible string:
          - marvell,mv88e6060
      
          no occurrences in mainline, nobody knows anybody who uses it.
      
          Verdict: opt out of strict DT bindings and into workarounds.
      
      mv88e6xxx
      ~~~~~~~~~
      
          compatible strings:
          - marvell,mv88e6085
          - marvell,mv88e6190
          - marvell,mv88e6250
      
          Device trees that have incomplete descriptions of CPU or DSA ports:
          arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi
          - lacks phy-mode
          arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
          - lacks phy-mode and fixed-link
          arch/arm/boot/dts/vf610-zii-ssmb-spu3.dts
          - lacks phy-mode
          arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts
          - lacks phy-mode
          arch/arm/boot/dts/vf610-zii-spb4.dts
          - lacks phy-mode
          arch/arm/boot/dts/vf610-zii-cfu1.dts
          - lacks phy-mode
          arch/arm/boot/dts/vf610-zii-dev-rev-c.dts
          - lacks phy-mode on CPU port, fixed-link on DSA ports
          arch/arm/boot/dts/vf610-zii-dev-rev-b.dts
          - lacks phy-mode on CPU port
          arch/arm/boot/dts/armada-381-netgear-gs110emx.dts
          - lacks phy-mode
          arch/arm/boot/dts/vf610-zii-scu4-aib.dts
          - lacks fixed-link on xgmii DSA ports and/or in-band-status on
            2500base-x DSA ports, and phy-mode on CPU port
          arch/arm/boot/dts/imx6qdl-gw5904.dtsi
          - lacks phy-mode and fixed-link
          arch/arm/boot/dts/armada-385-clearfog-gtr-l8.dts
          - lacks phy-mode and fixed-link
          arch/arm/boot/dts/vf610-zii-ssmb-dtu.dts
          - lacks phy-mode
          arch/arm/boot/dts/kirkwood-dir665.dts
          - lacks phy-mode
          arch/arm/boot/dts/kirkwood-rd88f6281.dtsi
          - lacks phy-mode
          arch/arm/boot/dts/orion5x-netgear-wnr854t.dts
          - lacks phy-mode and fixed-link
          arch/arm/boot/dts/armada-388-clearfog.dts
          - lacks phy-mode
          arch/arm/boot/dts/armada-xp-linksys-mamba.dts
          - lacks phy-mode
          arch/arm/boot/dts/armada-385-linksys.dtsi
          - lacks phy-mode
          arch/arm/boot/dts/imx6q-b450v3.dts
          arch/arm/boot/dts/imx6q-b850v3.dts
          - has a phy-handle but not a phy-mode?
          arch/arm/boot/dts/armada-370-rd.dts
          - lacks phy-mode
          arch/arm/boot/dts/kirkwood-linksys-viper.dts
          - lacks phy-mode
          arch/arm/boot/dts/imx51-zii-rdu1.dts
          - lacks phy-mode
          arch/arm/boot/dts/imx51-zii-scu2-mezz.dts
          - lacks phy-mode
          arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi
          - lacks phy-mode
          arch/arm/boot/dts/armada-385-clearfog-gtr-s4.dts
          - lacks phy-mode and fixed-link
      
          Verdict: opt out of strict DT bindings and into workarounds.
      
      ocelot
      ~~~~~~
      
          compatible strings:
          - mscc,vsc9953-switch
          - felix (arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi) is a PCI
            device, has no compatible string
      
          2 occurrences in mainline, both are part of SoC dtsi and complete.
      
          Verdict: opt into strict DT bindings and out of workarounds.
      
      qca8k
      ~~~~~
      
          compatible strings:
          - qca,qca8327
          - qca,qca8328
          - qca,qca8334
          - qca,qca8337
      
          5 occurrences in mainline device trees, none of the descriptions are
          problematic.
      
          Verdict: opt into strict DT bindings and out of workarounds.
      
      realtek
      ~~~~~~~
      
          compatible strings:
          - realtek,rtl8366rb
          - realtek,rtl8365mb
      
          2 occurrences in mainline, both descriptions are fine, additionally
          rtl8365mb.c has a comment "The device tree firmware should also
          specify the link partner of the extension port - either via a
          fixed-link or other phy-handle."
      
          Verdict: opt into strict DT bindings and out of workarounds.
      
      rzn1_a5psw
      ~~~~~~~~~~
      
          compatible strings:
          - renesas,rzn1-a5psw
      
          One single occurrence, part of SoC dtsi
          (arch/arm/boot/dts/r9a06g032.dtsi), description is fine.
      
          Verdict: opt into strict DT bindings and out of workarounds.
      
      sja1105
      ~~~~~~~
      
          Driver already validates its port OF nodes in
          sja1105_parse_ports_node().
      
          Verdict: opt into strict DT bindings and out of workarounds.
      
      vsc73xx
      ~~~~~~~
      
          compatible strings:
          - vitesse,vsc7385
          - vitesse,vsc7388
          - vitesse,vsc7395
          - vitesse,vsc7398
      
          2 occurrences in mainline device trees, both descriptions are fine.
      
          Verdict: opt into strict DT bindings and out of workarounds.
      
      xrs700x
      ~~~~~~~
      
          compatible strings:
          - arrow,xrs7003e
          - arrow,xrs7003f
          - arrow,xrs7004e
          - arrow,xrs7004f
      
          no occurrences in mainline, we don't know.
      
          Verdict: opt out of strict DT bindings and into workarounds.
      
      Because there is a pattern where newly added switches reuse existing
      drivers more often than introducing new ones, I've opted for deciding
      who gets to opt into the workaround based on an OF compatible match
      table in the DSA core. The alternative would have been to add another
      boolean property to struct dsa_switch, like configure_vlan_while_not_filtering.
      But this avoids situations where sometimes driver maintainers obfuscate
      what goes on by sharing a common probing function, and therefore making
      new switches inherit old quirks.
      
      Side note, we also warn about missing properties for drivers that rely
      on the workaround. This isn't an indication that we'll break
      compatibility with those DT blobs any time soon, but is rather done to
      raise awareness about the change, for future DT blob authors.
      
      Cc: Rob Herring <robh+dt@kernel.org>
      Cc: Frank Rowand <frowand.list@gmail.com>
      Acked-by: Alvin Šipraga <alsi@bang-olufsen.dk> # realtek
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      e09e9873
    • V
      net: dsa: rename dsa_port_link_{,un}register_of · 770375ff
      Vladimir Oltean 提交于
      There is a subset of functions that applies only to shared (DSA and CPU)
      ports, yet this is difficult to comprehend by looking at their code alone.
      These are dsa_port_link_register_of(), dsa_port_link_unregister_of(),
      and the functions that only these 2 call.
      
      Rename this class of functions to dsa_shared_port_* to make this fact
      more evident, even if this goes against the apparent convention that
      function names in port.c must start with dsa_port_.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      770375ff
  3. 18 8月, 2022 1 次提交
  4. 19 7月, 2022 2 次提交
  5. 13 5月, 2022 1 次提交
    • V
      net: dsa: felix: manage host flooding using a specific driver callback · 72c3b0c7
      Vladimir Oltean 提交于
      At the time - commit 7569459a ("net: dsa: manage flooding on the CPU
      ports") - not introducing a dedicated switch callback for host flooding
      made sense, because for the only user, the felix driver, there was
      nothing different to do for the CPU port than set the flood flags on the
      CPU port just like on any other bridge port.
      
      There are 2 reasons why this approach is not good enough, however.
      
      (1) Other drivers, like sja1105, support configuring flooding as a
          function of {ingress port, egress port}, whereas the DSA
          ->port_bridge_flags() function only operates on an egress port.
          So with that driver we'd have useless host flooding from user ports
          which don't need it.
      
      (2) Even with the felix driver, support for multiple CPU ports makes it
          difficult to piggyback on ->port_bridge_flags(). The way in which
          the felix driver is going to support host-filtered addresses with
          multiple CPU ports is that it will direct these addresses towards
          both CPU ports (in a sort of multicast fashion), then restrict the
          forwarding to only one of the two using the forwarding masks.
          Consequently, flooding will also be enabled towards both CPU ports.
          However, ->port_bridge_flags() gets passed the index of a single CPU
          port, and that leaves the flood settings out of sync between the 2
          CPU ports.
      
      This is to say, it's better to have a specific driver method for host
      flooding, which takes the user port as argument. This solves problem (1)
      by allowing the driver to do different things for different user ports,
      and problem (2) by abstracting the operation and letting the driver do
      whatever, rather than explicitly making the DSA core point to the CPU
      port it thinks needs to be touched.
      
      This new method also creates a problem, which is that cross-chip setups
      are not handled. However I don't have hardware right now where I can
      test what is the proper thing to do, and there isn't hardware compatible
      with multi-switch trees that supports host flooding. So it remains a
      problem to be tackled in the future.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      72c3b0c7
  6. 10 5月, 2022 1 次提交
    • V
      net: dsa: flush switchdev workqueue on bridge join error path · 630fd482
      Vladimir Oltean 提交于
      There is a race between switchdev_bridge_port_offload() and the
      dsa_port_switchdev_sync_attrs() call right below it.
      
      When switchdev_bridge_port_offload() finishes, FDB entries have been
      replayed by the bridge, but are scheduled for deferred execution later.
      
      However dsa_port_switchdev_sync_attrs -> dsa_port_can_apply_vlan_filtering()
      may impose restrictions on the vlan_filtering attribute and refuse
      offloading.
      
      When this happens, the delayed FDB entries will dereference dp->bridge,
      which is a NULL pointer because we have stopped the process of
      offloading this bridge.
      
      Unable to handle kernel NULL pointer dereference at virtual address 0000000000000000
      Workqueue: dsa_ordered dsa_slave_switchdev_event_work
      pc : dsa_port_bridge_host_fdb_del+0x64/0x100
      lr : dsa_slave_switchdev_event_work+0x130/0x1bc
      Call trace:
       dsa_port_bridge_host_fdb_del+0x64/0x100
       dsa_slave_switchdev_event_work+0x130/0x1bc
       process_one_work+0x294/0x670
       worker_thread+0x80/0x460
      ---[ end trace 0000000000000000 ]---
      Error: dsa_core: Must first remove VLAN uppers having VIDs also present in bridge.
      
      Fix the bug by doing what we do on the normal bridge leave path as well,
      which is to wait until the deferred FDB entries complete executing, then
      exit.
      
      The placement of dsa_flush_workqueue() after switchdev_bridge_port_unoffload()
      guarantees that both the FDB additions and deletions on rollback are waited for.
      
      Fixes: d7d0d423 ("net: dsa: flush switchdev workqueue when leaving the bridge")
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Link: https://lore.kernel.org/r/20220507134550.1849834-1-vladimir.oltean@nxp.comSigned-off-by: NJakub Kicinski <kuba@kernel.org>
      630fd482
  7. 22 4月, 2022 1 次提交
  8. 20 4月, 2022 3 次提交
    • V
      net: dsa: don't emit targeted cross-chip notifiers for MTU change · be6ff966
      Vladimir Oltean 提交于
      A cross-chip notifier with "targeted_match=true" is one that matches
      only the local port of the switch that emitted it. In other words,
      passing through the cross-chip notifier layer serves no purpose.
      
      Eliminate this concept by calling directly ds->ops->port_change_mtu
      instead of emitting a targeted cross-chip notifier. This leaves the
      DSA_NOTIFIER_MTU event being emitted only for MTU updates on the CPU
      port, which need to be reflected also across all DSA links.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      be6ff966
    • V
      net: dsa: make cross-chip notifiers more efficient for host events · 726816a1
      Vladimir Oltean 提交于
      To determine whether a given port should react to the port targeted by
      the notifier, dsa_port_host_vlan_match() and dsa_port_host_address_match()
      look at the positioning of the switch port currently executing the
      notifier relative to the switch port for which the notifier was emitted.
      
      To maintain stylistic compatibility with the other match functions from
      switch.c, the host address and host VLAN match functions take the
      notifier information about targeted port, switch and tree indices as
      argument. However, these functions only use that information to retrieve
      the struct dsa_port *targeted_dp, which is an invariant for the outer
      loop that calls them. So it makes more sense to calculate the targeted
      dp only once, and pass it to them as argument.
      
      But furthermore, the targeted dp is actually known at the time the call
      to dsa_port_notify() is made. It is just that we decide to only save the
      indices of the port, switch and tree in the notifier structure, just to
      retrace our steps and find the dp again using dsa_switch_find() and
      dsa_to_port().
      
      But both the above functions are relatively expensive, since they need
      to iterate through lists. It appears more straightforward to make all
      notifiers just pass the targeted dp inside their info structure, and
      have the code that needs the indices to look at info->dp->index instead
      of info->port, or info->dp->ds->index instead of info->sw_index, or
      info->dp->ds->dst->index instead of info->tree_index.
      
      For the sake of consistency, all cross-chip notifiers are converted to
      pass the "dp" directly.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      726816a1
    • V
      net: dsa: move reset of VLAN filtering to dsa_port_switchdev_unsync_attrs · 8e9e678e
      Vladimir Oltean 提交于
      In dsa_port_switchdev_unsync_attrs() there is a comment that resetting
      the VLAN filtering isn't done where it is expected. And since commit
      108dc874 ("net: dsa: Avoid cross-chip syncing of VLAN filtering"),
      there is no reason to handle this in switch.c either.
      
      Therefore, move the logic to port.c, and adapt it slightly to the data
      structures and naming conventions from there.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      8e9e678e
  9. 18 3月, 2022 3 次提交
  10. 03 3月, 2022 2 次提交
    • V
      net: dsa: install secondary unicast and multicast addresses as host FDB/MDB · 5e8a1e03
      Vladimir Oltean 提交于
      In preparation of disabling flooding towards the CPU in standalone ports
      mode, identify the addresses requested by upper interfaces and use the
      new API for DSA FDB isolation to request the hardware driver to offload
      these as FDB or MDB objects. The objects belong to the user port's
      database, and are installed pointing towards the CPU port.
      
      Because dev_uc_add()/dev_mc_add() is VLAN-unaware, we offload to the
      port standalone database addresses with VID 0 (also VLAN-unaware).
      So this excludes switches with global VLAN filtering from supporting
      unicast filtering, because there, it is possible for a port of a switch
      to join a VLAN-aware bridge, and this changes the VLAN awareness of
      standalone ports, requiring VLAN-aware standalone host FDB entries.
      For the same reason, hellcreek, which requires VLAN awareness in
      standalone mode, is also exempted from unicast filtering.
      
      We create "standalone" variants of dsa_port_host_fdb_add() and
      dsa_port_host_mdb_add() (and the _del coresponding functions).
      
      We also create a separate work item type for handling deferred
      standalone host FDB/MDB entries compared to the switchdev one.
      This is done for the purpose of clarity - the procedure for offloading a
      bridge FDB entry is different than offloading a standalone one, and
      the switchdev event work handles only FDBs anyway, not MDBs.
      Deferral is needed for standalone entries because ndo_set_rx_mode runs
      in atomic context. We could probably optimize things a little by first
      queuing up all entries that need to be offloaded, and scheduling the
      work item just once, but the data structures that we can pass through
      __dev_uc_sync() and __dev_mc_sync() are limiting (there is nothing like
      a void *priv), so we'd have to keep the list of queued events somewhere
      in struct dsa_switch, and possibly a lock for it. Too complicated for
      now.
      
      Adding the address to the master is handled by dev_uc_sync(), adding it
      to the hardware is handled by __dev_uc_sync(). So this is the reason why
      dsa_port_standalone_host_fdb_add() does not call dev_uc_add(). Not that
      it had the rtnl_mutex anyway - ndo_set_rx_mode has it, but is atomic.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      5e8a1e03
    • V
      net: dsa: rename the host FDB and MDB methods to contain the "bridge" namespace · 68d6d71e
      Vladimir Oltean 提交于
      We are preparing to add API in port.c that adds FDB and MDB entries that
      correspond to the port's standalone database. Rename the existing
      methods to make it clear that the FDB and MDB entries offloaded come
      from the bridge database.
      
      Since the function names lengthen in dsa_slave_switchdev_event_work(),
      we place "addr" and "vid" in temporary variables, to shorten those.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      68d6d71e
  11. 27 2月, 2022 2 次提交
    • V
      net: dsa: pass extack to .port_bridge_join driver methods · 06b9cce4
      Vladimir Oltean 提交于
      As FDB isolation cannot be enforced between VLAN-aware bridges in lack
      of hardware assistance like extra FID bits, it seems plausible that many
      DSA switches cannot do it. Therefore, they need to reject configurations
      with multiple VLAN-aware bridges from the two code paths that can
      transition towards that state:
      
      - joining a VLAN-aware bridge
      - toggling VLAN awareness on an existing bridge
      
      The .port_vlan_filtering method already propagates the netlink extack to
      the driver, let's propagate it from .port_bridge_join too, to make sure
      that the driver can use the same function for both.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      06b9cce4
    • V
      net: dsa: request drivers to perform FDB isolation · c2693363
      Vladimir Oltean 提交于
      For DSA, to encourage drivers to perform FDB isolation simply means to
      track which bridge does each FDB and MDB entry belong to. It then
      becomes the driver responsibility to use something that makes the FDB
      entry from one bridge not match the FDB lookup of ports from other
      bridges.
      
      The top-level functions where the bridge is determined are:
      - dsa_port_fdb_{add,del}
      - dsa_port_host_fdb_{add,del}
      - dsa_port_mdb_{add,del}
      - dsa_port_host_mdb_{add,del}
      
      aka the pre-crosschip-notifier functions.
      
      Changing the API to pass a reference to a bridge is not superfluous, and
      looking at the passed bridge argument is not the same as having the
      driver look at dsa_to_port(ds, port)->bridge from the ->port_fdb_add()
      method.
      
      DSA installs FDB and MDB entries on shared (CPU and DSA) ports as well,
      and those do not have any dp->bridge information to retrieve, because
      they are not in any bridge - they are merely the pipes that serve the
      user ports that are in one or multiple bridges.
      
      The struct dsa_bridge associated with each FDB/MDB entry is encapsulated
      in a larger "struct dsa_db" database. Although only databases associated
      to bridges are notified for now, this API will be the starting point for
      implementing IFF_UNICAST_FLT in DSA. There, the idea is to install FDB
      entries on the CPU port which belong to the corresponding user port's
      port database. These are supposed to match only when the port is
      standalone.
      
      It is better to introduce the API in its expected final form than to
      introduce it for bridges first, then to have to change drivers which may
      have made one or more assumptions.
      
      Drivers can use the provided bridge.num, but they can also use a
      different numbering scheme that is more convenient.
      
      DSA must perform refcounting on the CPU and DSA ports by also taking
      into account the bridge number. So if two bridges request the same local
      address, DSA must notify the driver twice, once for each bridge.
      
      In fact, if the driver supports FDB isolation, DSA must perform
      refcounting per bridge, but if the driver doesn't, DSA must refcount
      host addresses across all bridges, otherwise it would be telling the
      driver to delete an FDB entry for a bridge and the driver would delete
      it for all bridges. So introduce a bool fdb_isolation in drivers which
      would make all bridge databases passed to the cross-chip notifier have
      the same number (0). This makes dsa_mac_addr_find() -> dsa_db_equal()
      say that all bridge databases are the same database - which is
      essentially the legacy behavior.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      c2693363
  12. 25 2月, 2022 3 次提交
    • V
      net: dsa: support FDB events on offloaded LAG interfaces · e212fa7c
      Vladimir Oltean 提交于
      This change introduces support for installing static FDB entries towards
      a bridge port that is a LAG of multiple DSA switch ports, as well as
      support for filtering towards the CPU local FDB entries emitted for LAG
      interfaces that are bridge ports.
      
      Conceptually, host addresses on LAG ports are identical to what we do
      for plain bridge ports. Whereas FDB entries _towards_ a LAG can't simply
      be replicated towards all member ports like we do for multicast, or VLAN.
      Instead we need new driver API. Hardware usually considers a LAG to be a
      "logical port", and sets the entire LAG as the forwarding destination.
      The physical egress port selection within the LAG is made by hashing
      policy, as usual.
      
      To represent the logical port corresponding to the LAG, we pass by value
      a copy of the dsa_lag structure to all switches in the tree that have at
      least one port in that LAG.
      
      To illustrate why a refcounted list of FDB entries is needed in struct
      dsa_lag, it is enough to say that:
      - a LAG may be a bridge port and may therefore receive FDB events even
        while it isn't yet offloaded by any DSA interface
      - DSA interfaces may be removed from a LAG while that is a bridge port;
        we don't want FDB entries lingering around, but we don't want to
        remove entries that are still in use, either
      
      For all the cases below to work, the idea is to always keep an FDB entry
      on a LAG with a reference count equal to the DSA member ports. So:
      - if a port joins a LAG, it requests the bridge to replay the FDB, and
        the FDB entries get created, or their refcount gets bumped by one
      - if a port leaves a LAG, the FDB replay deletes or decrements refcount
        by one
      - if an FDB is installed towards a LAG with ports already present, that
        entry is created (if it doesn't exist) and its refcount is bumped by
        the amount of ports already present in the LAG
      
      echo "Adding FDB entry to bond with existing ports"
      ip link del bond0
      ip link add bond0 type bond mode 802.3ad
      ip link set swp1 down && ip link set swp1 master bond0 && ip link set swp1 up
      ip link set swp2 down && ip link set swp2 master bond0 && ip link set swp2 up
      ip link del br0
      ip link add br0 type bridge
      ip link set bond0 master br0
      bridge fdb add dev bond0 00:01:02:03:04:05 master static
      
      ip link del br0
      ip link del bond0
      
      echo "Adding FDB entry to empty bond"
      ip link del bond0
      ip link add bond0 type bond mode 802.3ad
      ip link del br0
      ip link add br0 type bridge
      ip link set bond0 master br0
      bridge fdb add dev bond0 00:01:02:03:04:05 master static
      ip link set swp1 down && ip link set swp1 master bond0 && ip link set swp1 up
      ip link set swp2 down && ip link set swp2 master bond0 && ip link set swp2 up
      
      ip link del br0
      ip link del bond0
      
      echo "Adding FDB entry to empty bond, then removing ports one by one"
      ip link del bond0
      ip link add bond0 type bond mode 802.3ad
      ip link del br0
      ip link add br0 type bridge
      ip link set bond0 master br0
      bridge fdb add dev bond0 00:01:02:03:04:05 master static
      ip link set swp1 down && ip link set swp1 master bond0 && ip link set swp1 up
      ip link set swp2 down && ip link set swp2 master bond0 && ip link set swp2 up
      
      ip link set swp1 nomaster
      ip link set swp2 nomaster
      ip link del br0
      ip link del bond0
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      e212fa7c
    • V
      net: dsa: create a dsa_lag structure · dedd6a00
      Vladimir Oltean 提交于
      The main purpose of this change is to create a data structure for a LAG
      as seen by DSA. This is similar to what we have for bridging - we pass a
      copy of this structure by value to ->port_lag_join and ->port_lag_leave.
      For now we keep the lag_dev, id and a reference count in it. Future
      patches will add a list of FDB entries for the LAG (these also need to
      be refcounted to work properly).
      
      The LAG structure is created using dsa_port_lag_create() and destroyed
      using dsa_port_lag_destroy(), just like we have for bridging.
      
      Because now, the dsa_lag itself is refcounted, we can simplify
      dsa_lag_map() and dsa_lag_unmap(). These functions need to keep a LAG in
      the dst->lags array only as long as at least one port uses it. The
      refcounting logic inside those functions can be removed now - they are
      called only when we should perform the operation.
      
      dsa_lag_dev() is renamed to dsa_lag_by_id() and now returns the dsa_lag
      structure instead of the lag_dev net_device.
      
      dsa_lag_foreach_port() now takes the dsa_lag structure as argument.
      
      dst->lags holds an array of dsa_lag structures.
      
      dsa_lag_map() now also saves the dsa_lag->id value, so that linear
      walking of dst->lags in drivers using dsa_lag_id() is no longer
      necessary. They can just look at lag.id.
      
      dsa_port_lag_id_get() is a helper, similar to dsa_port_bridge_num_get(),
      which can be used by drivers to get the LAG ID assigned by DSA to a
      given port.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      dedd6a00
    • V
      net: dsa: rename references to "lag" as "lag_dev" · 46a76724
      Vladimir Oltean 提交于
      In preparation of converting struct net_device *dp->lag_dev into a
      struct dsa_lag *dp->lag, we need to rename, for consistency purposes,
      all occurrences of the "lag" variable in the DSA core to "lag_dev".
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      46a76724
  13. 23 2月, 2022 3 次提交
  14. 20 2月, 2022 2 次提交
    • V
      net: dsa: avoid call to __dev_set_promiscuity() while rtnl_mutex isn't held · 8940e6b6
      Vladimir Oltean 提交于
      If the DSA master doesn't support IFF_UNICAST_FLT, then the following
      call path is possible:
      
      dsa_slave_switchdev_event_work
      -> dsa_port_host_fdb_add
         -> dev_uc_add
            -> __dev_set_rx_mode
               -> __dev_set_promiscuity
      
      Since the blamed commit, dsa_slave_switchdev_event_work() no longer
      holds rtnl_lock(), which triggers the ASSERT_RTNL() from
      __dev_set_promiscuity().
      
      Taking rtnl_lock() around dev_uc_add() is impossible, because all the
      code paths that call dsa_flush_workqueue() do so from contexts where the
      rtnl_mutex is already held - so this would lead to an instant deadlock.
      
      dev_uc_add() in itself doesn't require the rtnl_mutex for protection.
      There is this comment in __dev_set_rx_mode() which assumes so:
      
      		/* Unicast addresses changes may only happen under the rtnl,
      		 * therefore calling __dev_set_promiscuity here is safe.
      		 */
      
      but it is from commit 4417da66 ("[NET]: dev: secondary unicast
      address support") dated June 2007, and in the meantime, commit
      f1f28aa3 ("netdev: Add addr_list_lock to struct net_device."), dated
      July 2008, has added &dev->addr_list_lock to protect this instead of the
      global rtnl_mutex.
      
      Nonetheless, __dev_set_promiscuity() does assume rtnl_mutex protection,
      but it is the uncommon path of what we typically expect dev_uc_add()
      to do. So since only the uncommon path requires rtnl_lock(), just check
      ahead of time whether dev_uc_add() would result into a call to
      __dev_set_promiscuity(), and handle that condition separately.
      
      DSA already configures the master interface to be promiscuous if the
      tagger requires this. We can extend this to also cover the case where
      the master doesn't handle dev_uc_add() (doesn't support IFF_UNICAST_FLT),
      and on the premise that we'd end up making it promiscuous during
      operation anyway, either if a DSA slave has a non-inherited MAC address,
      or if the bridge notifies local FDB entries for its own MAC address, the
      address of a station learned on a foreign port, etc.
      
      Fixes: 0faf890f ("net: dsa: drop rtnl_lock from dsa_slave_switchdev_event_work")
      Reported-by: NOleksij Rempel <o.rempel@pengutronix.de>
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      8940e6b6
    • R
      net: dsa: remove pcs_poll · ccfbf44d
      Russell King (Oracle) 提交于
      With drivers converted over to using phylink PCS, there is no need for
      the struct dsa_switch member "pcs_poll" to exist anymore - there is a
      flag in the struct phylink_pcs which indicates whether this PCS needs
      to be polled which supersedes this.
      Signed-off-by: NRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      ccfbf44d
  15. 18 2月, 2022 2 次提交
  16. 16 2月, 2022 1 次提交
    • V
      net: dsa: add explicit support for host bridge VLANs · 134ef238
      Vladimir Oltean 提交于
      Currently, DSA programs VLANs on shared (DSA and CPU) ports each time it
      does so on user ports. This is good for basic functionality but has
      several limitations:
      
      - the VLAN group which must reach the CPU may be radically different
        from the VLAN group that must be autonomously forwarded by the switch.
        In other words, the admin may want to isolate noisy stations and avoid
        traffic from them going to the control processor of the switch, where
        it would just waste useless cycles. The bridge already supports
        independent control of VLAN groups on bridge ports and on the bridge
        itself, and when VLAN-aware, it will drop packets in software anyway
        if their VID isn't added as a 'self' entry towards the bridge device.
      
      - Replaying host FDB entries may depend, for some drivers like mv88e6xxx,
        on replaying the host VLANs as well. The 2 VLAN groups are
        approximately the same in most regular cases, but there are corner
        cases when timing matters, and DSA's approximation of replicating
        VLANs on shared ports simply does not work.
      
      - If a user makes the bridge (implicitly the CPU port) join a VLAN by
        accident, there is no way for the CPU port to isolate itself from that
        noisy VLAN except by rebooting the system. This is because for each
        VLAN added on a user port, DSA will add it on shared ports too, but
        for each VLAN deletion on a user port, it will remain installed on
        shared ports, since DSA has no good indication of whether the VLAN is
        still in use or not.
      
      Now that the bridge driver emits well-balanced SWITCHDEV_OBJ_ID_PORT_VLAN
      addition and removal events, DSA has a simple and straightforward task
      of separating the bridge port VLANs (these have an orig_dev which is a
      DSA slave interface, or a LAG interface) from the host VLANs (these have
      an orig_dev which is a bridge interface), and to keep a simple reference
      count of each VID on each shared port.
      
      Forwarding VLANs must be installed on the bridge ports and on all DSA
      ports interconnecting them. We don't have a good view of the exact
      topology, so we simply install forwarding VLANs on all DSA ports, which
      is what has been done until now.
      
      Host VLANs must be installed primarily on the dedicated CPU port of each
      bridge port. More subtly, they must also be installed on upstream-facing
      and downstream-facing DSA ports that are connecting the bridge ports and
      the CPU. This ensures that the mv88e6xxx's problem (VID of host FDB
      entry may be absent from VTU) is still addressed even if that switch is
      in a cross-chip setup, and it has no local CPU port.
      
      Therefore:
      - user ports contain only bridge port (forwarding) VLANs, and no
        refcounting is necessary
      - DSA ports contain both forwarding and host VLANs. Refcounting is
        necessary among these 2 types.
      - CPU ports contain only host VLANs. Refcounting is also necessary.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      134ef238
  17. 05 1月, 2022 2 次提交
  18. 10 12月, 2021 1 次提交
  19. 09 12月, 2021 4 次提交
    • V
      net: dsa: eliminate dsa_switch_ops :: port_bridge_tx_fwd_{,un}offload · 857fdd74
      Vladimir Oltean 提交于
      We don't really need new switch API for these, and with new switches
      which intend to add support for this feature, it will become cumbersome
      to maintain.
      
      The change consists in restructuring the two drivers that implement this
      offload (sja1105 and mv88e6xxx) such that the offload is enabled and
      disabled from the ->port_bridge_{join,leave} methods instead of the old
      ->port_bridge_tx_fwd_{,un}offload.
      
      The only non-trivial change is that mv88e6xxx_map_virtual_bridge_to_pvt()
      has been moved to avoid a forward declaration, and the
      mv88e6xxx_reg_lock() calls from inside it have been removed, since
      locking is now done from mv88e6xxx_port_bridge_{join,leave}.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NAlvin Šipraga <alsi@bang-olufsen.dk>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      857fdd74
    • V
      net: dsa: keep the bridge_dev and bridge_num as part of the same structure · d3eed0e5
      Vladimir Oltean 提交于
      The main desire behind this is to provide coherent bridge information to
      the fast path without locking.
      
      For example, right now we set dp->bridge_dev and dp->bridge_num from
      separate code paths, it is theoretically possible for a packet
      transmission to read these two port properties consecutively and find a
      bridge number which does not correspond with the bridge device.
      
      Another desire is to start passing more complex bridge information to
      dsa_switch_ops functions. For example, with FDB isolation, it is
      expected that drivers will need to be passed the bridge which requested
      an FDB/MDB entry to be offloaded, and along with that bridge_dev, the
      associated bridge_num should be passed too, in case the driver might
      want to implement an isolation scheme based on that number.
      
      We already pass the {bridge_dev, bridge_num} pair to the TX forwarding
      offload switch API, however we'd like to remove that and squash it into
      the basic bridge join/leave API. So that means we need to pass this
      pair to the bridge join/leave API.
      
      During dsa_port_bridge_leave, first we unset dp->bridge_dev, then we
      call the driver's .port_bridge_leave with what used to be our
      dp->bridge_dev, but provided as an argument.
      
      When bridge_dev and bridge_num get folded into a single structure, we
      need to preserve this behavior in dsa_port_bridge_leave: we need a copy
      of what used to be in dp->bridge.
      
      Switch drivers check bridge membership by comparing dp->bridge_dev with
      the provided bridge_dev, but now, if we provide the struct dsa_bridge as
      a pointer, they cannot keep comparing dp->bridge to the provided
      pointer, since this only points to an on-stack copy. To make this
      obvious and prevent driver writers from forgetting and doing stupid
      things, in this new API, the struct dsa_bridge is provided as a full
      structure (not very large, contains an int and a pointer) instead of a
      pointer. An explicit comparison function needs to be used to determine
      bridge membership: dsa_port_offloads_bridge().
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NAlvin Šipraga <alsi@bang-olufsen.dk>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      d3eed0e5
    • V
      net: dsa: hide dp->bridge_dev and dp->bridge_num in the core behind helpers · 36cbf39b
      Vladimir Oltean 提交于
      The location of the bridge device pointer and number is going to change.
      It is not going to be kept individually per port, but in a common
      structure allocated dynamically and which will have lockdep validation.
      
      Create helpers to access these elements so that we have a migration path
      to the new organization.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      36cbf39b
    • V
      net: dsa: assign a bridge number even without TX forwarding offload · 947c8746
      Vladimir Oltean 提交于
      The service where DSA assigns a unique bridge number for each forwarding
      domain is useful even for drivers which do not implement the TX
      forwarding offload feature.
      
      For example, drivers might use the dp->bridge_num for FDB isolation.
      
      So rename ds->num_fwd_offloading_bridges to ds->max_num_bridges, and
      calculate a unique bridge_num for all drivers that set this value.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NAlvin Šipraga <alsi@bang-olufsen.dk>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      947c8746